2026-05-07 01:31:28.272 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.188.20:5700'
2026-05-07 01:31:28.273 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.188.20:5802)
2026-05-07 01:31:28.273 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.188.20:5801)
2026-05-07 01:31:28.273 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.188.22:6700'
2026-05-07 01:31:28.273 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.188.22:6802)
2026-05-07 01:31:28.273 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.188.22:6801)
2026-05-07 01:31:28.273 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.188.20:5700/1'
2026-05-07 01:31:28.273 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.188.20:5804)
2026-05-07 01:31:28.273 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.188.20:5803)
2026-05-07 01:31:28.273 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.188.20:5700/2'
2026-05-07 01:31:28.273 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.188.20:5806)
2026-05-07 01:31:28.273 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.188.20:5805)
2026-05-07 01:31:28.273 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.188.20:5700/3'
2026-05-07 01:31:28.273 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.188.20:5808)
2026-05-07 01:31:28.273 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.188.20:5807)
2026-05-07 01:31:28.273 [INFO] fake_trx.py:429 Init complete
2026-05-07 01:31:28.273 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-07 01:31:29.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:29.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:31:29.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:31:29.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:29.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:29.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:32.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:32.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:31:32.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:32.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:31:32.875 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 0 -> 1
2026-05-07 01:31:32.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:31:32.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:31:32.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:31:32.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:32.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:32.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:31:32.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:31:32.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 0 -> 1
2026-05-07 01:31:32.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:32.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:31:32.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:31:32.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:31:32.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:32.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:32.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:31:32.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:31:32.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 0 -> 1
2026-05-07 01:31:32.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:32.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:31:32.889 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:31:32.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:31:32.889 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:32.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:32.889 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:31:32.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:31:32.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 0 -> 1
2026-05-07 01:31:32.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:32.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:31:32.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:31:32.893 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:31:32.893 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:32.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:31:33.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:31:33.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:33.444 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:31:33.446 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:31:33.447 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:31:33.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:33.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:33.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:33.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:33.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:33.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:33.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:33.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:33.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:33.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:33.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:33.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:33.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:33.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:31:33.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:33.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:33.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:33.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:34.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:34.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:34.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:34.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:34.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:34.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:34.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:34.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:34.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:34.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:34.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:34.311 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:31:34.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:34.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:34.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:34.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:34.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:34.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:34.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:34.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:34.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:34.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:34.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:34.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:34.783 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:31:34.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:34.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:34.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:34.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:34.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:34.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:34.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:35.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:35.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:35.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:35.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:35.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:35.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:35.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:35.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:35.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:35.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:35.254 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:31:35.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:35.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:35.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:35.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:35.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:35.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:35.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:35.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:35.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:35.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:35.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:35.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:35.724 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:31:35.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:35.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:35.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:35.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:35.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:35.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:35.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:35.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:35.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:36.196 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:31:36.667 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:31:36.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:36.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:36.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:36.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:36.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:36.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:36.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:36.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:36.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:36.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:36.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:36.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:36.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:36.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:36.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:36.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:36.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:36.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:36.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:36.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:36.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:37.140 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:31:37.612 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:31:37.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:37.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:37.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:37.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:37.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:37.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:37.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:37.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:37.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:37.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:37.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:37.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:37.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:37.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:37.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:37.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:31:38.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:38.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:38.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:38.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:38.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:38.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:38.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:38.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:38.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:38.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:38.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:38.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:38.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:38.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:38.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.554 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:31:38.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:38.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:38.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:38.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:38.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:38.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:38.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:38.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:38.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:38.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:38.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:38.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:39.026 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:31:39.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:39.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:39.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:39.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:39.498 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:31:39.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:39.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:39.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:39.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:39.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:39.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:39.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:39.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:39.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:39.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:39.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:39.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:39.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:39.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:39.970 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:31:40.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:40.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:40.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:40.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:40.443 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:31:40.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:40.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:40.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:40.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:40.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:40.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:40.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:40.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:40.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:40.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:40.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:40.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:40.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:40.908 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:31:40.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:40.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:40.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:40.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:41.372 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:31:41.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:41.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:41.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:41.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:41.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:41.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:41.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:41.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:41.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:41.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:41.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:41.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:41.842 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:31:41.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:41.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:41.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:41.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:42.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:42.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:42.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:42.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:42.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:42.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:42.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:42.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:42.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:42.313 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:31:42.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:42.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:42.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:42.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:42.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:42.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:42.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:42.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:42.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:42.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:42.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:42.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:42.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:42.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:42.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:42.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.784 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:31:42.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:42.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:42.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:42.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:42.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:42.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:42.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:42.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:42.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:42.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:42.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:43.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:43.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:43.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:43.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.252 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:31:43.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:43.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:43.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:43.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:43.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:43.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:43.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:43.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:43.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:43.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:43.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:43.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:43.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:43.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.723 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:31:43.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:43.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:43.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:43.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:43.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:43.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:43.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:43.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:43.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:43.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:43.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:44.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:44.191 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:31:44.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:44.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:44.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:44.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:44.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:44.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:44.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:44.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:44.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:44.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:44.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:44.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:44.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:44.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:44.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:44.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:44.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:31:44.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:44.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:44.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:44.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:45.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:45.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:45.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:45.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:45.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:45.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:45.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:45.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:45.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:45.133 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:31:45.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:45.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:45.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:45.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:45.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:45.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:45.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:45.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:45.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:45.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:45.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:45.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:31:45.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:31:45.604 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:45.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:31:45.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:31:45.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:45.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:46.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:31:46.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:46.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:46.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:46.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:46.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:46.075 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:31:46.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:46.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:46.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:46.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:46.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:46.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:46.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:31:46.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:31:46.077 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:46.077 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:51.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:31:51.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:31:51.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:51.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:51.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:51.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:51.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:51.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:31:51.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:51.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:31:51.091 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:31:51.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:31:51.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:31:51.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:51.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:31:51.097 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:31:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:31:51.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:51.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:51.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:31:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:31:51.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:31:51.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:31:51.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:31:51.099 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:31:51.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:31:51.103 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:31:51.103 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:31:51.103 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:51.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:31:51.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:31:51.623 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:31:51.624 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:31:51.626 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:31:51.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:51.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:51.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:51.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:51.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.049 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:31:52.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:52.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:52.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:52.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:52.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:52.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:31:52.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:31:52.145 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:52.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:57.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:31:57.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:31:57.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:57.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:57.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:57.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:57.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:57.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:31:57.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:57.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:31:57.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:31:57.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:31:57.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:31:57.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:31:57.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:57.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:57.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:31:57.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:31:57.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:31:57.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:57.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:31:57.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:31:57.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:31:57.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:57.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:57.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:31:57.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:31:57.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:31:57.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:57.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:31:57.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:31:57.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:31:57.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:31:57.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:57.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:31:57.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:31:57.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:31:57.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:57.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:31:57.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:31:57.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:31:57.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:31:57.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:31:57.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:31:57.174 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:31:57.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:31:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:31:57.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:31:57.695 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:31:57.696 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:31:57.697 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:31:57.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:57.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:31:57.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:31:57.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:31:57.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:57.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:31:57.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:31:57.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:31:57.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:31:57.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:31:57.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:31:57.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:31:57.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:31:57.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:31:57.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:31:57.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:31:57.727 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:31:57.727 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:57.727 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:31:57.727 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:02.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:32:02.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:32:02.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:02.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:02.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:02.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:02.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:02.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:32:02.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:02.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:32:02.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:32:02.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:32:02.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:32:02.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:32:02.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:02.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:02.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:32:02.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:32:02.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:32:02.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:32:02.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:32:02.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:32:02.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:02.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:32:02.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:32:02.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:32:02.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:02.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:02.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:32:02.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:32:02.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:32:02.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:32:02.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:32:02.748 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:32:02.748 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:02.753 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:32:03.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:32:03.270 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:32:03.272 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:32:03.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:03.273 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:32:03.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:03.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:03.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:03.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:03.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:03.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:03.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:03.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:03.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:03.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:03.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:03.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:32:03.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:32:03.317 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:03.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:08.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:32:08.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:32:08.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:08.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:08.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:08.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:08.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:08.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:32:08.330 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:08.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:32:08.331 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:32:08.332 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:32:08.332 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:32:08.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:32:08.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:08.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:08.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:32:08.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:32:08.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:32:08.333 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:32:08.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:32:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:32:08.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:32:08.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:32:08.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:32:08.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:32:08.336 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:32:08.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:32:08.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:08.341 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:32:08.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:32:08.860 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:32:08.862 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:32:08.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:08.864 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:32:08.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:08.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:08.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:08.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:08.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:08.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:32:08.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:32:08.992 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:32:08.992 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:08.992 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:08.992 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:08.992 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:08.992 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:32:13.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:32:13.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:32:13.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:13.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:13.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:13.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:14.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:32:14.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:32:14.001 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:14.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:32:14.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:32:14.003 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:32:14.003 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:32:14.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:32:14.003 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:14.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:32:14.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:32:14.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:32:14.004 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:32:14.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:14.005 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:32:14.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:32:14.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:32:14.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:32:14.006 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:32:14.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:32:14.006 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:32:14.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:14.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:32:14.007 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:32:14.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:32:14.007 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:32:14.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:32:14.007 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:32:14.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:32:14.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:32:14.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:32:14.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:32:14.010 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:32:14.010 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:32:14.010 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:14.015 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:32:14.492 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:32:14.535 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:32:14.537 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:32:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:14.539 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:32:14.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:14.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:14.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:14.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:14.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:14.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:14.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:14.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:14.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:14.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:14.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:14.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:14.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:14.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:14.960 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:32:15.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:15.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:15.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:15.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:15.431 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:32:15.904 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:32:16.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:16.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:16.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:16.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:16.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:32:16.849 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:32:17.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:17.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:17.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:17.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:17.320 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:32:17.793 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:32:18.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:18.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:18.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:18.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:18.265 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:32:18.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:18.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:18.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:18.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:18.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:18.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:18.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:18.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:18.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:18.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:18.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:18.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:32:18.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:18.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:18.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:18.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:18.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:18.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:19.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:32:19.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:32:19.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:32:19.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:32:19.208 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:32:19.682 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:32:20.154 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:32:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:32:21.097 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:32:21.570 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:32:22.043 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:32:22.515 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:32:22.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:22.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:22.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:22.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:22.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:22.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:22.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:22.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:22.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:22.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:22.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:22.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:22.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:22.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:22.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:22.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:22.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:22.986 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:32:23.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:23.457 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:32:23.928 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:32:24.401 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:32:24.873 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:32:25.345 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:32:25.816 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:32:26.290 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:32:26.762 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:32:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:32:27.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:27.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:27.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:27.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:27.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:27.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:27.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:27.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:27.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:27.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:27.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:27.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:27.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:27.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:27.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:27.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:27.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:27.705 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:32:28.176 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:32:28.649 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:32:29.122 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:32:29.594 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:32:30.065 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:32:30.538 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:32:31.011 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:32:31.483 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:32:31.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:31.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:31.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:31.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:31.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:31.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:31.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:31.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:31.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:31.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:31.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:31.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:31.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:31.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:31.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:31.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:31.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:31.955 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:32:32.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:32.429 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:32:32.901 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:32:33.372 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:32:33.842 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:32:34.313 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:32:34.786 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:32:35.259 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:32:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:32:36.204 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:32:36.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:36.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:36.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:36.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:36.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:36.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:36.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:36.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:36.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:36.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:36.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:36.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:36.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:36.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:36.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:36.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:36.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:36.677 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:32:37.150 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:32:37.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:37.622 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:32:38.095 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:32:38.567 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:32:39.038 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:32:39.511 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:32:39.981 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:32:40.451 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:32:40.924 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:32:41.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:41.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:41.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:41.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:41.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:41.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:41.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:41.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:41.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:41.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:41.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:41.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:41.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:41.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:41.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:41.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:41.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:41.396 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:32:41.868 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:32:42.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:42.339 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:32:42.810 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:32:43.283 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:32:43.756 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:32:44.228 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:32:44.699 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:32:45.172 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:32:45.644 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:32:46.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:46.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:46.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:46.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:46.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:46.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:46.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:46.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:46.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:46.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:46.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:46.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:32:46.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:46.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:46.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:46.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:46.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:46.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:46.587 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:32:46.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:47.058 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:32:47.529 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:32:48.002 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:32:48.471 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 01:32:48.944 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 01:32:49.416 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 01:32:49.888 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 01:32:50.360 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 01:32:50.831 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 01:32:50.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:50.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:50.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:50.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:50.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:50.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:50.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:50.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:50.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:50.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:50.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:50.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:50.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:50.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:50.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:50.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:50.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:51.304 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 01:32:51.776 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 01:32:51.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:52.247 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 01:32:52.718 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 01:32:53.189 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 01:32:53.660 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 01:32:54.131 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 01:32:54.604 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 01:32:55.076 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 01:32:55.548 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 01:32:55.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:55.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:55.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:55.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:55.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:32:55.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:32:55.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:32:55.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:55.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:55.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:55.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:32:55.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:32:55.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:32:55.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:55.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:32:55.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:32:55.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:55.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:32:56.020 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 01:32:56.490 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 01:32:56.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:32:56.961 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 01:32:57.434 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 01:32:57.907 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 01:32:58.379 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 01:32:58.851 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 01:32:59.321 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 01:32:59.792 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 01:33:00.263 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 01:33:00.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:00.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:00.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:00.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:00.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:00.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:00.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:00.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:00.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:00.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:00.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:00.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:00.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:00.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:00.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:00.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:00.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:00.733 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 01:33:01.204 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 01:33:01.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:01.678 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 01:33:02.150 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 01:33:02.622 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 01:33:03.096 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 01:33:03.568 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 01:33:04.040 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 01:33:04.511 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 01:33:04.982 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 01:33:05.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:05.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:05.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:05.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:05.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:05.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:05.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:05.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:05.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:05.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:05.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:05.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:05.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:05.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:05.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:05.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:05.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:05.452 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 01:33:05.924 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 01:33:06.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 01:33:06.868 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 01:33:07.341 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 01:33:07.812 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 01:33:08.283 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 01:33:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 01:33:09.229 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 01:33:09.698 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 01:33:10.167 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 01:33:10.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:10.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:10.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:10.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:10.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:10.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:10.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:10.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:10.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:10.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:10.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:10.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:10.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:10.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:10.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:10.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:10.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:10.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:10.637 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 01:33:11.109 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 01:33:11.582 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 01:33:12.054 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 01:33:12.526 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 01:33:12.997 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 01:33:13.467 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 01:33:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 01:33:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:14.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:14.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:14.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:14.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:14.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:14.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:14.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:14.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:14.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:14.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:14.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:14.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:14.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:14.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:14.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:14.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:14.405 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 01:33:14.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:14.877 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 01:33:15.350 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 01:33:15.822 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 01:33:16.293 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 01:33:16.766 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 01:33:17.239 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 01:33:17.710 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 01:33:18.182 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 01:33:18.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:18.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:18.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:18.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:18.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:18.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:18.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:18.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:18.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:18.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:18.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:18.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:18.653 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 01:33:18.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:18.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:18.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:18.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:18.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:19.123 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 01:33:19.597 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 01:33:20.069 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 01:33:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 01:33:21.012 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 01:33:21.482 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 01:33:21.953 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 01:33:22.426 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 01:33:22.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:22.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:22.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:22.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:22.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:22.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:22.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:22.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:22.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:22.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:22.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:22.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:22.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:22.898 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 01:33:22.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:22.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:22.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:22.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:23.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:23.370 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 01:33:23.841 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 01:33:24.312 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 01:33:24.786 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 01:33:25.258 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 01:33:25.730 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 01:33:26.201 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 01:33:26.674 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 01:33:27.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:27.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:27.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:27.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:27.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:27.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:27.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:27.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:27.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:27.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:27.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:27.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:27.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:27.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:27.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:27.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:27.146 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 01:33:27.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:27.610 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 01:33:28.079 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 01:33:28.550 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 01:33:29.024 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 01:33:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 01:33:29.968 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 01:33:30.442 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 01:33:30.914 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 01:33:31.386 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 01:33:31.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:31.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:31.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:31.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:31.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:31.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:31.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:31.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:31.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:31.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:31.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:31.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:31.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:31.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:31.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:31.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:31.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:31.857 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 01:33:32.328 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 01:33:32.802 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 01:33:33.274 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 01:33:33.746 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 01:33:34.217 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 01:33:34.690 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 01:33:35.162 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 01:33:35.634 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 01:33:35.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:35.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:35.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:35.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:35.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:35.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:35.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:35.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:35.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:35.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:35.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:35.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:35.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:35.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:35.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:35.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:36.105 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 01:33:36.576 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 01:33:37.047 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 01:33:37.517 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 01:33:37.988 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 01:33:38.459 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 01:33:38.930 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 01:33:39.401 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 01:33:39.872 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-07 01:33:40.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:40.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:40.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:40.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:40.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:40.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:40.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:40.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:40.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:40.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:40.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:40.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:40.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:40.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:40.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:40.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:40.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:40.342 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-07 01:33:40.816 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-07 01:33:41.288 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-07 01:33:41.760 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-07 01:33:42.231 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-07 01:33:42.702 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-07 01:33:43.173 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-07 01:33:43.646 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-07 01:33:44.118 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-07 01:33:44.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:44.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:44.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:44.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:44.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:44.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:44.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:44.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:44.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:33:44.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:33:44.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:33:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:33:44.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:33:44.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:33:44.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:33:44.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19530 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:33:44.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19530 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:33:44.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19530 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:33:49.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:33:49.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:33:49.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:33:49.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:33:49.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:33:49.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:33:49.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:33:49.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:33:49.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:49.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:33:49.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:33:49.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:33:49.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:33:49.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:33:49.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:49.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:33:49.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:33:49.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:33:49.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:33:49.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:49.359 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:33:49.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:33:49.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:33:49.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:49.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:33:49.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:33:49.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:33:49.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:33:49.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:49.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:33:49.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:33:49.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:33:49.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:49.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:33:49.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:33:49.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:33:49.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:33:49.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:49.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:33:49.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:33:49.366 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:33:49.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:33:49.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:33:49.367 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:33:54.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:33:54.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:33:54.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:33:54.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:33:54.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:33:54.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:33:54.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:33:54.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:54.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:33:54.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:33:54.381 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:33:54.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:33:54.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:33:54.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:54.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:33:54.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:33:54.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:33:54.382 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:33:54.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:33:54.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:33:54.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:33:54.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:54.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:33:54.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:33:54.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:33:54.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:33:54.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:33:54.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:33:54.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:33:54.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:33:54.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:54.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:33:54.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:33:54.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:33:54.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:33:54.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:33:54.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:33:54.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:33:54.387 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:33:54.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:54.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:33:54.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:33:54.911 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:33:54.913 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:33:54.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:54.916 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:33:54.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:54.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:54.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:54.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:54.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:54.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:54.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:54.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:54.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:54.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:54.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:54.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:54.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:55.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:55.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:55.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:55.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:55.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:55.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:55.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:55.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:55.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:55.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:55.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:55.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:55.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:33:55.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:55.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:55.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:55.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:55.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:55.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:55.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:55.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:55.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:55.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:55.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:55.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:55.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:55.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:55.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:55.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:55.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:55.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:55.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:55.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:55.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:55.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:55.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:55.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:55.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:55.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:55.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:55.807 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:33:55.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:55.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:55.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:55.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:55.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:56.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:56.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:56.265 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=407 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:33:56.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:56.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:56.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:56.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:56.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:56.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:56.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:56.278 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:33:56.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:56.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:56.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:56.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:56.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:56.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:56.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:56.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:33:56.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:56.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:56.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:56.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:56.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:56.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:56.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:56.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:56.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:56.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:56.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:56.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:56.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:56.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:56.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.220 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:33:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:57.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:57.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:57.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:57.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:57.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:57.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:57.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:57.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:57.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:57.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:57.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:57.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:57.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:57.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:57.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:57.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.691 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:33:57.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:57.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:57.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:57.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:57.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:57.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:57.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:57.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:57.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:57.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:57.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:57.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:57.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:57.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:57.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:57.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.163 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:33:58.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:58.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:58.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:58.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:58.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:58.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:58.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:58.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:58.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:58.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:58.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:58.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:58.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:58.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:58.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:58.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:58.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:58.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.632 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:33:58.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:58.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:58.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:58.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:58.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:58.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:58.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:58.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:58.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:58.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:58.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:59.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:33:59.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:59.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:59.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:59.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:59.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:59.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:33:59.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:33:59.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:33:59.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:33:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:33:59.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:33:59.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:59.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:59.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:59.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:59.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:33:59.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:33:59.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:33:59.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:59.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:59.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:59.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:33:59.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:33:59.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:33:59.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:33:59.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:33:59.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:33:59.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.046 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:34:00.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:00.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:00.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:00.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:00.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:00.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:00.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:00.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:00.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:00.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:00.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:00.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:00.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:00.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.519 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:34:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:00.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:00.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:00.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:00.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:00.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:00.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:00.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:00.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:00.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:00.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:00.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:00.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:00.989 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:34:01.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:01.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:01.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:01.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:01.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:01.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:01.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:01.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:01.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:01.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:01.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:01.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:01.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.456 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:34:01.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:01.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:01.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:01.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:01.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:01.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:01.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:01.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:01.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:01.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:01.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:01.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:01.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:01.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:01.924 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:34:02.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:02.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:02.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:02.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:02.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:02.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:02.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:02.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:02.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:02.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:02.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:02.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:02.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:02.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.394 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:34:02.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:02.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:02.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:02.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:02.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:02.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:02.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:02.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:02.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:02.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:02.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:02.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:02.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:02.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:02.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:02.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:02.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:02.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:02.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:02.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:02.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:02.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:02.862 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:34:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:02.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:02.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:02.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:02.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:03.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:03.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:03.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:03.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:03.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:03.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:03.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:03.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:03.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:03.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:03.335 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:34:03.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:03.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:03.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:03.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:03.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:03.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:03.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:03.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:03.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:03.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:03.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:03.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:03.806 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:34:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:03.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:03.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:03.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:03.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:04.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:04.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:04.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:04.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:04.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:04.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:04.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:04.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:04.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:34:04.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:34:04.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:34:04.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:34:04.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:34:04.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:34:04.274 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:04.275 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:09.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:34:09.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:34:09.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:34:09.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:34:09.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:34:09.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:34:09.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:34:09.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:34:09.285 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:09.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:34:09.285 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:34:09.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:34:09.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:34:09.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:34:09.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:09.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:34:09.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:34:09.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:34:09.289 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:34:09.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:09.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:34:09.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:34:09.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:34:09.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:09.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:34:09.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:34:09.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:34:09.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:34:09.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:34:09.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:34:09.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:34:09.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:34:09.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:34:09.298 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:34:09.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:09.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:34:09.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:34:09.820 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:34:09.822 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:34:09.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:09.824 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:34:09.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:09.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:09.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:09.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:09.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:09.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:09.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:09.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:09.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:09.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:09.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:09.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:09.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:34:10.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:10.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:10.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:10.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:10.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:10.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:10.719 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:34:10.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:10.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:10.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:10.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:10.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:10.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:10.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:10.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:10.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:10.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:10.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:10.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:10.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:10.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:10.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:10.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:10.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:11.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:34:11.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:11.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:11.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:11.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:11.661 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:11.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:12.134 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:34:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:12.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:12.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:12.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:12.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:12.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:12.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:12.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:12.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:12.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:12.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:12.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:12.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:12.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:12.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:12.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:12.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:12.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:12.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:12.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:12.606 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:34:13.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:13.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:13.078 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:34:13.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:13.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:13.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:13.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:13.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:13.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:13.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:13.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:13.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:13.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:13.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:13.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:13.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:13.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:13.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:13.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:13.549 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:34:13.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:13.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:13.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:13.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:13.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:14.020 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:34:14.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:14.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:14.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:14.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:14.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:14.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:14.493 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:34:14.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:14.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:14.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:14.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:14.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:14.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:14.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:14.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:14.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:14.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:14.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:14.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:14.965 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:34:15.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:15.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:15.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:15.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:15.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:15.438 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:34:15.909 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:34:16.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:16.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:16.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:34:16.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:16.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:16.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:16.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:16.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:16.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:16.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:16.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:16.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:16.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:16.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:16.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:16.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:16.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:16.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:16.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:16.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:16.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:34:17.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:34:17.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:17.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:17.794 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:34:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:18.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:18.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:18.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:18.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:18.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:18.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:18.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:18.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:18.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:18.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:18.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:18.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:18.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:18.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:18.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:18.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:18.266 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:34:18.739 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:34:19.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:19.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:19.209 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:34:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:19.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:19.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:19.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:19.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:19.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:19.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:19.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:19.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:19.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:19.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:19.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:19.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:19.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:19.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:19.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:19.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:19.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:19.680 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:34:20.151 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:34:20.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:20.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:20.621 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:34:21.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:21.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:21.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:21.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:21.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:21.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:21.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:21.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:21.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:21.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:21.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:21.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:21.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:21.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:21.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:21.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:21.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:21.100 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:34:21.568 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:34:22.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:22.039 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:34:22.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:22.509 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:34:22.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:22.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:22.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:22.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:22.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:22.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:22.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:22.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:22.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:22.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:22.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:22.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:22.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:22.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:22.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:22.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:22.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:22.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:22.980 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:34:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:34:23.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:23.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:23.922 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:34:24.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:24.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:24.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:24.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:24.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:24.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:24.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:24.392 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:34:24.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:24.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:24.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:24.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:24.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:24.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:24.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:24.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:24.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:24.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:24.863 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:34:25.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:25.337 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:34:25.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:25.809 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:34:25.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:25.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:25.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:25.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:25.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:25.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:25.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:25.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:25.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:25.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:25.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:25.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:25.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:25.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:25.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:25.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:25.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:26.281 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:34:26.752 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:34:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:27.225 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:34:27.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:27.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:27.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:27.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:27.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:27.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:27.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:27.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:27.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:27.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:27.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:27.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:27.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:27.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:27.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:27.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:27.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:27.693 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:34:28.164 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:34:28.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:28.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:28.636 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:34:28.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:28.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:28.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:28.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:28.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:28.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:28.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:28.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:28.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:28.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:28.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:28.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:28.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:28.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:28.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:28.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:28.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:29.105 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:34:29.576 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:34:29.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:29.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:30.047 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:34:30.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:30.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:30.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:30.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:30.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:30.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:30.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:30.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:30.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:30.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:30.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:30.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:30.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:30.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:30.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:30.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:30.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:30.518 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:34:30.987 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:34:31.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:31.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:31.459 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:34:31.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:31.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:31.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:31.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:31.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:31.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:31.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:31.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:31.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:31.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:31.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:31.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:31.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:31.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:31.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:31.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:31.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:31.930 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:34:32.401 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:34:32.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:32.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:32.871 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:34:33.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:33.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:33.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:33.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:33.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:33.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:33.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:33.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:33.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:33.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:33.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:33.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:33.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:33.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:33.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:33.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:33.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:33.343 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:34:33.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:33.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:33.816 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:34:34.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:34.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:34.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:34.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:34.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:34.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:34.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:34.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:34.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:34.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:34.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:34.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:34.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:34.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:34.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:34.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:34.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:34.288 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:34:34.760 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:34:35.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:35.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:35.231 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:34:35.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:35.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:35.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:35.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:35.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:35.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:35.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:35.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:35.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:35.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:35.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:35.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:35.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:35.703 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:34:35.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:35.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:35.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:35.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:36.176 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:34:36.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:36.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:36.649 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:34:37.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:37.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:37.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:37.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:37.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:37.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:37.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:37.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:37.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:37.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:37.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:37.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:34:37.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:37.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:37.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:37.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:37.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:37.594 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:34:38.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:38.066 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:34:38.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:38.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:38.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:38.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:38.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:38.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:38.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:38.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:38.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:34:38.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:34:38.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:34:38.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:34:38.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:34:38.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:34:38.528 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:38.528 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:34:43.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:34:43.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:34:43.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:34:43.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:34:43.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:34:43.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:34:43.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:34:43.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:34:43.548 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:43.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:34:43.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:34:43.553 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:34:43.553 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:34:43.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:34:43.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:43.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:34:43.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:34:43.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:34:43.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:34:43.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:43.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:34:43.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:34:43.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:34:43.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:43.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:34:43.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:34:43.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:34:43.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:34:43.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:43.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:34:43.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:34:43.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:34:43.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:34:43.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:34:43.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:34:43.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:34:43.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:34:43.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:43.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:34:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:34:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:34:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:34:43.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:34:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:34:43.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:34:43.565 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:34:43.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:34:43.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:34:44.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:34:44.093 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:34:44.094 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:34:44.096 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:34:44.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:44.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:44.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:44.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:44.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:44.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:44.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:44.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:44.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:44.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:44.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:44.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:44.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:44.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:34:44.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:44.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:44.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:44.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:44.990 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:34:45.464 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:34:45.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:45.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:45.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:45.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:45.936 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:34:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:34:46.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:46.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:46.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:46.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:46.882 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:34:47.354 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:34:47.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:47.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:47.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:47.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:34:48.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:48.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:48.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:48.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:48.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:48.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:48.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:48.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:48.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:48.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:48.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:48.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:48.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:48.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:48.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:48.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:48.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:48.297 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:34:48.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:34:48.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:34:48.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:34:48.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:34:48.768 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:34:49.241 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:34:49.714 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:34:50.186 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:34:50.657 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:34:51.130 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:34:51.603 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:34:52.075 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:34:52.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:52.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:52.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:52.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:52.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:52.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:52.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:52.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:52.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:52.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:52.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:52.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:52.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:52.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:52.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:52.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:52.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:52.547 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:34:53.020 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:34:53.491 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:34:53.963 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:34:54.436 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:34:54.909 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:34:55.381 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:34:55.854 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:34:56.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:56.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:56.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:56.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:56.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:34:56.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:34:56.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:34:56.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:56.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:56.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:56.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:34:56.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:34:56.326 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:34:56.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:34:56.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:34:56.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:34:56.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:56.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:34:56.798 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:34:57.269 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:34:57.740 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:34:58.212 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:34:58.681 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:34:59.152 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:34:59.623 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:35:00.094 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:35:00.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:00.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:00.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:00.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:00.564 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:35:00.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:00.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:00.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:00.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:00.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:00.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:00.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:00.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:00.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:00.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:00.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:00.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:00.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:01.035 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:35:01.509 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:35:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:35:02.453 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:35:02.924 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:35:03.395 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:35:03.866 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:35:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:35:04.807 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:35:05.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:05.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:05.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:05.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:05.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:05.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:05.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:05.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:05.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:05.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:05.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:05.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:05.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:05.277 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:35:05.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:05.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:05.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:05.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:05.749 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:35:06.219 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:35:06.690 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:35:07.163 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:35:07.631 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:35:08.102 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:35:08.573 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:35:09.044 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:35:09.515 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:35:09.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:09.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:09.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:09.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:09.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:09.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:09.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:09.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:09.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:09.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:09.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:09.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:09.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:09.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:09.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:09.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:09.980 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:35:10.452 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:35:10.922 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:35:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:35:11.864 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:35:12.335 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:35:12.808 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:35:13.281 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:35:13.753 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:35:13.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:13.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:13.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:13.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:13.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:13.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:13.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:13.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:13.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:13.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:13.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:13.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:35:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:14.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:14.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:14.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:14.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:14.226 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:35:14.699 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:35:15.171 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:35:15.642 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:35:16.112 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:35:16.583 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:35:17.054 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:35:17.525 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:35:17.995 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 01:35:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:18.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:18.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:18.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:18.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:18.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:18.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:18.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:18.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:18.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:18.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:18.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:18.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:18.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:18.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:18.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:18.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:18.466 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 01:35:18.937 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 01:35:19.408 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 01:35:19.882 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 01:35:20.354 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 01:35:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 01:35:21.296 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 01:35:21.767 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 01:35:22.240 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 01:35:22.712 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 01:35:22.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:22.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:22.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:22.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:22.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:22.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:22.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:22.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:22.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:22.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:22.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:22.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:22.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:35:22.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:22.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:22.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:22.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:22.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:23.185 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 01:35:23.656 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 01:35:24.129 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 01:35:24.602 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 01:35:25.074 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 01:35:25.545 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 01:35:26.016 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 01:35:26.486 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 01:35:26.957 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 01:35:27.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:27.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:27.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:27.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:27.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:27.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:27.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:27.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:27.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:27.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:27.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:27.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:27.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:27.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:27.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:27.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:27.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:27.429 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 01:35:27.901 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 01:35:28.374 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 01:35:28.872 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 01:35:29.344 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 01:35:29.815 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 01:35:30.286 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 01:35:30.759 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 01:35:31.232 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 01:35:31.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:31.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:31.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:31.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:31.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:31.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:31.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:31.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:31.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:31.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:31.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:31.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:31.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:31.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:31.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:31.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:31.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:31.699 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 01:35:32.170 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 01:35:32.641 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 01:35:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 01:35:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 01:35:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 01:35:34.529 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 01:35:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 01:35:35.475 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 01:35:35.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:35.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:35.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:35.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:35.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:35.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:35.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:35.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:35.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:35.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:35.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:35.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:35.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:35.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:35.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:35.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:35.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:35.946 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 01:35:36.417 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 01:35:36.890 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 01:35:37.363 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 01:35:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 01:35:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 01:35:38.777 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 01:35:39.247 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 01:35:39.721 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 01:35:39.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:39.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:39.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:39.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:39.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:39.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:39.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:39.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:39.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:39.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:39.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:39.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:39.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:39.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:39.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:39.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:40.193 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 01:35:40.665 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 01:35:41.136 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 01:35:41.609 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 01:35:42.081 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 01:35:42.553 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 01:35:43.024 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 01:35:43.498 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 01:35:43.970 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 01:35:44.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:44.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:44.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:44.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:44.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:44.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:44.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:44.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:44.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:44.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:44.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:44.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:44.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:44.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:44.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:44.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:44.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:44.441 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 01:35:44.912 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 01:35:45.383 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 01:35:45.854 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 01:35:46.325 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 01:35:46.798 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 01:35:47.270 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 01:35:47.743 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 01:35:48.213 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 01:35:48.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:48.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:48.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:48.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:48.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:48.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:48.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:48.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:48.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:48.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:48.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:48.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:48.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:48.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:48.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:48.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:48.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:48.680 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 01:35:49.150 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 01:35:49.621 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 01:35:50.094 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 01:35:50.566 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 01:35:51.038 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 01:35:51.509 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 01:35:51.980 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 01:35:52.451 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 01:35:52.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:52.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:52.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:52.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:52.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:52.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:52.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:52.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:52.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:52.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:52.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:52.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:52.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:52.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:52.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:52.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:52.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:52.919 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 01:35:53.387 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 01:35:53.854 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 01:35:54.324 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 01:35:54.795 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 01:35:55.266 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 01:35:55.737 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 01:35:56.208 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 01:35:56.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:56.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:56.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:56.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:56.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:35:56.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:35:56.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:35:56.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:56.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:56.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:56.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:35:56.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:35:56.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:35:56.681 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 01:35:56.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:35:56.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:35:56.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:56.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:35:57.154 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 01:35:57.625 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 01:35:58.097 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 01:35:58.570 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 01:35:59.042 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 01:35:59.514 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 01:35:59.986 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 01:36:00.459 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 01:36:00.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:00.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:00.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:00.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:00.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:00.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:00.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:00.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:00.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:00.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:00.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:00.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:00.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:00.932 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 01:36:00.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:00.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:00.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:00.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:01.403 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 01:36:01.873 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 01:36:02.344 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 01:36:02.815 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 01:36:03.286 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 01:36:03.759 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 01:36:04.231 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 01:36:04.703 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 01:36:05.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:05.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:05.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:05.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:05.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:05.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:05.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:05.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:05.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:05.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:05.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:05.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:05.173 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 01:36:05.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:05.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:05.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:05.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:05.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:05.645 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 01:36:06.116 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 01:36:06.590 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 01:36:07.062 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 01:36:07.534 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 01:36:08.005 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 01:36:08.476 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 01:36:08.946 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 01:36:09.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:09.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:09.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:09.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:09.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:09.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:09.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:09.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:09.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:36:09.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:36:09.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:36:09.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:36:09.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:36:09.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:36:09.412 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:36:09.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:09.413 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:14.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:36:14.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:36:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:36:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:36:14.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:36:14.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:36:14.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:36:14.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:36:14.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:14.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:36:14.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:36:14.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:36:14.425 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:36:14.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:36:14.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:14.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:36:14.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:36:14.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:36:14.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:36:14.426 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:36:14.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:36:14.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:36:14.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:36:14.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:36:14.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:36:14.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:36:14.431 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:36:14.431 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:36:14.431 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:14.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:36:14.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:36:14.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:36:14.433 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:36:19.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:36:19.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:36:19.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:36:19.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:36:19.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:36:19.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:36:19.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:36:19.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:36:19.455 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:19.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:36:19.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:36:19.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:36:19.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:36:19.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:36:19.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:19.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:36:19.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:36:19.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:36:19.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:36:19.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:19.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:36:19.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:36:19.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:36:19.462 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:19.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:36:19.462 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:36:19.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:36:19.462 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:36:19.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:36:19.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:36:19.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:36:19.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:36:19.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:36:19.468 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:36:19.468 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:19.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:36:19.950 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:36:19.995 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:36:19.996 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:36:19.998 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:36:19.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:20.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:20.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:20.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:20.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:20.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:20.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:20.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:20.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:20.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:20.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:20.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:20.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:20.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:36:20.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:20.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:20.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:20.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:20.891 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:36:21.363 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:36:21.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:21.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:21.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:21.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:21.835 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:36:22.306 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:36:22.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:22.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:22.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:22.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:22.779 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:36:23.252 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:36:23.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:23.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:23.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:23.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:23.719 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:36:24.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:24.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:24.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:24.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:24.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:24.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:24.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:24.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:24.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:24.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:24.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:24.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:24.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:24.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:24.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:24.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:24.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:24.190 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:36:24.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:36:24.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:36:24.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:36:24.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:36:24.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:36:25.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:36:25.607 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:36:26.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:36:26.550 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:36:27.020 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:36:27.493 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:36:27.966 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:36:28.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:28.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:28.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:28.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:28.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:28.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:28.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:28.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:28.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:28.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:28.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:28.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:28.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:28.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:28.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:28.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:28.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:28.438 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:36:28.909 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:36:29.382 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:36:29.855 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:36:30.327 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:36:30.800 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:36:31.273 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:36:31.745 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:36:32.216 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:36:32.689 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:36:32.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:32.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:32.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:32.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:32.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:32.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:32.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:32.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:32.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:32.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:32.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:32.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:32.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:32.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:32.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:32.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:32.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:33.157 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:36:33.628 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:36:34.099 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:36:34.570 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:36:35.043 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:36:35.516 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:36:35.987 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:36:36.458 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:36:36.932 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:36:37.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:37.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:37.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:37.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:37.086 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=3810 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:37.086 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=3810 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:36:37.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:37.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:37.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:37.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:37.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:37.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:37.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:37.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:37.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:37.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:37.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:37.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:37.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:37.405 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:36:37.877 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:36:38.348 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:36:38.819 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:36:39.292 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:36:39.764 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:36:40.237 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:36:40.710 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:36:41.182 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:36:41.654 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:36:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:41.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:41.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:41.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:41.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:41.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:41.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:41.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:41.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:41.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:41.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:41.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:41.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:41.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:41.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:41.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:41.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:42.125 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:36:42.596 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:36:43.068 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:36:43.539 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:36:44.009 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:36:44.480 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:36:44.951 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:36:45.421 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:36:45.891 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:36:46.362 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:36:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:46.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:46.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:46.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:46.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:46.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:46.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:46.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:46.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:46.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:46.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:46.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:46.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:46.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:46.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:46.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:46.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:46.833 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:36:47.306 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:36:47.779 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:36:48.251 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:36:48.722 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:36:49.193 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:36:49.664 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:36:50.135 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:36:50.605 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:36:51.076 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:36:51.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:51.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:51.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:51.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:51.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:51.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:51.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:51.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:51.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:51.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:51.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:51.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:51.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:36:51.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:51.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:51.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:51.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:51.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:51.548 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:36:52.017 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:36:52.488 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:36:52.962 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:36:53.433 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:36:53.901 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 01:36:54.372 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 01:36:54.845 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 01:36:55.318 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 01:36:55.785 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 01:36:56.256 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 01:36:56.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:56.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:56.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:56.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:56.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:36:56.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:36:56.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:36:56.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:56.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:56.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:56.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:36:56.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:36:56.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:36:56.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:36:56.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:36:56.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:56.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:36:56.727 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 01:36:57.198 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 01:36:57.671 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 01:36:58.143 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 01:36:58.616 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 01:36:59.087 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 01:36:59.560 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 01:37:00.032 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 01:37:00.505 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 01:37:00.980 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 01:37:01.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:01.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:01.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:01.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:01.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:01.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:01.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:01.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:01.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:01.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:01.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:01.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:01.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:01.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:01.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:01.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:01.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:01.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:01.452 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 01:37:01.923 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 01:37:02.394 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 01:37:02.865 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 01:37:03.336 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 01:37:03.806 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 01:37:04.277 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 01:37:04.748 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 01:37:05.220 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 01:37:05.694 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 01:37:05.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:05.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:05.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:05.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:05.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:05.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:05.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:05.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:05.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:05.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:05.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:05.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:05.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:05.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:05.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:05.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:05.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:06.165 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 01:37:06.637 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 01:37:07.110 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 01:37:07.582 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 01:37:08.055 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 01:37:08.525 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 01:37:08.996 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 01:37:09.469 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 01:37:09.942 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 01:37:10.414 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 01:37:10.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:10.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:10.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:10.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:10.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:10.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:10.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:10.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:10.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:10.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:10.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:10.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:10.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:10.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:10.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:10.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:10.885 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 01:37:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 01:37:11.831 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 01:37:12.303 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 01:37:12.774 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 01:37:13.245 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 01:37:13.715 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 01:37:14.186 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 01:37:14.657 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 01:37:15.130 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 01:37:15.603 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 01:37:15.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:15.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:15.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:15.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:15.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:15.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:15.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:15.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:15.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:15.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:15.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:15.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:15.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:15.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:15.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:15.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:15.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:16.075 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 01:37:16.546 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 01:37:17.019 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 01:37:17.492 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 01:37:17.964 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 01:37:18.435 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 01:37:18.908 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 01:37:19.381 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 01:37:19.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:19.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:19.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:19.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:19.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:19.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:19.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:19.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:19.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:19.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:19.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:19.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:19.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:19.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:19.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:19.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:19.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 01:37:20.324 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 01:37:20.794 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 01:37:21.268 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 01:37:21.740 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 01:37:22.212 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 01:37:22.683 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 01:37:23.156 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 01:37:23.624 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 01:37:23.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:23.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:23.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:23.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:23.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:23.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:23.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:23.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:23.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:23.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:23.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:23.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:24.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:24.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:24.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:24.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:24.095 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 01:37:24.566 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 01:37:25.040 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 01:37:25.512 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 01:37:25.993 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 01:37:26.465 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 01:37:26.936 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 01:37:27.409 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 01:37:27.881 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 01:37:28.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:28.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:28.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:28.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:28.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:28.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:28.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:28.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:28.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:28.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:28.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:28.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:28.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:28.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:28.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:28.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:28.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:28.353 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 01:37:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 01:37:29.298 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 01:37:29.770 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 01:37:30.242 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 01:37:30.713 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 01:37:31.184 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 01:37:31.657 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 01:37:32.129 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 01:37:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:32.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:32.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:32.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:32.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:32.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:32.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:32.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:32.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:32.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:32.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:32.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:32.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:32.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:32.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:32.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:32.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:32.601 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 01:37:33.072 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 01:37:33.546 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 01:37:34.018 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 01:37:34.490 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 01:37:34.961 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 01:37:35.428 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 01:37:35.893 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 01:37:36.364 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 01:37:36.835 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 01:37:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:36.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:36.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:36.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:36.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:36.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:36.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:36.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:36.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:36.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:36.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:36.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:36.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:37.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:37.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:37.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:37.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:37.306 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 01:37:37.777 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 01:37:38.250 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 01:37:38.718 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 01:37:39.189 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 01:37:39.662 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 01:37:40.134 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 01:37:40.606 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 01:37:41.077 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 01:37:41.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:41.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:41.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:41.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:41.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:41.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:41.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:41.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:41.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:41.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:41.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:41.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:41.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:41.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:41.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:41.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:41.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:41.548 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 01:37:42.019 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 01:37:42.490 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 01:37:42.960 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 01:37:43.431 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 01:37:43.902 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 01:37:44.373 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 01:37:44.844 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 01:37:45.314 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-07 01:37:45.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:45.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:45.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:45.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:45.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:45.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:45.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:37:45.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:45.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:45.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:45.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:37:45.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:37:45.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:45.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:37:45.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:37:45.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:45.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:45.785 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-07 01:37:46.256 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-07 01:37:46.729 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-07 01:37:47.202 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-07 01:37:47.674 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-07 01:37:48.147 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-07 01:37:48.615 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-07 01:37:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-07 01:37:49.557 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-07 01:37:49.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:37:49.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:37:49.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:37:49.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:37:49.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:37:49.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:37:49.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:37:49.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:37:49.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:37:49.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:37:49.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:37:49.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:37:49.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:37:49.722 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:37:49.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:37:49.722 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.722 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:49.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:37:54.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:37:54.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:37:54.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:37:54.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:37:54.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:37:54.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:37:54.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:37:54.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:37:54.734 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:54.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:37:54.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:37:54.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:37:54.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:37:54.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:37:54.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:54.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:37:54.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:37:54.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:37:54.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:37:54.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:37:54.739 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:37:54.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:37:54.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:37:54.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:54.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:37:54.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:37:54.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:37:54.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:37:54.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:37:54.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:37:54.742 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:37:54.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:37:54.744 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:37:54.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:37:54.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:37:54.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:37:54.744 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:37:54.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:37:54.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:37:54.745 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:37:54.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:37:54.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:37:54.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:37:54.747 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:37:59.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:37:59.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:37:59.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:37:59.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:37:59.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:37:59.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:37:59.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:37:59.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:37:59.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:59.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:37:59.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:37:59.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:37:59.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:37:59.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:37:59.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:59.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:37:59.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:37:59.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:37:59.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:37:59.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:37:59.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:37:59.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:37:59.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:37:59.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:37:59.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:37:59.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:37:59.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:37:59.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:37:59.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:37:59.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:37:59.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:37:59.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:37:59.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:37:59.774 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:37:59.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:37:59.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:38:00.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:38:00.299 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:38:00.301 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:38:00.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:00.302 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:38:00.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:00.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:00.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:00.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:00.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:00.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:00.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:00.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:00.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:00.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:00.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:00.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:00.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:00.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:38:00.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:00.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:00.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:00.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:01.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:38:01.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:01.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:01.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:01.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:01.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:01.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:01.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:01.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:01.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:01.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:01.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:01.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:01.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:01.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:01.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:01.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:01.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:38:01.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:01.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:01.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:01.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:02.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:38:02.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:38:02.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:02.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:02.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:02.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:02.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:02.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:02.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:02.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:02.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:02.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:02.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:02.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:02.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:02.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:02.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:02.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:02.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:02.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:02.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:02.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:02.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:03.087 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:38:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:38:03.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:03.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:03.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:03.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:03.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:03.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:03.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:04.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:04.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:04.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:04.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:04.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:04.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:04.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:04.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:38:04.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:04.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:04.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:04.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:04.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:04.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:38:04.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:04.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:04.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:04.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:04.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:38:05.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:05.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:05.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:05.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:05.444 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:38:05.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:05.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:05.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:05.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:05.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:05.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:05.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:05.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:05.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:05.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:05.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:05.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:05.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:05.912 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:38:06.383 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:38:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:06.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:06.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:06.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:06.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:06.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:06.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:06.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:06.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:06.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:06.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:06.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:06.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:06.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:06.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:06.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:06.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:38:07.329 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:38:07.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:07.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:07.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:07.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:07.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:07.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:07.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:07.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:07.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:07.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:07.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:07.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:07.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:07.801 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:38:08.272 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:38:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:08.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:08.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:08.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:08.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:08.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:08.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:08.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:08.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:08.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:08.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:08.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:08.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:08.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:08.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:08.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:08.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:08.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:08.743 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:38:09.214 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:38:09.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:09.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:09.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:09.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:09.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:09.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:09.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:09.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:09.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:09.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:09.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:09.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:09.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:09.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:09.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:09.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:09.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:09.684 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:38:10.155 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:38:10.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:10.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:10.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:10.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:10.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:10.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:10.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:10.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:10.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:10.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:10.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:10.625 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:38:10.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:10.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:10.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:10.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:10.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:10.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:38:11.569 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:38:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:11.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:11.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:11.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:11.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:11.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:11.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:11.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:11.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:11.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:11.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:11.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:12.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:12.041 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:38:12.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:12.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:12.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:12.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:12.513 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:38:12.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:12.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:12.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:12.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:12.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:12.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:12.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:12.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:12.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:12.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:12.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:12.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:12.985 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:38:12.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:13.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:13.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:13.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:13.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:13.457 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:38:13.926 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:38:13.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:13.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:13.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:13.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:13.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:13.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:13.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:13.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:13.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:13.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:13.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:13.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:14.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:14.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:14.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:14.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:14.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:14.397 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:38:14.869 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:38:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:15.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:15.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:15.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:15.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:15.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:15.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:15.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:15.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:15.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:15.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:15.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:15.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:15.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:15.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:15.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:15.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:15.341 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:38:15.814 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:38:16.286 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:38:16.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:16.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:16.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:16.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:16.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:16.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:16.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:16.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:16.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:16.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:16.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:16.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:16.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:16.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:16.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:16.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:16.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:16.757 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:38:17.230 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:38:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:38:17.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:17.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:17.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:17.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:17.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:17.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:17.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:17.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:17.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:17.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:17.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:17.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:17.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:17.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:17.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:17.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:17.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:18.174 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:38:18.645 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:38:19.116 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:38:19.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:19.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:19.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:19.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:19.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:19.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:19.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:19.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:19.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:19.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:19.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:19.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:19.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:19.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:19.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:19.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:19.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:19.589 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:38:20.057 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:38:20.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:20.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:20.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:20.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:20.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:20.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:20.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:20.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:20.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:20.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:20.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:20.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:20.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:20.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:20.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:20.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:20.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:38:21.000 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:38:21.473 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:38:21.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:21.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:21.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:21.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:21.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:21.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:21.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:21.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:21.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:21.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:21.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:21.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:21.945 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:38:21.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:21.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:21.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:21.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:21.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:22.417 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:38:22.888 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:38:23.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:23.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:23.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:23.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:23.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:23.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:23.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:23.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:23.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:23.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:23.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:23.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:23.358 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:38:23.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:23.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:23.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:23.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:23.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:23.829 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:38:24.300 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:38:24.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:24.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:24.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:24.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:38:24.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:38:24.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:38:24.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:38:24.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:38:24.759 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:38:29.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:38:29.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:38:29.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:38:29.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:38:29.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:38:29.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:38:29.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:38:29.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:38:29.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:38:29.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:38:29.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:38:29.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:38:29.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:38:29.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:38:29.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:38:29.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:38:29.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:38:29.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:38:29.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:38:29.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:38:29.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:38:29.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:38:29.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:38:29.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:38:29.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:38:29.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:38:29.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:38:29.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:38:29.784 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:38:29.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:38:29.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:38:29.789 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:38:30.265 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:38:30.309 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:38:30.310 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:38:30.311 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:38:30.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:30.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:30.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:30.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:30.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:30.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:30.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:30.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:30.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:30.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:30.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:30.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:30.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:30.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:30.732 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:38:30.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:30.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:30.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:30.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:31.204 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:38:31.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:38:31.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:31.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:31.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:31.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:32.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:38:32.621 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:38:32.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:32.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:32.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:32.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:33.093 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:38:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:33.564 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:38:33.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:33.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:33.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:33.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:34.035 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:38:34.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:34.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:34.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:34.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:34.109 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:34.109 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:34.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:34.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:34.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:34.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:34.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:34.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:34.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:34.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:34.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:34.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:34.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:34.508 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:38:34.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:34.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:34.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:38:35.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:38:35.918 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:38:36.390 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:38:36.859 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:38:37.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:37.330 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:38:37.803 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:38:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:37.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:37.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:37.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:37.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:37.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:37.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:37.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:37.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:37.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:37.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:37.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:38.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:38.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:38.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:38.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:38.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:38:38.747 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:38:39.219 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:38:39.689 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:38:40.160 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:38:40.633 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:38:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:41.106 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:38:41.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:41.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:41.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:41.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:41.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:41.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:41.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:41.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:41.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:41.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:41.578 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:38:41.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:41.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:41.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:41.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:42.049 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:38:42.522 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:38:42.994 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:38:43.467 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:38:43.940 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:38:44.412 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:38:44.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:44.884 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:38:45.356 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:38:45.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:45.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:45.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:45.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:45.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:45.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:45.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:45.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:45.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:45.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:45.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:45.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:45.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:45.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:45.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:45.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:45.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:45.826 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:38:46.297 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:38:46.770 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:38:47.243 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:38:47.715 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:38:48.186 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:38:48.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:48.659 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:38:49.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:49.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:49.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:49.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:49.095 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=4177 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:49.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:49.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:49.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:49.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:49.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:49.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:49.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:49.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:49.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:49.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:49.131 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:38:49.603 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:38:50.074 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:38:50.545 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:38:51.018 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:38:51.491 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:38:51.963 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:38:52.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:52.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:52.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:52.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:52.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:52.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:52.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:52.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:52.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:52.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:52.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:52.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:52.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:52.435 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:38:52.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:52.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:52.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:52.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:52.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:52.908 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:38:53.380 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:38:53.851 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:38:54.322 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:38:54.795 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:38:55.268 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:38:55.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:55.740 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:38:56.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:56.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:56.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:56.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:56.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:38:56.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:56.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:56.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:56.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:38:56.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:38:56.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:38:56.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:38:56.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:38:56.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:56.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:56.211 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:38:56.684 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:38:57.156 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:38:57.628 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:38:58.099 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:38:58.572 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:38:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:38:59.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:38:59.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:38:59.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:38:59.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:38:59.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:38:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:38:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:38:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:38:59.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:38:59.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:38:59.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:38:59.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:38:59.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:38:59.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:38:59.452 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:38:59.452 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.452 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.452 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:38:59.453 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:04.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:39:04.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:39:04.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:39:04.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:39:04.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:39:04.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:39:04.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:39:04.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:39:04.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:04.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:39:04.465 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:39:04.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:39:04.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:39:04.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:39:04.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:04.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:39:04.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:39:04.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:39:04.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:39:04.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:39:04.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:39:04.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:39:04.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:04.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:39:04.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:39:04.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:39:04.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:04.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:39:04.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:39:04.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:39:04.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:39:04.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:39:04.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:39:04.478 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:39:04.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:04.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:39:04.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:39:05.005 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:39:05.008 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:39:05.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:05.010 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:39:05.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:05.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:05.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:05.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:05.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:05.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:05.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:05.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:05.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:05.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:05.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:05.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:05.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:05.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:39:05.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:05.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:05.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:05.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:05.898 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:39:06.368 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:39:06.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:06.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:06.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:06.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:06.840 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:39:07.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:39:07.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:07.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:07.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:07.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:07.781 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:39:08.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:08.251 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:39:08.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:08.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:08.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:08.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:08.718 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:39:08.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:08.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:08.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:08.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:08.792 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:08.792 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:08.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:08.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:08.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:08.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:08.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:08.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:08.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:08.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:08.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:08.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:08.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:09.189 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:39:09.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:09.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:09.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:09.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:09.662 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:39:10.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:39:10.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:39:11.071 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:39:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:39:11.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:12.010 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:39:12.480 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:39:12.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:12.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:12.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:12.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:12.627 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1768 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:12.628 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:12.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:12.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:12.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:12.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:12.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:12.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:12.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:12.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:12.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:12.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:39:13.425 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:39:13.897 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:39:14.368 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:39:14.839 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:39:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:39:15.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:39:16.251 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:39:16.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:16.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:16.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:16.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:16.474 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2600 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:16.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:16.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:16.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:16.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:16.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:16.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:16.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:16.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:16.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:16.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:16.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:16.722 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:39:16.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:17.193 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:39:17.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:17.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:17.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:17.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:17.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:17.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:17.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:17.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:17.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:17.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:17.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:17.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:17.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:17.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:17.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:17.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:17.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:17.663 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:39:18.134 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:39:18.605 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:39:19.076 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:39:19.547 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:39:20.017 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:39:20.488 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:39:20.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:20.958 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:39:21.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:21.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:21.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:21.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:21.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:21.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:21.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:21.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:21.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:21.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:21.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:21.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:21.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:21.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:39:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:39:22.371 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:39:22.842 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:39:23.313 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:39:23.778 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:39:24.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:24.250 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:39:24.720 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:39:24.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:24.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:24.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:24.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:24.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:24.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:24.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:24.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:24.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:24.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:24.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:24.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:24.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:24.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:24.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:25.191 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:39:25.664 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:39:26.137 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:39:26.608 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:39:27.075 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:39:27.545 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:39:27.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:28.017 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:39:28.487 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:39:28.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:28.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:28.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:28.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:28.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:28.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:28.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:28.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:28.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:28.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:28.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:28.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:28.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:28.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:28.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:28.958 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:39:29.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:29.429 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:39:29.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:29.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:29.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:29.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:29.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:29.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:29.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:29.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:29.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:29.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:29.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:29.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:29.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:29.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:29.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:29.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:29.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:29.900 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:39:30.371 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:39:30.841 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:39:31.312 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:39:31.783 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:39:32.256 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:39:32.729 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:39:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:33.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:33.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:33.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:33.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:33.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:33.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:33.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:33.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:33.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:33.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:33.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:33.201 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:39:33.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:33.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:33.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:33.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:33.671 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:39:34.145 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:39:34.618 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:39:35.090 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:39:35.563 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:39:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:39:36.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:36.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:36.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:36.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:36.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:36.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:36.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:36.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:36.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:36.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:36.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:36.508 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:39:36.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:36.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:36.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:36.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:36.978 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:39:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:39:37.924 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:39:38.396 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:39:38.867 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 01:39:39.338 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 01:39:39.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:39.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:39.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:39.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:39.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:39.777 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=7645 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:39.777 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=7645 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:39:39.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:39.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:39.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:39.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:39.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:39.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:39.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:39.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:39.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:39.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:39.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:39.812 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 01:39:40.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:40.284 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 01:39:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:40.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:40.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:40.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:40.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:40.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:40.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:40.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:40.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:40.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:40.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:40.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:40.756 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 01:39:40.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:40.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:40.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:40.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:40.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:41.227 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 01:39:41.700 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 01:39:42.173 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 01:39:42.645 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 01:39:43.116 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 01:39:43.587 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 01:39:43.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:44.060 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 01:39:44.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:44.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:44.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:44.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:44.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:44.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:44.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:44.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:44.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:44.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:44.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:44.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:44.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:44.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:44.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:44.532 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 01:39:45.004 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 01:39:45.475 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 01:39:45.949 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 01:39:46.421 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 01:39:46.893 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 01:39:47.364 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 01:39:47.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:47.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:47.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:47.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:47.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:47.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:47.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:47.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:47.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:47.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:47.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:47.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:47.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:47.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:47.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:47.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:47.836 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 01:39:48.309 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 01:39:48.781 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 01:39:49.252 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 01:39:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 01:39:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 01:39:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 01:39:50.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:51.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:51.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:51.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:51.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:51.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:51.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:51.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:51.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:51.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:51.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:39:51.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:51.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:51.143 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 01:39:51.615 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 01:39:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:52.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:52.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:52.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:52.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:52.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:52.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:52.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:52.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:39:52.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:39:52.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:39:52.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:39:52.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:39:52.024 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:39:52.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:39:57.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:39:57.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:39:57.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:39:57.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:39:57.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:39:57.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:39:57.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:39:57.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:39:57.040 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:57.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:39:57.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:39:57.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:39:57.045 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:39:57.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:39:57.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:57.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:39:57.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:39:57.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:39:57.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:39:57.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:57.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:39:57.048 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:39:57.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:39:57.048 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:57.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:39:57.049 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:39:57.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:39:57.049 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:39:57.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:57.051 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:39:57.051 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:39:57.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:39:57.051 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:39:57.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:39:57.051 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:39:57.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:39:57.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:39:57.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:57.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:39:57.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:39:57.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:39:57.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:39:57.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:39:57.055 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:39:57.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:39:57.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:39:57.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:39:57.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:39:57.582 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:39:57.584 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:39:57.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:39:57.586 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:39:57.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:39:57.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:39:57.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:39:57.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:39:57.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:39:57.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:39:57.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:39:57.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:39:58.006 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:39:58.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:58.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:58.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:58.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:58.476 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:39:58.947 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:39:59.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:39:59.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:39:59.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:39:59.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:39:59.413 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:39:59.883 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:40:00.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:00.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:00.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:00.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:40:00.821 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:40:01.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:01.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:01.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:01.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:01.292 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:40:01.763 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:40:02.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:02.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:02.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:02.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:02.233 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:40:02.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:40:03.170 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:40:03.641 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:40:04.112 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:40:04.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:40:05.052 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:40:05.519 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:40:05.989 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:40:06.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:06.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:06.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:06.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:06.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:06.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:06.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:06.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:06.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:06.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:06.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:06.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:06.384 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:40:06.385 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:06.385 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:06.385 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:06.385 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:06.386 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:06.386 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:06.386 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2025 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:11.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:11.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:11.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:11.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:11.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:11.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:11.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:11.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:11.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:11.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:11.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:40:11.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:40:11.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:40:11.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:11.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:11.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:11.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:40:11.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:11.399 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:40:11.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:11.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:11.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:40:11.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:11.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:40:11.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:40:11.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:11.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:11.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:11.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:40:11.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:11.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:40:11.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:11.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:40:11.407 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:40:11.407 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:40:11.407 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:11.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:40:11.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:40:11.930 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:11.930 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:40:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:40:11.932 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:40:11.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:11.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:11.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:40:11.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:40:11.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:40:11.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:40:11.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:40:11.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:40:12.356 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:40:12.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:12.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:12.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:12.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:12.821 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:40:13.287 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:40:13.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:13.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:13.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:13.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:13.754 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:40:14.220 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:40:14.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:14.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:14.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:14.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:14.686 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:40:15.154 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:40:15.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:15.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:15.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:15.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:15.621 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:40:16.087 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:40:16.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:16.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:16.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:16.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:16.553 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:40:17.022 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:40:17.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:40:17.955 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:40:18.421 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:40:18.887 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:40:19.352 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:40:19.819 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:40:20.286 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:40:20.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:20.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:20.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:20.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:20.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:20.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:20.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:20.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:20.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:20.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:20.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:20.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:20.670 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:40:20.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:20.671 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:20.671 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:20.671 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:20.671 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:20.671 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:20.671 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2023 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:25.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:25.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:25.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:25.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:25.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:25.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:25.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:25.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:25.683 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:25.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:25.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:40:25.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:40:25.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:40:25.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:25.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:25.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:25.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:40:25.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:25.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:40:25.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:25.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:40:25.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:40:25.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:25.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:25.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:25.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:40:25.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:25.691 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:40:25.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:25.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:40:25.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:40:25.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:25.694 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:25.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:25.694 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:40:25.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:25.694 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:40:25.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.697 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:40:25.698 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:40:25.698 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:25.703 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:40:26.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:40:26.224 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:26.226 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:40:26.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:40:26.229 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:40:26.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:26.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:26.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:40:26.647 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:40:26.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:26.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:26.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:26.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:27.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:40:27.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:40:27.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:40:27.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:40:27.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:40:27.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:40:27.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:40:27.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:27.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:27.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:27.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:28.047 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:40:28.518 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:40:28.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:28.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:28.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:28.984 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:40:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:40:29.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:29.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:29.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:29.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:29.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:40:30.391 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:40:30.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:30.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:30.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:30.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:30.863 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:40:31.333 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:40:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:40:32.275 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:40:32.746 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:40:33.216 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:40:33.687 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:40:34.158 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:40:34.629 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:40:35.099 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:40:35.570 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:40:36.040 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:40:36.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:40:36.983 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:40:37.456 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:40:37.928 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:40:38.400 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:40:38.871 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:40:39.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:39.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:39.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:39.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:39.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:39.057 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:40:39.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:39.057 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2898 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:39.057 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2898 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:39.057 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2898 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:39.057 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2898 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:39.057 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2898 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:44.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:44.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:44.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:44.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:44.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:44.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:44.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:44.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:44.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:44.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:44.067 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:40:44.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:40:44.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:40:44.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:44.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:44.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:44.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:40:44.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:44.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:40:44.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:44.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:44.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:40:44.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:44.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:40:44.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:40:44.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:44.072 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:44.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:44.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:40:44.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:44.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:40:44.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:44.074 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:40:44.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:40:44.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:40:44.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:40:44.074 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:40:44.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:40:44.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:40:44.075 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:44.080 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:40:44.557 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:40:44.596 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:44.597 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:40:44.599 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:40:44.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:40:44.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:44.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:44.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:40:44.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:40:44.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:40:44.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:40:44.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:40:44.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:40:45.024 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:40:45.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:45.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:45.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:45.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:45.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:40:45.646 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:45.968 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:40:46.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:46.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:46.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:46.168 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:46.441 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:40:46.689 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:46.913 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:40:47.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:47.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:47.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:47.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:40:47.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:40:48.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:48.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:48.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:48.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:48.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:40:48.705 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:48.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:40:49.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:49.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:49.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:49.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:49.238 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:49.276 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:40:49.748 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:40:49.760 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:50.220 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:40:50.278 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:50.693 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:40:51.165 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:40:51.637 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:40:52.110 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:40:52.284 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:52.583 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:40:53.055 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:40:53.525 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:40:53.996 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:40:54.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:54.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:54.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:54.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:54.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:54.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:54.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:54.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:54.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:54.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:54.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:54.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:54.342 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:54.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:40:59.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:40:59.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:40:59.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:59.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:59.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:59.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:59.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:40:59.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:59.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:59.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:40:59.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:40:59.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:40:59.361 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:40:59.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:59.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:59.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:40:59.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:40:59.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:40:59.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:40:59.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:40:59.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:40:59.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:40:59.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:59.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:59.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:40:59.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:40:59.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:40:59.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:40:59.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:59.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:40:59.367 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:40:59.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:40:59.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:40:59.371 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:40:59.371 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:40:59.371 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:40:59.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:40:59.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:40:59.889 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:40:59.890 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:40:59.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:40:59.891 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:40:59.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:40:59.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:40:59.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:40:59.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:40:59.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:40:59.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:40:59.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:40:59.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:40:59.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:40:59.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:40:59.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:40:59.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:40:59.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:41:00.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:00.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:00.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:00.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:00.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.791 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:41:00.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:00.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:00.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:00.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:00.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:00.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:00.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:00.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:00.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:00.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:01.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:41:01.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:01.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:01.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:01.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:01.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.724 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:41:01.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:01.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:01.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:01.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:01.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:01.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:01.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:01.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:01.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:01.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:01.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:02.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:02.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:02.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:02.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.195 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:41:02.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:02.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:02.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:02.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:02.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:02.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:02.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:02.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:02.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:02.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:02.665 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:41:02.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:02.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:02.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:02.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:02.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:02.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:02.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:02.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:02.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:02.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:02.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:03.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:03.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:03.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:03.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:03.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:03.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:03.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:03.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:03.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:03.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:03.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:03.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:03.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:03.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:03.117 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:41:03.117 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:03.120 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=814 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:08.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:08.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:08.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:08.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:08.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:08.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:08.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:08.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:41:08.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:41:08.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:41:08.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:08.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:08.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:08.125 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:41:08.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:08.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:41:08.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:08.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:41:08.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:41:08.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:08.128 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:08.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:08.128 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:41:08.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:08.128 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:41:08.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:08.131 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:41:08.131 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:41:08.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:08.131 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:08.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:08.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:41:08.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:08.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:41:08.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:08.134 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:41:08.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.135 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:41:08.135 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:41:08.136 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:41:08.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:08.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:08.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:41:08.616 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:41:08.665 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:41:08.667 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:41:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:08.669 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:41:08.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:08.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:08.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:08.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:08.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:08.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:08.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:08.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:08.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 01:41:08.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:08.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:08.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:08.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:09.089 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:41:09.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:09.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:09.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:09.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:09.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:41:10.035 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:41:10.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:10.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:10.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:10.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:10.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:41:10.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:10.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:10.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:10.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:10.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:10.783 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:41:10.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=572 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:41:15.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:15.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:15.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:15.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:15.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:15.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:15.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:15.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:15.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:15.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:15.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:41:15.801 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:41:15.801 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:41:15.802 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:15.802 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:15.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:15.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:41:15.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:15.803 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:41:15.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:15.804 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:41:15.804 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:41:15.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:15.805 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:15.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:15.805 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:41:15.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:15.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:41:15.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:15.807 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:41:15.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:41:15.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:15.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:15.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:15.807 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:41:15.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:15.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:41:15.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:15.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:41:15.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:41:15.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:41:15.811 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:41:15.811 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:41:15.811 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:41:15.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:15.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:15.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:15.813 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:41:20.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:20.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:20.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:20.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:20.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:20.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:20.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:20.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:20.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:20.830 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:41:20.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:41:20.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:41:20.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:20.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:20.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:20.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:41:20.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:20.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:41:20.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:20.834 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:41:20.835 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:41:20.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:20.835 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:20.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:20.835 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:41:20.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:20.835 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:41:20.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:20.837 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:20.837 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:41:20.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:41:20.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:41:20.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:41:20.840 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:41:20.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:20.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:41:21.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:41:21.364 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:41:21.364 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:41:21.366 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:41:21.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:21.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:41:21.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:21.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:21.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:21.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:22.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:41:22.723 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:41:22.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:22.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:22.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:22.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:23.186 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:41:23.649 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:41:23.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:23.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:23.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:23.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:24.112 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:41:24.576 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:41:24.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:24.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:24.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:24.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:25.039 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:41:25.502 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:41:25.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:25.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:25.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:25.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:41:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:41:26.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:26.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:26.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:26.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:26.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:26.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:26.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:26.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:26.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:26.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:26.859 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:41:31.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:31.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:31.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:31.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:31.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:31.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:31.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:31.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:31.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:31.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:31.875 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:41:31.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:41:31.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:41:31.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:31.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:31.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:31.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:41:31.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:31.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:41:31.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:31.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:41:31.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:41:31.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:31.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:31.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:31.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:41:31.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:31.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:41:31.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:31.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:41:31.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:41:31.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:31.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:31.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:31.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:41:31.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:31.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:41:31.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:41:31.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:41:31.886 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:41:31.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:31.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:41:32.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:41:32.412 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:41:32.414 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:41:32.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:32.416 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:41:32.832 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:41:32.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:32.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:32.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:32.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:33.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:41:33.759 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:41:33.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:33.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:33.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:33.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:34.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:41:34.686 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:41:34.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:34.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:34.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:34.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:35.149 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:41:35.612 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:41:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:35.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:36.076 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:41:36.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:41:36.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:36.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:36.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:36.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:37.002 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:41:37.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:37.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:37.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:37.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:37.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:37.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:37.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:37.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:37.430 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:41:42.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:42.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:42.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:42.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:42.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:42.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:42.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:42.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:42.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:42.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:42.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:41:42.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:41:42.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:41:42.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:42.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:42.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:42.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:41:42.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:42.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:41:42.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:42.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:41:42.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:41:42.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:42.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:42.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:42.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:41:42.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:42.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:41:42.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:42.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:41:42.456 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:41:42.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:42.456 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:42.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:42.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:41:42.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:42.457 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:41:42.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:42.459 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:41:42.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:42.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:41:42.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:41:42.460 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:41:42.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:42.461 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:41:42.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:42.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:42.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:42.462 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:42.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:41:47.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:41:47.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:47.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:47.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:47.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:47.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:41:47.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:47.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:47.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:41:47.484 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:41:47.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:41:47.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:41:47.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:47.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:47.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:41:47.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:41:47.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:41:47.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:41:47.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:47.490 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:41:47.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:41:47.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:47.490 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:47.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:41:47.490 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:41:47.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:41:47.491 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:41:47.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:47.492 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:41:47.492 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:41:47.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:47.492 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:41:47.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:41:47.493 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:41:47.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:41:47.493 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:41:47.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:47.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:41:47.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:41:47.496 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:41:47.496 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:41:47.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:41:47.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:41:48.022 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:41:48.024 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:41:48.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:41:48.026 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:41:48.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:41:48.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:41:48.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:41:48.450 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:41:48.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:48.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:48.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:48.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:48.923 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:41:49.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:41:49.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:41:49.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:41:49.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:41:49.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:41:49.396 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:41:49.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:49.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:49.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:49.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:49.869 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:41:50.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:41:50.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:50.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:50.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:50.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:50.806 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:41:51.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:41:51.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:51.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:51.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:51.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:51.737 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:41:52.203 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:41:52.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:41:52.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:41:52.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:41:52.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:41:52.669 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:41:53.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:41:53.603 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:41:54.068 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:41:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:41:55.000 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:41:55.466 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:41:55.933 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:41:56.402 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:41:56.868 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:41:57.335 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:41:57.805 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:41:58.273 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:41:58.744 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:41:59.217 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:41:59.689 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:42:00.161 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:42:00.634 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:42:01.107 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:42:01.579 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:42:02.050 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:42:02.521 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:42:02.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:02.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:02.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:02.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:02.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:02.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:02.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:02.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:02.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:02.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:02.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:02.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:02.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:02.733 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:07.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:07.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:07.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:07.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:07.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:07.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:07.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:07.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:07.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:07.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:07.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:42:07.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:42:07.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:42:07.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:07.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:07.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:07.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:42:07.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:07.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:42:07.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:07.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:42:07.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:42:07.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:07.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:07.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:07.752 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:42:07.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:07.752 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:42:07.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:07.754 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:42:07.754 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:42:07.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:07.754 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:07.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:07.754 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:42:07.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:07.754 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:42:07.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:07.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:42:07.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:42:07.757 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:42:07.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:42:07.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:42:07.758 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:42:07.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:07.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:42:08.240 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:42:08.288 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:08.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:08.292 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:08.295 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:42:08.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:08.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:08.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:42:08.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:08.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:08.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:08.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:42:08.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:42:08.378 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:08.382 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:08.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:08.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:08.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:08.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:08.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:08.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:42:08.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:08.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:08.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:08.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:09.179 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:42:09.650 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:42:09.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:09.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:09.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:09.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:10.123 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:42:10.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:42:10.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:10.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:10.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:10.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:11.068 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:42:11.541 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:42:11.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:11.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:11.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:11.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:12.014 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:42:12.486 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:42:12.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:12.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:12.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:12.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:12.957 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:42:13.430 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:42:13.903 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:42:14.375 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:42:14.846 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:42:15.318 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:42:15.789 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:42:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:42:16.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:16.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:16.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:16.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:16.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:16.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:16.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:16.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:16.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:16.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:16.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:16.411 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:16.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1870 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:21.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:21.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:21.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:21.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:21.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:21.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:21.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:21.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:21.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:21.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:21.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:42:21.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:42:21.431 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:42:21.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:21.432 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:21.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:21.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:42:21.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:21.433 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:42:21.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:21.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:42:21.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:42:21.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:21.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:21.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:21.436 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:42:21.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:21.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:42:21.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:21.437 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:42:21.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:42:21.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:21.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:21.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:21.438 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:42:21.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:21.438 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:42:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:21.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:42:21.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:42:21.443 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:42:21.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:21.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:42:21.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:42:21.976 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:21.978 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:21.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:21.981 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:42:22.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:22.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:22.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:42:22.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:22.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:22.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:22.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:42:22.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:42:22.016 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:22.018 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:22.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:22.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:22.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:22.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:22.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:22.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:42:22.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:22.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:22.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:22.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:22.863 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:42:23.334 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:42:23.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:23.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:23.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:23.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:23.805 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:42:24.276 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:42:24.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:24.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:24.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:24.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:24.747 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:42:25.219 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:42:25.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:25.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:25.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:25.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:25.691 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:42:26.164 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:42:26.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:26.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:26.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:26.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:26.636 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:42:27.109 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:42:27.582 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:42:28.054 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:42:28.525 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:42:28.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:42:29.471 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:42:29.943 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:42:30.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:30.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:30.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:30.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:30.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:30.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:30.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:30.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:30.046 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:42:30.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:30.047 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.047 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.047 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.047 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.047 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.047 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.048 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:30.048 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:35.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:35.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:35.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:35.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:35.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:35.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:35.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:35.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:35.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:42:35.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:42:35.062 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:42:35.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:35.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:35.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:35.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:42:35.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:35.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:42:35.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:35.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:42:35.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:42:35.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:35.065 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:35.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:35.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:42:35.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:35.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:42:35.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:35.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:35.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:42:35.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:35.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:42:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:42:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:42:35.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:42:35.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:42:35.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:42:35.070 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:42:35.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:35.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:42:35.553 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:42:35.600 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:35.602 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:35.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:35.604 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:42:35.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:35.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:35.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:42:35.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:35.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:35.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:35.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:42:35.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:42:35.645 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:35.648 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:35.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:35.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:35.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:35.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:35.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:36.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:42:36.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:36.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:36.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:36.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:36.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:42:36.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:42:37.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:37.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:37.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:37.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:37.442 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:42:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:42:38.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:38.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:38.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:38.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:38.380 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:42:38.847 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:42:39.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:39.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:39.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:39.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:39.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:42:39.788 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:42:40.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:40.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:40.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:40.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:40.259 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:42:40.730 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:42:41.200 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:42:41.671 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:42:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:42:42.613 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:42:43.084 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:42:43.554 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:42:43.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:43.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:43.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:43.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:43.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:43.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:43.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:42:43.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:43.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:43.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:43.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:42:43.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:42:43.687 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:43.688 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:43.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:43.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:43.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:43.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:43.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:44.020 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:42:44.491 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:42:44.962 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:42:45.433 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:42:45.905 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:42:46.374 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:42:46.847 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:42:47.316 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:42:47.787 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:42:48.258 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:42:48.731 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:42:49.201 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:42:49.674 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:42:50.146 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:42:50.620 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:42:51.092 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:42:51.565 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:42:51.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:51.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:51.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:51.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:51.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:51.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:51.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:51.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:51.711 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:42:51.711 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:51.711 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:42:56.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:42:56.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:42:56.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:56.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:56.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:56.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:56.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:42:56.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:56.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:56.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:42:56.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:56.721 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:42:56.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:42:56.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:56.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:42:56.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:42:56.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:56.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:42:56.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:42:56.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:42:56.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:42:56.725 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:42:56.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:42:56.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:42:57.207 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:42:57.251 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:57.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:57.254 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:57.257 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:42:57.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:42:57.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:42:57.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:42:57.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:57.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:57.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:57.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:42:57.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:42:57.299 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:42:57.302 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:42:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:42:57.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:42:57.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:42:57.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:57.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:42:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:42:57.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:57.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:57.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:57.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:58.146 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:42:58.616 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:42:58.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:58.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:58.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:58.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:42:59.087 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:42:59.558 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:42:59.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:42:59.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:42:59.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:42:59.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:00.031 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:43:00.504 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:43:00.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:00.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:00.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:00.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:00.976 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:43:01.447 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:43:01.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:01.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:01.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:01.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:01.920 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:43:02.393 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:43:02.865 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:43:03.338 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:43:03.811 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:43:04.283 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:43:04.754 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:43:05.225 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:43:05.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:05.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:05.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:05.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:05.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:05.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:05.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:43:05.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:05.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:05.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:05.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:43:05.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:43:05.361 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:05.365 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:05.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:05.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:05.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:05.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:05.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:05.697 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:43:06.171 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:43:06.643 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:43:07.114 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:43:07.587 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:43:08.059 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:43:08.529 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:43:08.997 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:43:09.469 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:43:09.941 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:43:10.414 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:43:10.887 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:43:11.359 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:43:11.832 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:43:12.304 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:43:12.775 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:43:13.248 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:43:13.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:13.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:13.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:13.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:43:13.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:43:13.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:43:13.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:43:13.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:43:13.391 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:43:18.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:43:18.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:43:18.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:43:18.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:43:18.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:43:18.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:43:18.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:43:18.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:43:18.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:18.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:43:18.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:43:18.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:43:18.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:43:18.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:43:18.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:18.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:43:18.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:43:18.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:43:18.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:43:18.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:18.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:43:18.418 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:43:18.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:43:18.418 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:18.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:43:18.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:43:18.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:43:18.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:43:18.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:18.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:43:18.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:43:18.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:43:18.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:18.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:43:18.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:43:18.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:43:18.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:43:18.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:43:18.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:43:18.425 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:43:18.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:43:18.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:43:18.950 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:18.951 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:18.952 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:43:18.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:18.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:18.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:18.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:43:18.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:18.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:18.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:18.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:43:18.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:43:19.000 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:19.003 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:19.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:19.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:19.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:43:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:19.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:19.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:19.846 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:43:20.317 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:43:20.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:20.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:20.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:20.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:20.788 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:43:21.261 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:43:21.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:21.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:21.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:21.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:21.734 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:43:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:43:22.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:22.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:22.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:22.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:22.679 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:43:23.152 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:43:23.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:23.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:23.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:23.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:23.621 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:43:24.091 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:43:24.564 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:43:25.037 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:43:25.509 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:43:25.979 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:43:26.450 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:43:26.921 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:43:27.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:27.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:27.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:27.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:27.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:27.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:27.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:43:27.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:27.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:27.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:27.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:43:27.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:43:27.056 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:27.059 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:27.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:27.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:27.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:27.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:27.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:27.392 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:43:27.863 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:43:28.334 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:43:28.803 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:43:29.275 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:43:29.746 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:43:30.217 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:43:30.688 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:43:31.160 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:43:31.633 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:43:32.105 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:43:32.576 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:43:33.046 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:43:33.518 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:43:33.983 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:43:34.455 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:43:34.925 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:43:35.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:35.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:35.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:35.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:35.078 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=3605 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:35.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:35.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:43:35.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:43:35.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:43:35.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:43:35.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:43:35.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:43:35.098 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:43:35.099 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.099 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.099 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.099 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.100 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.100 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.100 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.100 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.100 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.101 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.101 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.101 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:35.101 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:43:40.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:43:40.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:43:40.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:43:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:43:40.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:43:40.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:43:40.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:43:40.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:43:40.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:40.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:43:40.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:43:40.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:43:40.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:43:40.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:43:40.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:40.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:43:40.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:43:40.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:43:40.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:43:40.115 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:43:40.115 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:43:40.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:43:40.116 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:43:40.116 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:43:40.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:43:40.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:43:40.118 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:43:40.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:43:40.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:43:40.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:43:40.638 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:40.640 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:40.641 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:43:40.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:40.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:40.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:40.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:43:40.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:40.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:40.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:40.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:43:40.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:43:40.694 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:40.698 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:40.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:40.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:40.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:40.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:40.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:41.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:43:41.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:41.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:41.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:41.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:41.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:43:42.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:43:42.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:42.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:42.490 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:43:42.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:43:43.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:43.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:43.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:43.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:43.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:43:43.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:43:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:44.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:44.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:44.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:43:44.845 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:43:45.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:43:45.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:43:45.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:43:45.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:43:45.318 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:43:45.786 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:43:46.252 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:43:46.724 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:43:47.194 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:43:47.667 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:43:48.139 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:43:48.612 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:43:48.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:48.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:48.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:48.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:48.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:48.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:48.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:43:48.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:48.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:48.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:48.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:43:48.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:43:48.746 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:48.748 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:48.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:48.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:48.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:49.083 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:43:49.553 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:43:50.024 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:43:50.495 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:43:50.966 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:43:51.436 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:43:51.909 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:43:52.382 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:43:52.854 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:43:53.325 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:43:53.791 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:43:54.262 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:43:54.735 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:43:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:43:55.680 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:43:56.151 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:43:56.622 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:43:56.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:56.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:56.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:56.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:56.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:43:56.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:43:56.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:43:56.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:56.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:56.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:56.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:43:56.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:43:56.803 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:43:56.807 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:43:56.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:43:56.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:43:56.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:43:56.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:56.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:43:57.087 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:43:57.558 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:43:58.029 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:43:58.500 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:43:58.970 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:43:59.443 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:43:59.916 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:44:00.382 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:44:00.849 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:44:01.321 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:44:01.791 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:44:02.262 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:44:02.733 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:44:03.204 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:44:03.675 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:44:04.145 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:44:04.616 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:44:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:04.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:04.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:04.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:04.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:04.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:04.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:44:04.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:04.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:04.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:04.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:44:04.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:44:04.846 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:04.848 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:04.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:04.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:04.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:04.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:04.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:04.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:05.087 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:44:05.559 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:44:06.032 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:44:06.505 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:44:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:44:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:44:07.923 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:44:08.392 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:44:08.857 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:44:09.323 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:44:09.788 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:44:10.254 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:44:10.719 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:44:11.190 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:44:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:44:12.122 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:44:12.593 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:44:12.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:12.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:12.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:12.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:12.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:12.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:44:12.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:44:12.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:44:12.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:44:12.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:44:12.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:44:12.873 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:44:17.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:44:17.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:44:17.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:44:17.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:44:17.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:44:17.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:44:17.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:44:17.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:44:17.886 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:17.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:44:17.887 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:44:17.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:44:17.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:44:17.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:44:17.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:17.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:44:17.890 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:44:17.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:44:17.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:44:17.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:17.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:44:17.892 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:44:17.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:44:17.892 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:17.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:44:17.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:44:17.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:44:17.893 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:44:17.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:17.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:44:17.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:44:17.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:44:17.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:17.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:44:17.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:44:17.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:44:17.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:44:17.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:44:17.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:44:17.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:44:17.898 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:44:17.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:17.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:44:18.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:44:18.424 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:18.426 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:18.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:18.428 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:44:18.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:18.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:18.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:44:18.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:18.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:18.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:18.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:44:18.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:44:18.472 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:18.474 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:18.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:18.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:18.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:18.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:18.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:18.847 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:44:18.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:18.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:18.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:18.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:19.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:44:19.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:44:19.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:19.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:19.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:19.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:20.252 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:44:20.722 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:44:20.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:20.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:20.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:20.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:21.188 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:44:21.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:44:21.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:21.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:21.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:21.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:22.125 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:44:22.597 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:44:22.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:22.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:22.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:23.067 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:44:23.537 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:44:24.007 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:44:24.472 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:44:24.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:44:25.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:44:25.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:44:26.349 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:44:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:26.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:26.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:26.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:26.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:26.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:26.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:44:26.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:26.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:26.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:26.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:44:26.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:44:26.531 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:26.535 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:26.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:26.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:26.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:26.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:26.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:26.820 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:44:27.291 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:44:27.761 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:44:28.232 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:44:28.704 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:44:29.176 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:44:29.648 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:44:30.120 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:44:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:44:31.062 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:44:31.533 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:44:32.004 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:44:32.475 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:44:32.946 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:44:33.417 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:44:33.888 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:44:34.361 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:44:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:34.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:34.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:34.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:44:34.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:44:34.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:44:34.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:44:34.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:44:34.558 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:44:39.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:44:39.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:44:39.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:44:39.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:44:39.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:44:39.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:44:39.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:44:39.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:44:39.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:39.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:44:39.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:44:39.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:44:39.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:44:39.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:44:39.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:39.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:44:39.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:44:39.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:44:39.581 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:44:39.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:39.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:44:39.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:44:39.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:44:39.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:39.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:44:39.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:44:39.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:44:39.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:44:39.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:39.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:44:39.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:44:39.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:44:39.585 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:44:39.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:44:39.585 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:44:39.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:44:39.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:44:39.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:44:39.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:44:39.589 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:44:39.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:44:39.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:44:39.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:44:39.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:44:40.071 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:44:40.118 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:40.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:40.122 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:40.125 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:44:40.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:40.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:40.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:44:40.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:40.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:40.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:40.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:44:40.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:44:40.162 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:40.163 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:40.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:40.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:40.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:40.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:40.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:40.543 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:44:40.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:40.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:40.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:40.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:41.014 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:44:41.488 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:44:41.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:41.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:41.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:41.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:41.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:44:42.432 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:44:42.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:42.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:42.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:42.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:42.903 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:44:43.376 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:44:43.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:43.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:43.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:43.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:43.849 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:44:44.321 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:44:44.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:44:44.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:44:44.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:44:44.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:44:44.792 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:44:45.265 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:44:45.738 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:44:46.210 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:44:46.683 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:44:47.156 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:44:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:44:48.101 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:44:48.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:48.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:48.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:48.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:48.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:48.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:48.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:44:48.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:48.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:48.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:48.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:44:48.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:44:48.236 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:48.240 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:48.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:48.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:48.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:48.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:48.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:48.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:44:49.046 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:44:49.516 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:44:49.987 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:44:50.460 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:44:50.933 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:44:51.405 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:44:51.876 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:44:52.349 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:44:52.822 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:44:53.308 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:44:53.778 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:44:54.249 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:44:54.722 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:44:55.193 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:44:55.664 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:44:56.137 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:44:56.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:56.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:56.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:56.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:56.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:44:56.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:44:56.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:44:56.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:56.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:56.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:56.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:44:56.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:44:56.318 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:44:56.322 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:44:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:44:56.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:44:56.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:44:56.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:56.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:44:56.608 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:44:57.081 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:44:57.553 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:44:58.024 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:44:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:44:58.970 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:44:59.441 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:44:59.913 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:45:00.386 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:45:00.859 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:45:01.331 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:45:01.802 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:45:02.274 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:45:02.743 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:45:03.214 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:45:03.687 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:45:04.160 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:45:04.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:04.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:04.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:04.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:04.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:04.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:04.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:04.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:04.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:04.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:04.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:04.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:04.394 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:04.398 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:04.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:04.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:04.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:04.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:04.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:04.628 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:45:05.101 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:45:05.573 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:45:06.045 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:45:06.516 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:45:06.989 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:45:07.462 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:45:07.934 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:45:08.413 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:45:08.885 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:45:09.356 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:45:09.829 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:45:10.302 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:45:10.774 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:45:11.247 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:45:11.720 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:45:12.192 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:45:12.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:12.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:12.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:12.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:45:12.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:45:12.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:45:12.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:45:12.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:45:12.424 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:45:17.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:45:17.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:45:17.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:45:17.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:45:17.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:45:17.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:45:17.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:45:17.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:45:17.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:45:17.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:45:17.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:45:17.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:45:17.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:45:17.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:45:17.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:45:17.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:45:17.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:45:17.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:45:17.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:45:17.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:17.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:45:17.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:45:17.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:45:17.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:45:17.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:45:17.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:45:17.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:45:17.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:45:17.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:17.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:45:17.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:45:17.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:45:17.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:45:17.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:45:17.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:45:17.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:45:17.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:45:17.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:45:17.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:45:17.454 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:45:17.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:45:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:45:17.936 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:45:17.986 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:17.988 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:17.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:17.991 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:45:18.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:18.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:18.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:18.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:18.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:18.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:18.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:18.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:18.026 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:18.028 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:18.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:18.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:18.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:18.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:18.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:18.403 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:45:18.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:18.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:18.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:18.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:18.874 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:45:19.345 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:45:19.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:19.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:19.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:19.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:19.819 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:45:20.291 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:45:20.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:20.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:20.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:20.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:20.763 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:45:21.234 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:45:21.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:21.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:21.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:21.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:21.708 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:45:22.180 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:45:22.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:45:22.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:45:22.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:45:22.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:45:22.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:45:23.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:45:23.595 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:45:24.068 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:45:24.540 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:45:25.011 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:45:25.484 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:45:25.957 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:45:26.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:26.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:26.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:26.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:26.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:26.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:26.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:26.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:26.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:26.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:26.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:26.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:26.095 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:26.098 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:26.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:26.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:26.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:26.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:26.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:45:26.900 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:45:27.371 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:45:27.844 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:45:28.312 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:45:28.783 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:45:29.254 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:45:29.724 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:45:30.195 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:45:30.666 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:45:31.139 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:45:31.612 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:45:32.084 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:45:32.556 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:45:33.029 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:45:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:45:33.974 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:45:34.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:34.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:34.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:34.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:34.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:34.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:34.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:34.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:34.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:34.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:34.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:34.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:34.155 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:34.158 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:34.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:34.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:34.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:34.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:34.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:34.443 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:45:34.913 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:45:35.385 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:45:35.858 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:45:36.326 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:45:36.797 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:45:37.270 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:45:37.743 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:45:38.215 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:45:38.685 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:45:39.156 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:45:39.629 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:45:40.102 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:45:40.573 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:45:41.045 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:45:41.518 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:45:41.990 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:45:42.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:42.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:42.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:42.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:42.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:42.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:42.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:42.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:42.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:42.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:42.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:42.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:42.225 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:42.229 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:42.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:42.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:42.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:42.458 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:45:42.929 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:45:43.400 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:45:43.872 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:45:44.345 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:45:44.817 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:45:45.288 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:45:45.760 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:45:46.233 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:45:46.706 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:45:47.179 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:45:47.651 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:45:48.124 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:45:48.607 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:45:49.079 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:45:49.550 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:45:50.023 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:45:50.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:50.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:50.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:50.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:50.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:50.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:50.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:50.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:50.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:50.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:50.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:50.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:50.300 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:50.304 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:50.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:50.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:50.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:50.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:50.496 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:45:50.967 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:45:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:45:51.911 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 01:45:52.384 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 01:45:52.856 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 01:45:53.329 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 01:45:53.801 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 01:45:54.273 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 01:45:54.744 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 01:45:55.215 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 01:45:55.688 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 01:45:56.160 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 01:45:56.633 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 01:45:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 01:45:57.574 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 01:45:58.045 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 01:45:58.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:58.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:58.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:58.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:58.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:45:58.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:45:58.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:45:58.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:58.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:58.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:58.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:45:58.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:45:58.370 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:45:58.373 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:45:58.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:45:58.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:45:58.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:45:58.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:58.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:45:58.518 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 01:45:58.991 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 01:45:59.463 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 01:45:59.934 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 01:46:00.408 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 01:46:00.880 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 01:46:01.352 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 01:46:01.823 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 01:46:02.296 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 01:46:02.769 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 01:46:03.241 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 01:46:03.712 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 01:46:04.185 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 01:46:04.658 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 01:46:05.130 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 01:46:05.601 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 01:46:06.074 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 01:46:06.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:06.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:06.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:06.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:06.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:06.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:06.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:46:06.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:06.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:06.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:06.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:46:06.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:46:06.444 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:46:06.448 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:46:06.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:06.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:06.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:06.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:06.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:06.546 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 01:46:07.019 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 01:46:07.492 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 01:46:07.964 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 01:46:08.435 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 01:46:08.902 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 01:46:09.373 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 01:46:09.846 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 01:46:10.319 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 01:46:10.791 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 01:46:11.262 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 01:46:11.733 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 01:46:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 01:46:12.678 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 01:46:13.151 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 01:46:13.621 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 01:46:14.095 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 01:46:14.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:14.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:14.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:14.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:14.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:14.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:14.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:46:14.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:14.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:14.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:14.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:46:14.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:46:14.510 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:46:14.513 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:46:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:14.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:14.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:14.565 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 01:46:15.033 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 01:46:15.504 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 01:46:15.977 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 01:46:16.450 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 01:46:16.922 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 01:46:17.393 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 01:46:17.866 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 01:46:18.339 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 01:46:18.811 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 01:46:19.282 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 01:46:19.752 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 01:46:20.225 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 01:46:20.698 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 01:46:21.170 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 01:46:21.641 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 01:46:22.112 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 01:46:22.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:22.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:22.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:22.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:22.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:22.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:46:22.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:46:22.535 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:22.536 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=14068 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:27.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:46:27.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:46:27.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:27.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:27.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:27.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:27.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:27.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:46:27.547 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:27.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:46:27.548 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:46:27.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:46:27.549 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:46:27.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:46:27.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:46:27.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:46:27.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:27.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:46:27.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:46:27.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:46:27.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:27.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:27.551 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:46:27.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:46:27.551 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:46:27.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:46:27.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:46:27.553 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:46:27.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:46:27.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:27.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:46:28.035 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:46:28.084 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:46:28.087 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:46:28.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:28.089 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:46:28.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:28.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:28.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:46:28.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:28.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:28.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:28.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:46:28.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:46:28.126 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:46:28.129 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:46:28.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:28.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:28.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:28.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:28.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:28.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:46:28.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:28.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:28.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:28.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:28.976 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:46:29.444 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:46:29.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:29.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:29.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:29.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:29.915 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:46:30.389 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:46:30.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:30.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:30.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:30.861 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:46:31.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:46:31.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:31.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:31.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:31.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:46:32.279 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:46:32.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:32.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:32.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:32.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:32.751 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:46:33.222 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:46:33.693 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:46:34.166 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:46:34.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:46:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:46:35.582 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:46:36.054 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:46:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:36.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:36.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:36.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:36.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:36.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:36.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:46:36.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:36.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:36.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:36.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:46:36.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:46:36.189 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:46:36.191 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:46:36.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:36.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:36.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:36.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:36.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:36.521 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:46:36.989 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:46:37.460 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:46:37.931 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:46:38.401 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:46:38.872 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:46:39.343 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:46:39.814 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:46:40.285 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:46:40.756 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:46:41.226 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:46:41.698 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:46:42.169 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:46:42.641 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:46:43.114 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:46:43.586 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:46:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:46:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:44.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:44.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:44.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:44.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:44.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:44.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:44.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:44.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:44.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:44.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:44.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:44.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:46:44.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:46:44.219 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:46:44.219 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:44.219 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:49.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:46:49.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:46:49.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:49.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:49.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:49.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:49.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:49.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:46:49.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:49.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:46:49.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:46:49.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:46:49.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:46:49.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:46:49.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:49.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:49.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:46:49.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:46:49.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:46:49.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:49.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:46:49.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:46:49.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:46:49.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:49.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:49.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:46:49.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:46:49.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:46:49.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:49.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:46:49.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:46:49.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:46:49.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:46:49.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:49.238 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:46:49.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:46:49.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:46:49.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:46:49.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:46:49.242 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:46:49.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:46:49.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:46:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:46:49.770 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:46:49.771 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:46:49.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:49.773 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:46:49.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:49.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:49.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:46:49.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:49.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:49.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:49.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:46:49.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:46:49.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:49.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:46:49.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:46:49.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:49.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:50.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:46:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:50.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:50.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:50.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:46:51.134 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:46:51.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:51.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:51.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:51.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:46:52.080 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:46:52.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:52.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:52.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:52.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:52.552 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:46:53.023 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:46:53.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:53.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:53.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:53.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:53.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:46:53.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:46:54.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:54.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:54.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:54.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:54.431 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:46:54.902 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:46:55.372 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:46:55.845 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:46:56.319 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:46:56.791 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:46:57.262 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:46:57.735 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:46:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:46:57.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:46:57.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:46:57.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:46:57.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:46:57.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:46:57.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:46:57.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:46:57.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:46:57.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:46:57.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:46:57.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:46:57.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:46:57.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:46:57.851 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:46:57.851 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:02.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:02.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:02.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:02.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:02.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:02.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:02.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:02.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:02.865 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:02.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:02.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:47:02.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:47:02.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:47:02.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:02.868 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:02.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:02.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:47:02.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:02.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:47:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:02.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:02.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:47:02.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:02.872 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:02.872 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:47:02.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:47:02.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:47:02.875 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:02.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:02.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:47:03.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:47:03.402 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:47:03.404 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:47:03.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:47:03.407 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:47:03.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:03.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:03.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:47:03.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:03.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:47:03.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:47:03.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:47:03.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:47:03.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:47:03.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:47:03.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:47:03.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:03.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:47:03.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:03.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:03.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:03.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:04.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:47:04.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:47:04.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:04.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:04.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:04.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:05.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:47:05.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:47:05.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:05.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:05.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:05.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:06.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:47:06.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:47:06.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:06.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:06.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:06.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:07.128 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:47:07.601 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:47:07.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:07.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:07.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:07.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:08.074 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:47:08.544 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:47:09.015 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:47:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:47:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:47:10.432 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:47:10.904 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:47:11.375 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:47:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:47:11.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:11.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:11.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:11.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:11.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:11.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:11.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:11.481 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:47:16.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:16.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:16.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:16.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:16.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:16.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:16.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:16.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:16.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:16.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:16.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:47:16.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:47:16.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:47:16.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:16.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:16.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:16.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:47:16.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:16.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:47:16.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:16.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:16.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:47:16.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:16.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:16.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:47:16.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:47:16.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:47:16.507 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:47:16.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:16.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:47:16.989 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:47:17.035 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:47:17.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:47:17.038 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:47:17.039 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:47:17.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:17.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:17.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:47:17.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:17.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:47:17.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:47:17.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:47:17.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:47:17.456 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:47:17.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:17.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:17.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:17.928 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:47:18.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:47:18.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:18.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:18.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:18.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:18.870 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:47:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:47:19.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:19.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:19.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:19.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:19.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:47:20.288 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:47:20.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:20.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:20.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:20.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:20.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:47:21.228 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:47:21.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:21.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:21.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:21.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:21.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:47:22.172 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:47:22.640 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:47:23.111 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:47:23.578 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:47:23.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:23.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:23.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:23.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:23.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:23.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:23.723 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:23.724 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:28.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:28.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:28.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:28.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:28.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:28.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:28.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:28.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:28.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:28.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:28.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:47:28.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:47:28.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:47:28.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:28.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:28.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:28.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:47:28.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:28.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:47:28.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:28.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:47:28.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:47:28.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:28.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:28.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:28.745 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:47:28.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:28.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:47:28.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:28.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:28.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:47:28.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:28.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:47:28.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:47:28.749 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:47:28.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:28.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:47:29.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:47:29.262 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:47:29.263 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:47:29.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:47:29.263 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:47:29.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:29.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:29.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:47:29.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:29.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:47:29.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:47:29.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:47:29.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:47:29.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:47:29.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:29.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:29.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:29.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:30.169 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:47:30.640 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:47:30.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:30.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:30.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:30.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:31.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:47:31.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:47:31.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:31.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:31.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:31.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:32.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:47:32.529 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:47:32.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:32.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:32.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:32.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:33.000 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:47:33.472 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:47:33.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:33.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:33.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:33.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:33.945 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:47:33.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:33.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:33.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:33.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:33.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:33.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:33.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:33.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:33.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:33.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.979 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.980 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.980 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:33.980 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:47:34.424 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:47:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:47:35.383 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:47:35.863 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:47:36.343 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:47:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:47:37.305 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:47:37.785 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:47:38.265 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:47:38.742 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:47:38.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:38.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:38.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:38.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:38.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:38.981 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:47:38.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:38.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:38.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:38.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:38.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:38.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:38.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:38.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:38.992 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:38.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:47:38.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:38.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:38.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:47:38.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:38.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:47:38.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:47:38.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:38.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:38.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:38.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:47:38.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:38.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:47:38.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:38.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:47:38.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:47:38.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:38.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:47:38.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:47:38.999 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:47:38.999 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:47:38.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:38.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:38.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:39.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:39.000 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:39.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:47:44.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:47:44.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:44.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:44.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:44.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:44.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:44.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:47:44.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:47:44.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:47:44.019 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:47:44.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:44.019 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:44.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:47:44.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:47:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:47:44.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:47:44.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:44.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:47:44.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:47:44.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:44.022 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:44.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:47:44.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:47:44.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:47:44.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:47:44.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:44.023 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:47:44.023 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:47:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:44.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:47:44.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:47:44.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:47:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:47:44.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:47:44.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:47:44.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:47:44.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:47:44.027 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:47:44.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:47:44.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:47:44.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:47:44.555 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:47:44.557 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:47:44.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:47:44.559 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:47:44.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:47:44.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:47:44.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:47:44.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:47:44.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:47:44.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:47:44.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:47:44.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:47:44.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:47:45.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:45.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:45.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:45.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:45.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:47:45.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:47:46.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:46.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:46.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:46.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:46.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:47:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:47:47.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:47.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:47.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:47.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:47.339 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:47:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:47:48.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:48.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:48.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:48.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:48.283 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:47:48.754 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:47:49.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:47:49.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:49.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:47:49.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:47:49.227 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:47:49.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:47:50.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:47:50.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:50.643 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:47:51.116 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:47:51.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:51.588 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:47:52.060 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:47:52.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:52.531 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:47:53.004 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:47:53.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:53.475 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:47:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:47:54.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:54.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:54.415 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:47:54.889 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:47:55.360 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:47:55.825 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:47:56.289 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:47:56.752 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:47:57.215 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:47:57.678 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:47:58.142 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:47:58.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:47:58.610 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:47:59.081 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:47:59.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:47:59.554 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:48:00.026 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:48:00.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:00.498 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:48:00.969 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:48:01.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:01.443 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:48:01.915 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:48:02.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:02.387 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:48:02.858 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:48:03.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:03.331 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:48:03.803 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:48:04.275 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:48:04.746 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:48:05.219 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:48:05.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:05.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:05.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:05.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:05.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:48:05.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:48:05.351 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:48:10.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:48:10.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:48:10.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:10.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:10.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:10.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:10.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:10.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:48:10.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:10.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:48:10.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:48:10.369 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:48:10.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:48:10.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:48:10.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:10.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:10.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:48:10.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:48:10.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:48:10.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:10.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:48:10.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:48:10.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:48:10.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:10.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:10.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:48:10.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:48:10.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:48:10.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:10.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:48:10.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:48:10.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:48:10.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:10.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:10.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:48:10.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:48:10.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:48:10.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:48:10.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:48:10.378 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:48:10.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:10.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:10.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:48:10.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:48:10.900 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:48:10.901 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:48:10.902 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:48:10.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:10.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:10.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:10.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:48:10.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:10.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:10.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:10.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:48:10.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:48:10.951 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:48:10.955 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:48:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 01:48:10.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:10.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:10.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:10.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:11.325 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:48:11.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:11.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:11.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:11.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:11.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 01:48:11.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:11.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:11.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:11.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:11.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:11.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:48:11.766 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:48:11.766 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:48:16.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:48:16.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:48:16.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:16.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:16.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:16.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:16.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:16.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:48:16.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:16.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:48:16.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:48:16.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:48:16.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:48:16.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:48:16.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:16.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:16.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:48:16.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:48:16.787 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:48:16.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:16.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:48:16.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:48:16.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:48:16.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:16.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:16.790 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:48:16.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:48:16.790 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:48:16.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:48:16.792 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:48:16.792 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:48:16.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:16.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:48:16.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:48:16.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:48:16.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:48:16.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:48:16.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:48:16.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:48:16.795 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:48:16.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:16.800 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:48:17.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:48:17.317 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:48:17.319 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:48:17.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:17.321 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:48:17.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:17.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:17.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:48:17.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:17.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:17.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:17.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:48:17.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:48:17.369 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:48:17.372 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:48:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 01:48:17.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:17.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:17.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:17.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:17.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:48:17.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:17.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:17.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:17.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:18.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 01:48:18.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:18.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:18.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:18.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:18.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:18.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:48:18.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:48:18.191 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:48:23.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:48:23.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:48:23.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:23.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:23.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:23.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:23.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:48:23.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:48:23.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:23.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:48:23.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:48:23.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:48:23.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:48:23.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:48:23.229 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:23.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:48:23.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:48:23.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:48:23.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:48:23.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:23.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:48:23.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:48:23.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:48:23.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:23.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:48:23.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:48:23.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:48:23.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:48:23.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:23.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:48:23.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:48:23.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:48:23.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:48:23.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:48:23.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:48:23.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:48:23.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:48:23.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:48:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:48:23.243 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:48:23.243 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:48:23.243 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:48:23.248 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:48:23.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:48:23.773 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:48:23.775 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:48:23.777 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:48:23.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:23.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:23.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:23.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:48:23.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:23.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:23.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:23.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:48:23.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:48:23.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:23.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:23.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:23.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:23.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:24.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:48:24.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:24.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:24.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:24.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:24.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:48:25.131 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:48:25.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:25.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:25.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:25.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:25.604 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:48:26.077 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:48:26.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:26.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:26.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:26.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:26.550 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:48:27.023 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:48:27.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:27.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:27.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:27.496 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:48:27.968 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:48:28.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:48:28.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:48:28.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:48:28.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:48:28.441 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:48:28.914 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:48:29.386 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:48:29.857 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:48:30.330 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:48:30.803 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:48:31.275 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:48:31.746 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:48:32.219 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:48:32.692 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:48:33.164 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:48:33.634 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:48:34.108 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:48:34.580 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:48:35.053 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:48:35.524 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:48:35.997 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:48:36.470 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:48:36.941 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:48:37.413 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:48:37.886 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:48:38.358 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:48:38.823 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:48:39.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:39.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:39.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:39.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:39.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:39.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:39.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:48:39.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:39.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:39.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:39.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:48:39.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:48:39.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:39.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:39.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:39.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:39.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:39.292 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:48:39.763 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:48:40.236 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:48:40.709 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:48:41.181 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:48:41.652 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:48:42.125 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:48:42.598 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:48:43.070 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:48:43.541 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:48:44.012 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:48:44.484 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:48:44.954 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:48:45.424 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:48:45.895 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:48:46.366 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:48:46.839 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:48:47.311 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:48:47.784 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:48:48.257 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:48:48.730 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:48:49.202 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:48:49.675 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:48:50.147 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:48:50.620 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:48:51.091 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:48:51.564 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:48:52.037 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:48:52.509 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:48:52.982 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:48:53.453 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:48:53.926 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:48:54.398 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:48:54.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:54.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:54.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:54.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:54.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:48:54.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:48:54.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:48:54.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:54.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:54.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:54.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:48:54.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:48:54.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:48:54.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:48:54.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:48:54.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:54.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:48:54.871 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:48:55.343 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:48:55.816 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:48:56.289 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:48:56.762 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:48:57.234 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:48:57.705 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 01:48:58.176 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 01:48:58.646 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 01:48:59.117 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 01:48:59.588 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 01:49:00.059 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 01:49:00.529 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 01:49:01.000 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 01:49:01.471 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 01:49:01.942 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 01:49:02.413 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 01:49:02.883 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 01:49:03.355 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 01:49:03.824 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 01:49:04.295 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 01:49:04.766 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 01:49:05.237 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 01:49:05.708 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 01:49:06.179 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 01:49:06.649 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 01:49:07.120 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 01:49:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 01:49:08.062 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 01:49:08.532 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 01:49:09.003 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 01:49:09.476 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 01:49:09.948 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 01:49:10.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:10.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:10.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:49:10.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:49:10.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:49:10.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:49:10.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:49:10.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:10.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:49:10.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:49:10.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:49:10.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:49:10.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:10.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:10.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:49:10.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:49:10.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:10.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:10.421 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 01:49:10.892 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 01:49:11.362 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 01:49:11.833 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 01:49:12.304 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 01:49:12.775 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 01:49:13.246 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 01:49:13.718 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 01:49:14.186 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 01:49:14.658 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 01:49:15.131 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 01:49:15.604 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 01:49:16.076 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 01:49:16.547 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 01:49:17.018 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 01:49:17.488 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 01:49:17.961 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 01:49:18.434 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 01:49:18.906 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 01:49:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 01:49:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 01:49:20.324 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 01:49:20.796 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 01:49:21.265 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 01:49:21.736 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 01:49:22.208 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 01:49:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 01:49:23.149 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 01:49:23.615 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 01:49:24.081 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 01:49:24.552 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 01:49:25.022 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 01:49:25.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:25.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:25.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:49:25.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:49:25.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:25.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:25.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:25.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:25.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:25.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:25.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:25.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:25.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:49:25.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:49:25.462 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:49:25.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=13459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:49:25.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=13459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:49:25.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=13459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:49:25.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=13459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:49:25.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=13459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:49:25.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=13459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:49:30.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:49:30.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:49:30.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:30.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:30.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:30.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:30.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:30.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:49:30.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:30.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:49:30.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:49:30.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:49:30.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:49:30.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:49:30.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:30.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:30.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:49:30.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:49:30.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:49:30.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:30.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:49:30.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:49:30.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:49:30.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:30.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:30.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:49:30.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:49:30.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:49:30.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:49:30.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:49:30.481 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:49:30.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:49:30.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:49:30.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:49:30.485 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:49:30.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:30.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:30.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:49:30.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:49:30.488 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:49:35.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:49:35.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:49:35.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:35.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:35.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:35.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:35.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:35.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:49:35.503 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:35.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:49:35.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:49:35.505 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:49:35.505 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:49:35.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:49:35.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:35.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:35.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:49:35.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:49:35.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:49:35.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:35.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:49:35.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:49:35.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:49:35.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:35.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:35.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:49:35.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:49:35.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:49:35.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:35.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:49:35.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:49:35.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:49:35.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:35.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:35.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:49:35.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:49:35.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:49:35.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:49:35.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:49:35.512 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:49:35.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:35.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:35.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:35.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:49:35.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:49:36.035 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:49:36.036 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:49:36.038 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:49:36.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:36.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:49:36.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:49:36.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:49:36.076 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:49:36.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:36.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:49:36.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:49:36.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:49:36.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:49:36.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:36.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:49:36.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:49:36.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:36.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:36.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:49:36.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:36.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:36.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:49:37.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:49:37.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:37.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:37.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:37.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:37.879 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:49:38.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:49:38.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:38.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:38.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:38.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:38.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:49:39.287 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:49:39.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:39.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:39.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:39.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:39.758 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:49:40.228 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:49:40.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:40.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:40.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:40.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:40.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:49:41.170 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:49:41.643 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:49:42.116 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:49:42.588 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:49:43.061 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:49:43.529 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:49:44.000 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:49:44.471 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:49:44.942 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:49:45.415 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:49:45.888 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:49:46.360 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:49:46.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:46.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:46.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:49:46.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:49:46.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:46.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:46.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:46.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:46.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:46.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:46.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:46.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:46.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:49:46.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:49:46.491 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:49:51.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:49:51.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:49:51.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:51.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:51.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:51.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:51.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:49:51.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:49:51.508 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:51.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:49:51.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:49:51.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:49:51.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:49:51.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:49:51.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:51.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:49:51.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:49:51.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:49:51.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:49:51.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:51.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:49:51.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:49:51.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:49:51.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:51.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:49:51.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:49:51.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:49:51.516 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:49:51.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:51.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:49:51.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:49:51.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:49:51.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:49:51.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:49:51.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:49:51.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:49:51.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:49:51.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:49:51.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:49:51.522 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:49:51.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:49:51.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:49:52.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:49:52.046 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:49:52.048 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:49:52.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:52.050 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:49:52.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:49:52.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:49:52.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:49:52.091 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:49:52.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:52.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:49:52.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:49:52.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:49:52.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:49:52.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:49:52.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:49:52.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:49:52.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:52.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:49:52.477 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:49:52.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:52.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:52.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:52.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:52.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:49:53.419 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:49:53.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:53.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:53.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:53.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:53.889 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:49:54.363 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:49:54.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:54.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:54.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:54.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:54.835 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:49:55.307 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:49:55.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:55.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:55.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:55.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:55.778 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:49:56.249 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:49:56.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:49:56.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:49:56.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:49:56.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:49:56.720 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:49:57.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:49:57.666 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:49:58.138 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:49:58.609 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:49:59.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:49:59.550 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:50:00.023 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:50:00.491 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:50:00.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:50:01.433 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:50:01.904 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:50:02.375 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:50:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:50:02.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:02.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:02.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:50:02.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:02.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:02.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:02.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:50:02.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:50:02.983 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2479 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:02.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2480 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:07.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:50:07.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:50:07.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:07.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:07.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:07.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:50:07.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:07.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:50:07.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:50:07.996 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:50:07.997 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:50:07.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:50:07.997 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:07.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:07.997 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:50:07.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:50:07.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:50:07.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:07.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:50:07.998 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:50:07.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:50:07.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:07.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:07.999 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:50:07.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:50:07.999 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:50:07.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:50:08.000 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:50:08.000 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:50:08.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.002 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:50:08.003 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:50:08.003 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:50:08.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:08.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:08.007 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:50:08.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:50:08.531 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:50:08.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:08.535 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:08.538 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:50:08.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:50:08.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:50:08.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:50:08.580 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:08.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:08.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:50:08.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:50:08.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:50:08.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:50:08.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:08.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:50:08.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:50:08.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:08.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:08.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:50:09.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:09.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:09.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:09.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:50:09.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:50:09.915 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:10.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:10.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:10.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:10.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:10.362 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:50:10.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:50:11.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:11.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:11.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:11.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:11.308 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:50:11.780 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:50:12.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:12.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:12.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:12.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:12.251 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:50:12.722 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:50:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:13.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:13.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:13.195 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:50:13.668 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:50:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:50:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:50:15.082 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:50:15.555 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:50:16.028 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:50:16.500 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:50:16.973 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:50:17.446 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:50:17.918 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:50:18.389 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:50:18.862 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:50:19.335 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:50:19.807 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:50:20.279 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:50:20.751 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:50:21.225 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:50:21.697 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:50:22.170 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:50:22.643 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:50:23.115 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:50:23.586 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:50:24.057 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:50:24.528 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:50:25.000 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:50:25.473 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:50:25.946 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:50:26.417 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:50:26.888 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:50:27.358 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:50:27.829 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:50:28.300 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:50:28.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:28.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:28.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:50:28.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:28.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:28.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:28.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:50:28.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:50:28.659 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:28.659 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:33.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:50:33.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:50:33.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:33.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:33.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:33.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:33.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:33.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:50:33.673 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:33.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:50:33.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:50:33.675 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:50:33.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:50:33.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:50:33.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:33.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:33.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:50:33.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:50:33.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:50:33.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:33.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:50:33.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:50:33.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:50:33.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:33.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:33.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:50:33.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:50:33.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:50:33.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:50:33.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:50:33.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:50:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:50:33.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:50:33.682 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:50:33.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:33.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:33.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:33.686 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:50:34.164 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:50:34.206 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:50:34.207 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:34.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:34.208 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:50:34.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:50:34.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:50:34.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:50:34.227 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:34.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:34.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:50:34.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:50:34.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:50:34.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:50:34.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:34.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:50:34.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:50:34.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:34.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:34.636 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:50:34.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:34.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:34.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:34.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:35.107 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:50:35.121 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:35.578 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:50:35.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:35.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:35.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:35.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:36.051 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:50:36.081 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:36.524 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:50:36.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:36.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:36.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:36.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:36.996 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:50:37.047 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:37.469 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:50:37.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:37.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:37.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:37.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:37.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:50:38.013 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:38.414 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:50:38.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:38.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:38.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:38.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:38.885 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:50:38.974 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:39.356 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:50:39.829 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:50:39.934 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:40.302 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:50:40.774 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:50:40.899 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:41.248 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:50:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:50:41.866 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:42.193 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:50:42.666 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:50:42.826 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:43.139 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:50:43.611 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:50:43.792 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:44.082 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:50:44.553 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:50:44.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:44.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:44.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:50:44.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:50:44.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:44.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:44.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:44.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:44.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:44.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:44.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:44.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:44.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:50:44.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:50:44.660 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:44.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:50:49.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:50:49.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:50:49.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:49.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:49.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:49.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:49.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:50:49.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:50:49.674 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:49.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:50:49.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:50:49.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:50:49.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:50:49.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:50:49.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:49.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:50:49.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:50:49.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:50:49.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:50:49.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:50:49.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:50:49.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:50:49.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:49.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:50:49.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:50:49.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:50:49.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:50:49.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:50:49.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:50:49.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:50:49.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:50:49.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:50:49.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:50:49.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:50:49.689 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:50:49.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:50:49.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:50:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:50:49.694 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:50:50.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:50:50.222 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:50:50.224 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:50.227 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:50:50.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:50.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:50:50.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:50:50.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:50:50.253 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:50:50.255 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:50.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:50.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:50:50.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:50:50.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:50:50.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:50:50.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:50:50.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:50:50.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:50:50.266 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:50:50.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:50.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:50:50.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:50:50.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:50.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:50.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:50.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:51.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:50:51.124 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:50:51.583 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:50:51.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:51.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:51.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:51.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:52.056 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:50:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:50:52.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:52.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:52.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:52.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:53.002 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:50:53.473 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:50:53.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:53.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:53.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:53.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:53.946 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:50:54.419 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:50:54.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:50:54.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:50:54.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:50:54.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:50:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:50:55.364 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:50:55.837 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:50:56.310 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:50:56.782 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:50:57.255 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:50:57.728 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:50:58.201 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:50:58.674 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:50:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:50:59.619 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:51:00.090 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:51:00.563 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:51:00.760 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:01.036 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:51:01.508 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:51:01.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:51:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:51:02.925 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:51:03.397 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:51:03.867 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:51:04.334 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:51:04.805 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:51:05.278 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:51:05.751 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:51:06.223 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:51:06.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:06.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:06.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:06.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:06.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:06.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:06.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:06.553 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:51:06.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:11.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:11.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:11.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:11.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:11.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:11.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:11.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:11.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:11.570 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:11.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:11.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:51:11.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:51:11.574 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:51:11.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:11.574 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:11.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:11.574 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:51:11.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:11.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:51:11.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:11.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:11.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:51:11.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:11.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:51:11.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:51:11.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:11.579 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:11.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:11.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:51:11.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:11.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:51:11.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:51:11.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:51:11.583 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:51:11.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:11.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:51:12.066 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:51:12.110 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:51:12.112 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:12.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:12.114 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:51:12.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:12.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:12.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:12.156 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:12.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:12.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:12.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:12.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:12.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:12.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:12.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:12.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:12.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:12.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:12.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:51:12.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:12.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:12.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:12.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:13.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:51:13.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:51:13.504 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:51:13.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:13.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:13.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:13.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:51:14.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:51:14.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:14.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:14.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:14.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:14.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:51:15.367 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:51:15.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:15.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:15.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:15.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:15.835 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:51:16.306 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:51:16.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:16.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:16.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:16.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:16.779 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:51:17.252 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:51:17.724 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:51:18.195 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:51:18.668 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:51:19.141 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:51:19.613 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:51:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:51:20.555 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:51:21.026 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:51:21.496 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:51:21.967 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:51:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:22.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:22.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:22.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:22.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:22.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:22.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:22.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:22.233 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:22.234 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:27.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:27.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:27.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:27.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:27.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:27.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:27.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:27.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:27.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:27.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:27.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:51:27.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:51:27.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:51:27.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:27.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:27.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:27.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:51:27.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:27.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:51:27.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:27.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:51:27.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:51:27.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:27.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:27.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:27.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:51:27.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:27.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:51:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:27.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:51:27.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:51:27.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:27.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:27.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:27.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:51:27.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:27.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:51:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:51:27.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:51:27.254 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:51:27.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:27.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:51:27.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:51:27.778 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:51:27.780 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:27.781 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:51:27.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:27.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:27.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:27.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:27.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:27.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:27.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:27.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:27.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:27.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:27.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:27.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:27.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:51:28.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:28.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:28.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:28.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:28.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:28.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:28.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:28.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:28.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:28.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:28.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:28.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:28.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:28.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:28.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:28.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:28.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:28.675 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:51:28.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:28.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:28.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:28.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:28.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:28.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:28.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:28.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:28.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:28.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:28.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:28.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:28.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:28.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:29.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:29.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:29.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:29.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:29.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:29.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:29.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:29.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:29.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:29.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:29.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:29.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:29.146 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:51:29.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:29.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:29.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:29.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:29.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:29.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:29.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:29.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:29.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:29.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:29.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:29.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:29.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:29.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:29.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:29.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:29.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:29.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:29.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:29.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:29.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:29.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:29.553 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.553 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:29.554 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:34.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:34.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:34.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:34.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:34.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:34.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:34.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:34.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:34.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:34.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:34.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:51:34.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:51:34.565 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:51:34.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:34.565 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:34.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:34.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:51:34.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:34.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:51:34.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:34.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:34.566 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:51:34.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:34.567 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:34.567 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:51:34.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:34.568 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:51:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:51:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:51:34.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:51:34.568 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:51:34.569 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:51:34.569 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:51:34.569 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:34.574 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:51:35.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:51:35.096 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:51:35.099 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:35.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:35.101 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:51:35.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:35.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:35.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:35.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:35.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:35.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:35.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:35.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:35.143 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:51:35.145 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 01:51:35.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:35.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:35.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:35.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:35.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:35.524 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:51:35.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:35.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:35.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:35.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:35.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:35.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:35.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:35.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:35.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:35.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:35.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:35.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:35.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:35.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:35.548 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:51:35.548 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:35.548 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:35.548 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:35.548 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:40.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:40.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:40.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:40.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:40.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:40.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:40.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:40.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:40.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:40.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:40.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:40.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:40.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:51:40.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:40.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:40.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:51:40.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:40.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:40.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:51:40.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:40.559 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:51:40.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:51:40.560 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:51:40.560 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:51:40.560 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:40.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:51:41.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:51:41.081 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:51:41.082 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:41.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:41.083 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:51:41.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:41.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:41.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:41.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:41.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:41.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:41.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:41.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:41.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:41.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:41.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:41.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:41.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:41.511 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:51:41.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:41.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:41.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:41.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:41.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:51:42.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:51:42.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:42.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:42.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:42.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:42.928 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:51:43.400 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:51:43.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:43.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:43.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:43.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:43.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:51:44.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:44.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:44.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:44.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:44.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:44.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:44.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:44.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:44.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:44.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:44.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:44.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:44.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:44.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:51:44.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:44.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:44.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:44.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:44.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:44.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:44.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:44.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:51:45.289 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:51:45.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:45.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:45.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:45.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:45.759 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:51:46.230 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:51:46.701 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:51:47.172 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:51:47.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:47.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:47.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:47.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:47.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:47.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:47.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:47.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:47.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:47.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:47.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:47.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:47.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:47.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:47.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:47.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:47.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:47.641 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:51:47.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:48.108 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:51:48.579 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:51:49.050 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:51:49.517 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:51:49.981 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:51:50.453 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:51:50.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:50.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:50.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:50.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:50.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:50.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:50.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:50.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:50.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:50.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:50.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:50.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:51:50.923 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:51:50.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:50.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:50.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:50.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:50.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:51.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:51.395 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:51:51.868 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:51:52.340 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:51:52.812 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:51:53.283 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:51:53.754 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:51:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:54.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:54.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:54.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:54.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:54.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:54.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:54.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:54.103 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:51:54.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:54.104 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:51:59.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:51:59.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:51:59.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:59.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:59.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:59.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:59.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:51:59.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:59.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:59.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:51:59.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:51:59.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:51:59.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:51:59.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:59.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:59.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:51:59.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:51:59.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:51:59.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:51:59.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:59.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:51:59.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:51:59.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:59.123 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:51:59.123 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:51:59.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:51:59.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:51:59.126 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:51:59.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:51:59.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:51:59.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:51:59.658 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:51:59.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:51:59.661 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:51:59.665 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:51:59.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:51:59.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:51:59.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:51:59.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:51:59.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:51:59.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:51:59.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:51:59.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:52:00.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:52:00.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:00.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:00.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:00.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:00.546 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:52:01.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:52:01.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:01.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:01.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:01.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:01.490 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:52:01.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:52:02.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:02.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:02.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:02.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:02.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:52:02.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:52:03.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:03.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:03.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:03.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:03.381 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:52:03.853 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:52:04.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:04.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:04.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:04.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:04.324 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:52:04.797 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:52:05.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:52:05.741 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:52:06.212 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:52:06.686 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:52:07.154 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:52:07.624 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:52:08.095 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:52:08.566 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:52:09.037 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:52:09.510 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:52:09.983 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:52:10.455 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:52:10.926 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:52:11.399 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:52:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:52:12.343 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:52:12.814 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:52:13.287 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:52:13.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:52:13.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:52:13.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:52:13.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:52:13.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:52:13.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:52:13.574 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:52:13.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:13.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:18.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:52:18.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:52:18.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:52:18.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:52:18.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:52:18.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:52:18.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:52:18.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:52:18.590 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:18.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:52:18.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:52:18.592 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:52:18.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:52:18.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:52:18.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:18.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:52:18.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:52:18.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:52:18.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:52:18.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:18.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:52:18.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:52:18.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:52:18.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:18.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:52:18.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:52:18.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:52:18.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:52:18.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:18.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:52:18.597 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:52:18.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:52:18.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:18.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:52:18.598 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:52:18.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:52:18.598 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:52:18.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:52:18.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:52:18.600 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:52:18.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:52:18.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:18.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:52:19.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:52:19.125 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:52:19.127 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:52:19.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:52:19.128 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:52:19.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:52:19.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:52:19.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:52:19.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:52:19.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:52:19.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:52:19.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:52:19.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:52:19.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:52:19.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:52:19.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:52:19.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:52:19.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:52:19.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:52:19.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:19.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:19.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:19.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:20.026 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:52:20.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:52:20.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:20.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:20.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:20.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:20.971 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:52:21.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:52:21.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:52:21.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:52:21.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:52:21.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:52:21.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:52:21.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:52:21.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:52:21.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:52:21.442 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:52:21.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:21.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:21.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:21.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:21.914 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:52:22.386 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:52:22.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:22.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:22.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:22.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:22.857 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:52:23.330 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:52:23.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:23.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:23.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:23.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:23.798 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:52:24.269 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:52:24.743 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:52:25.215 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:52:25.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:52:26.160 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:52:26.633 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:52:27.105 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:52:27.578 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:52:28.050 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:52:28.522 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:52:28.995 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:52:29.468 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:52:29.940 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:52:30.411 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:52:30.884 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:52:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:52:31.829 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:52:32.301 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:52:32.774 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:52:33.246 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:52:33.744 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:52:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:52:34.689 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:52:35.161 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:52:35.630 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:52:35.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:52:35.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:52:35.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:52:35.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:35.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:35.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:35.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:35.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:52:35.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:52:35.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:52:35.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:52:35.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:52:35.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:52:35.931 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:52:35.931 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:35.931 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:35.931 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:35.931 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:35.931 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:52:40.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:52:40.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:52:40.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:52:40.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:52:40.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:52:40.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:52:40.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:52:40.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:52:40.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:40.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:52:40.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:52:40.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:52:40.948 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:52:40.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:52:40.948 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:40.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:52:40.949 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:52:40.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:52:40.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:52:40.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:52:40.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:52:40.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:52:40.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:40.953 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:52:40.953 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:52:40.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:52:40.953 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:52:40.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:52:40.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:52:40.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:52:40.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:52:40.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:40.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:52:40.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:52:40.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:52:40.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:52:40.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:52:40.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:52:40.957 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:52:40.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:52:40.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:52:40.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:52:41.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:52:41.483 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:52:41.484 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:52:41.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:52:41.485 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:52:41.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:52:41.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:52:41.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:52:41.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:52:41.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:52:41.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:52:41.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:52:41.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:52:41.907 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:52:41.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:41.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:41.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:41.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:42.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:52:42.847 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:52:42.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:42.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:42.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:42.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:43.314 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:52:43.786 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:52:43.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:43.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:43.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:43.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:44.258 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:52:44.728 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:52:44.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:52:45.670 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:52:45.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:52:45.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:52:45.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:52:45.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:52:46.142 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:52:46.615 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:52:47.087 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:52:47.558 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:52:48.029 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:52:48.500 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:52:48.971 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:52:49.441 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:52:49.912 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:52:50.383 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:52:50.854 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:52:51.324 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:52:51.797 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:52:52.270 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:52:52.742 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:52:53.215 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:52:53.683 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:52:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:52:54.628 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:52:55.100 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:52:55.572 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:52:56.043 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:52:56.517 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:52:56.989 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:52:57.461 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:52:57.932 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:52:58.404 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:52:58.871 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:52:59.339 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:52:59.811 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:53:00.281 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:53:00.755 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:53:01.227 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:53:01.699 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:53:02.170 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:53:02.643 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:53:02.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:53:02.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:53:02.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:02.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:02.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:02.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:02.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:53:02.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:53:02.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:53:02.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:53:02.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:53:02.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:53:02.985 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:53:02.985 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4767 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.985 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4767 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4767 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4767 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4767 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.986 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.987 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.987 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:02.987 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4768 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:53:07.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:53:07.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:53:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:53:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:53:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:53:07.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:53:07.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:53:07.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:53:07.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:07.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:53:07.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:53:07.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:53:07.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:53:07.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:53:07.992 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:07.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:53:07.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:53:07.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:53:07.993 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:53:07.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:53:07.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:53:07.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:53:07.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:53:07.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:53:07.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:53:07.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:53:07.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:53:07.998 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:53:07.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:08.003 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:53:08.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:53:08.524 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:53:08.527 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:53:08.528 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:53:08.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:53:08.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:53:08.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:53:08.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:53:08.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:53:08.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:53:08.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:53:08.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:53:08.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:53:08.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:53:09.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:09.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:09.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:09.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:09.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:53:09.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:53:10.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:10.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:10.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:10.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:10.365 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:53:10.838 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:53:11.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:11.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:11.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:11.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:11.310 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:53:11.781 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:53:12.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:12.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:12.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:12.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:12.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:53:12.722 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:53:13.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:13.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:13.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:13.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:13.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:53:13.666 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:53:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:53:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:53:15.084 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:53:15.555 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:53:16.023 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:53:16.494 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:53:16.964 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:53:17.435 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:53:17.908 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:53:18.377 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:53:18.848 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:53:19.321 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:53:19.793 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:53:20.265 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:53:20.736 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:53:21.209 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:53:21.682 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:53:22.154 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:53:22.627 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:53:23.099 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:53:23.571 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:53:24.042 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:53:24.515 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:53:24.988 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:53:25.459 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:53:25.930 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:53:26.403 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:53:26.876 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:53:27.348 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:53:27.819 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:53:28.291 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:53:28.764 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:53:29.235 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:53:29.707 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:53:30.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:53:30.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:53:30.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:30.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:30.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:30.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:30.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:53:30.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:53:30.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:53:30.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:53:30.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:53:30.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:53:30.020 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:53:35.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:53:35.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:53:35.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:53:35.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:53:35.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:53:35.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:53:35.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:53:35.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:53:35.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:35.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:53:35.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:53:35.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:53:35.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:53:35.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:53:35.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:35.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:53:35.032 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:53:35.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:53:35.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:53:35.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:53:35.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:53:35.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:53:35.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:53:35.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:53:35.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:53:35.036 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:53:35.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:53:35.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:53:35.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:53:35.561 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:53:35.563 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:53:35.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:53:35.565 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:53:35.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:53:35.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:53:35.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:53:35.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:53:35.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:53:35.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:53:35.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:53:35.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:53:35.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:53:36.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:36.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:36.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:36.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:36.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:53:36.928 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:53:37.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:37.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:37.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:37.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:53:37.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:53:38.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:38.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:38.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:38.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:38.342 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:53:38.815 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:53:39.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:39.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:39.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:39.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:39.287 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:53:39.758 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:53:40.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:53:40.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:53:40.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:53:40.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:53:40.230 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:53:40.703 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:53:41.175 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:53:41.648 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:53:42.121 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:53:42.593 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:53:43.066 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:53:43.538 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:53:44.010 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:53:44.481 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:53:44.953 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:53:45.425 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:53:45.897 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:53:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:53:46.840 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:53:47.313 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:53:47.786 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:53:48.257 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:53:48.729 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:53:49.201 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:53:49.672 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:53:50.140 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:53:50.612 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:53:51.085 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:53:51.557 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:53:52.029 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:53:52.500 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:53:52.973 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:53:53.445 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:53:53.917 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:53:54.388 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:53:54.861 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:53:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:53:55.806 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:53:56.276 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:53:56.747 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:53:57.220 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:53:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:53:58.165 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:53:58.638 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:53:59.111 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:53:59.583 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:54:00.054 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:54:00.525 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:54:00.998 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:54:01.470 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:54:01.942 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:54:02.413 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:54:02.884 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:54:03.354 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:54:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:54:04.299 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:54:04.767 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:54:05.238 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:54:05.711 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:54:06.184 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:54:06.656 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:54:07.127 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:54:07.601 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:54:08.073 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:54:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:54:09.009 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:54:09.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:54:09.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:54:09.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:09.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:09.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:09.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:09.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:09.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:09.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:09.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:09.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:09.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:09.073 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:54:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7359 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7360 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:14.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:14.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:14.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:14.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:14.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:14.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:14.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:14.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:14.082 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:14.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:14.082 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:54:14.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:54:14.084 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:54:14.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:14.084 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:14.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:14.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:54:14.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:14.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:54:14.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:14.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:54:14.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:54:14.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:14.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:14.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:14.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:54:14.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:14.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:54:14.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:14.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:54:14.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:54:14.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:14.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:14.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:14.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:54:14.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:14.088 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:54:14.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:54:14.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:54:14.091 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:54:14.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:14.096 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:54:14.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:54:14.620 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:54:14.623 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:54:14.625 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:54:14.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:54:14.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:54:14.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:54:14.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:54:14.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:54:14.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:54:14.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:54:14.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:54:14.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:54:15.045 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:54:15.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:15.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:15.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:15.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:15.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:54:15.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:54:16.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:16.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:16.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:16.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:16.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:54:16.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:54:17.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:17.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:17.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:17.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:17.404 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:54:17.874 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:54:18.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:18.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:18.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:18.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:54:18.820 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:54:19.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:19.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:19.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:19.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:19.291 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:54:19.763 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:54:20.235 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:54:20.707 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:54:21.179 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:54:21.651 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:54:22.121 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:54:22.594 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:54:23.067 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:54:23.538 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:54:24.009 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:54:24.480 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:54:24.953 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:54:25.425 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:54:25.897 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:54:26.368 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:54:26.839 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:54:27.305 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:54:27.771 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:54:28.242 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:54:28.711 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:54:29.177 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:54:29.643 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:54:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:54:30.574 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:54:31.043 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:54:31.514 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:54:31.987 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:54:32.460 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:54:32.932 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:54:33.405 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:54:33.874 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:54:34.344 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:54:34.815 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:54:35.286 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:54:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:54:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:54:36.704 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:54:37.174 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:54:37.645 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:54:38.116 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:54:38.589 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:54:39.062 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:54:39.534 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:54:40.005 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:54:40.475 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:54:40.946 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:54:41.419 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:54:41.892 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:54:42.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:54:42.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:54:42.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:42.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:42.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:42.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:42.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:42.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:42.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:42.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:42.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:42.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:42.118 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:54:42.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.118 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6068 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:42.119 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6069 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:47.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:47.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:47.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:47.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:47.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:47.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:47.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:47.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:47.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:47.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:54:47.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:54:47.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:54:47.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:47.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:47.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:47.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:54:47.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:47.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:54:47.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:47.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:54:47.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:54:47.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:47.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:47.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:47.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:54:47.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:47.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:54:47.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:47.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:47.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:54:47.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:47.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:54:47.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:54:47.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:54:47.143 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:54:47.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:47.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:54:47.624 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:54:47.663 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:54:47.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:54:47.667 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:54:47.670 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:54:47.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:47.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:47.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:47.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:47.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:47.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:47.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:47.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:47.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:47.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:47.686 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:47.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:52.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:52.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:52.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:52.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:52.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:52.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:52.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:52.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:52.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:52.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:52.699 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:54:52.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:54:52.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:54:52.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:52.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:52.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:52.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:54:52.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:52.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:54:52.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:52.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:54:52.706 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:54:52.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:52.706 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:52.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:52.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:54:52.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:52.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:54:52.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:52.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:54:52.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:54:52.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:52.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:52.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:52.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:54:52.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:52.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:54:52.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.712 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:54:52.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:54:52.713 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:54:52.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:52.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:52.717 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:54:53.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:54:53.242 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:54:53.244 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:54:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:54:53.246 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:54:53.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:53.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:53.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:53.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:53.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:53.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:53.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:53.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:53.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:53.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:53.260 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:54:58.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:58.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:58.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:58.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:58.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:58.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:58.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:58.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:58.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:58.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:54:58.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:54:58.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:54:58.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:54:58.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:58.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:58.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:58.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:54:58.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:54:58.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:58.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:54:58.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:54:58.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:54:58.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:58.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:54:58.275 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:54:58.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:54:58.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:54:58.278 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:54:58.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:54:58.282 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:54:58.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:54:58.800 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:54:58.802 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:54:58.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:54:58.804 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:54:58.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:54:58.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:54:58.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:54:58.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:54:58.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:54:58.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:54:58.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:54:58.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:54:58.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:54:58.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:54:58.825 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:54:58.825 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.825 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.825 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.826 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.826 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.826 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.826 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:54:58.826 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:03.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:03.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:03.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:03.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:03.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:03.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:03.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:03.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:03.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:03.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:03.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:55:03.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:55:03.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:55:03.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:03.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:03.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:03.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:55:03.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:03.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:55:03.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:03.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:55:03.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:55:03.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:03.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:03.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:03.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:55:03.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:03.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:55:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:03.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:55:03.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:55:03.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:03.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:03.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:03.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:55:03.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:03.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:55:03.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:55:03.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:55:03.850 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:55:03.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:03.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:55:04.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:55:04.378 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:55:04.380 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:55:04.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:55:04.382 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:55:04.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:04.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:04.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:55:04.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:55:04.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:55:04.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:55:04.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:55:04.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:55:04.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:55:04.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:04.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:04.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:04.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:05.276 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:55:05.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:55:05.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:05.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:05.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:05.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:06.221 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:55:06.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:55:06.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:06.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:06.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:06.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:07.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:55:07.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:55:07.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:07.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:07.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:07.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:08.105 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:55:08.577 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:55:08.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:08.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:08.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:08.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:09.048 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:55:09.521 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:55:09.993 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:55:10.465 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:55:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:55:11.409 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:55:11.881 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:55:12.353 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:55:12.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:12.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:12.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:12.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:12.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:12.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:12.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:12.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:12.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:12.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:12.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:12.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:12.447 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:55:17.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:17.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:17.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:17.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:17.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:17.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:17.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:17.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:17.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:17.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:17.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:55:17.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:55:17.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:55:17.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:17.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:17.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:17.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:55:17.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:17.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:55:17.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:17.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:55:17.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:55:17.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:17.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:17.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:17.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:55:17.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:17.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:55:17.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:17.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:17.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:55:17.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:55:17.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:55:17.486 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:55:17.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:17.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:17.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:17.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:17.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:55:17.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:55:18.015 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:55:18.017 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:55:18.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:55:18.019 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:55:18.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:18.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:18.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:55:18.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:55:18.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:55:18.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:55:18.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:55:18.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:55:18.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:55:18.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:18.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:18.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:18.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:18.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:55:19.381 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:55:19.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:19.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:19.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:19.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:19.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:55:20.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:55:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:20.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:20.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:20.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:55:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:55:21.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:21.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:21.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:21.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:21.740 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:55:22.208 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:55:22.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:22.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:22.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:22.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:22.679 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:55:23.152 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:55:23.625 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:55:24.097 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:55:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:55:25.041 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:55:25.513 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:55:25.985 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:55:26.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:26.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:26.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:26.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:26.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:26.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:26.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:26.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:26.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:26.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:26.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:26.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:26.072 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:26.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:31.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:31.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:31.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:31.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:31.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:31.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:31.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:31.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:31.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:31.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:31.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:55:31.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:55:31.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:55:31.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:31.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:31.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:31.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:55:31.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:31.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:55:31.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:31.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:31.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:55:31.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:31.095 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:55:31.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:55:31.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:31.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:31.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:31.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:55:31.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:31.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:55:31.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:31.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:55:31.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:55:31.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:55:31.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:55:31.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:55:31.099 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:55:31.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:31.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:31.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:31.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:55:31.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:55:31.624 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:55:31.625 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:55:31.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:55:31.626 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:55:31.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:31.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:31.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:55:31.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:55:31.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:55:31.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:55:31.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:55:31.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:55:32.049 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:55:32.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:32.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:32.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:32.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:32.521 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:55:32.994 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:55:33.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:33.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:33.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:33.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:33.466 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:55:33.938 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:55:34.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:34.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:34.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:34.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:34.409 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:55:34.882 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:55:35.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:35.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:35.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:35.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:35.355 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:55:35.827 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:55:36.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:36.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:36.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:36.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:36.298 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:55:36.771 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:55:37.244 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:55:37.715 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:55:38.187 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:55:38.659 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:55:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:55:39.604 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:55:39.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:39.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:39.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:39.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:39.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:39.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:39.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:39.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:39.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:39.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:39.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:39.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:39.698 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:55:39.698 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.699 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.700 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.701 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.701 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:39.701 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:44.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:44.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:44.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:44.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:44.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:44.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:44.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:44.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:44.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:44.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:44.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:44.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:44.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:55:44.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:44.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:44.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:55:44.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:44.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:44.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:55:44.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:55:44.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:55:44.709 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:55:44.709 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:55:44.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:44.714 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:55:45.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:55:45.234 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:55:45.235 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:55:45.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:55:45.236 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:55:45.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:45.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:45.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:55:45.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:55:45.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:55:45.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:55:45.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:55:45.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:55:45.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:55:45.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:45.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:45.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:45.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:46.129 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:55:46.592 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:55:46.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:46.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:46.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:46.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:47.057 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:55:47.529 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:55:47.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:47.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:47.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:47.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:48.002 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:55:48.474 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:55:48.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:48.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:48.946 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:55:49.419 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:55:49.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:49.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:49.892 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:55:50.364 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:55:50.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:55:51.296 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:55:51.767 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:55:52.240 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:55:52.713 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:55:53.184 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:55:53.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:53.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:53.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:53.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:53.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:53.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:53.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:53.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:53.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:53.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:53.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:53.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:53.304 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:55:53.305 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:53.305 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:55:58.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:55:58.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:55:58.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:58.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:58.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:58.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:58.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:55:58.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:58.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:58.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:55:58.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:55:58.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:55:58.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:55:58.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:58.321 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:58.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:55:58.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:55:58.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:55:58.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:55:58.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:58.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:55:58.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:55:58.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:58.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:58.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:55:58.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:55:58.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:55:58.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:55:58.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:58.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:55:58.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:55:58.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:58.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:55:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:55:58.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:55:58.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:55:58.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:55:58.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:58.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:55:58.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:55:58.330 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:55:58.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:55:58.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:55:58.811 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:55:58.854 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:55:58.855 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:55:58.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:55:58.858 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:55:58.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:55:58.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:55:58.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:55:58.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:55:58.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:55:58.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:55:58.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:55:58.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:55:59.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:55:59.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:55:59.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:55:59.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:55:59.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:55:59.744 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:56:00.216 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:56:00.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:00.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:00.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:00.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:00.687 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:56:01.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:56:01.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:01.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:01.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:01.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:01.628 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:56:02.099 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:56:02.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:02.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:02.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:02.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:02.570 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:56:03.040 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:56:03.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:03.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:03.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:03.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:03.511 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:56:03.984 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:56:04.457 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:56:04.929 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:56:05.400 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:56:05.873 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:56:06.345 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:56:06.817 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:56:06.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:56:06.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:56:06.910 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1858 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:06.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:06.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:06.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:56:06.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:56:06.914 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:06.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:11.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:56:11.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:56:11.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:11.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:11.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:11.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:11.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:11.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:56:11.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:11.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:56:11.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:56:11.930 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:56:11.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:56:11.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:56:11.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:11.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:11.931 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:56:11.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:56:11.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:56:11.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:56:11.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:56:11.933 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:56:11.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:56:11.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:56:11.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:56:11.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:11.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:56:11.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:56:11.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:56:11.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:56:11.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:56:11.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:56:11.938 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:56:11.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:11.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:56:12.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:56:12.458 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:56:12.460 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:56:12.461 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:56:12.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:56:12.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:56:12.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:56:12.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:56:12.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:56:12.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:56:12.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:56:12.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:56:12.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:56:12.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:56:12.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:12.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:12.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:12.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:13.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:56:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:56:13.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:13.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:13.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:13.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:14.298 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:56:14.772 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:56:14.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:14.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:14.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:14.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:15.245 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:56:15.716 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:56:15.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:15.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:15.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:15.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:16.187 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:56:16.658 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:56:16.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:16.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:16.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:17.129 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:56:17.599 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:56:18.071 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:56:18.544 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:56:19.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:56:19.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:56:19.955 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:56:20.427 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:56:20.896 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:56:21.366 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:56:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:56:22.308 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:56:22.779 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:56:23.250 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:56:23.720 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:56:24.191 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:56:24.665 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:56:25.133 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:56:25.601 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:56:26.065 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:56:26.533 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:56:27.002 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:56:27.473 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:56:27.946 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:56:28.419 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:56:28.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:56:28.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:56:28.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:28.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:28.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:28.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:28.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:28.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:28.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:28.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:28.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:56:28.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:56:28.531 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3595 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.531 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.532 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.532 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:28.532 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3596 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:33.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:56:33.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:56:33.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:33.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:33.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:33.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:33.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:33.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:56:33.542 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:33.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:56:33.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:56:33.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:56:33.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:56:33.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:56:33.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:33.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:33.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:56:33.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:56:33.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:56:33.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:56:33.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:56:33.546 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:56:33.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:33.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:56:33.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:56:33.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:56:33.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:33.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:33.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:56:33.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:56:33.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:56:33.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:56:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:56:33.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:56:33.550 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:56:33.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:33.554 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:56:34.032 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:56:34.072 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:56:34.073 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:56:34.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:56:34.074 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:56:34.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:56:34.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:56:34.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:56:34.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:56:34.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:56:34.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:56:34.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:56:34.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:56:34.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:56:34.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:34.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:34.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:34.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:34.971 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:56:35.444 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:56:35.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:35.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:35.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:35.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:35.917 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:56:36.389 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:56:36.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:36.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:36.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:36.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:36.862 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:56:37.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:56:37.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:37.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:37.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:37.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:37.807 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:56:38.280 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:56:38.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:38.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:38.748 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:56:39.219 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:56:39.692 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:56:40.164 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:56:40.636 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:56:41.109 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:56:41.582 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:56:42.054 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:56:42.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:56:42.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:56:42.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:42.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:42.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:42.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:42.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:42.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:42.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:42.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:42.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:56:42.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:56:42.149 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:42.150 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:56:47.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:56:47.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:56:47.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:47.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:47.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:47.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:47.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:56:47.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:56:47.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:47.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:56:47.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:56:47.158 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:56:47.158 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:56:47.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:56:47.158 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:47.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:56:47.158 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:56:47.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:56:47.159 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:56:47.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:56:47.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:56:47.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:56:47.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:47.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:56:47.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:56:47.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:56:47.161 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:56:47.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:56:47.161 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:56:47.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:56:47.162 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:56:47.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.163 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:56:47.164 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:56:47.164 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:56:47.164 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:56:47.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:56:47.168 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:56:47.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:56:47.688 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:56:47.690 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:56:47.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:56:47.693 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:56:47.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:56:47.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:56:47.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:56:47.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:56:47.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:56:47.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:56:47.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:56:47.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:56:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:56:48.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:48.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:48.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:48.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:48.587 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:56:49.057 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:56:49.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:49.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:49.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:49.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:56:50.001 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:56:50.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:50.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:50.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:50.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:56:50.945 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:56:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:51.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:51.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:51.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:56:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:56:52.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:56:52.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:56:52.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:56:52.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:56:52.358 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:56:52.829 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:56:53.302 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:56:53.770 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:56:54.241 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:56:54.712 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:56:55.185 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:56:55.658 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:56:56.130 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:56:56.601 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:56:57.074 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:56:57.546 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:56:58.018 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:56:58.489 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:56:58.962 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:56:59.435 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:56:59.907 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:57:00.379 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:57:00.852 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:57:01.324 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:57:01.795 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:57:02.266 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:57:02.737 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:57:03.207 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:57:03.678 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:57:03.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:03.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:03.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:03.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:03.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:03.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:03.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:03.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:03.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:03.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:03.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:03.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:03.757 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3588 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3588 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3588 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3588 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3588 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3588 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:03.757 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3589 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:08.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:08.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:08.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:08.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:08.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:08.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:08.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:08.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:08.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:08.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:08.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:08.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:08.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:08.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:08.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:08.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:08.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:08.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:08.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:08.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:08.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:08.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:08.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:08.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:08.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:08.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:08.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:08.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:08.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:08.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:08.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:08.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:08.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:08.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:08.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:08.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:08.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:08.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:08.782 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:08.782 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:08.782 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:08.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:08.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:09.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:09.306 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:09.307 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:09.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:09.309 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:09.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:09.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:09.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:09.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:09.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:09.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:09.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:09.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:09.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:09.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:09.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:09.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:09.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:09.347 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:09.347 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:09.347 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:14.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:14.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:14.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:14.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:14.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:14.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:14.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:14.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:14.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:14.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:14.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:14.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:14.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:14.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:14.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:14.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:14.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:14.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:14.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:14.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:14.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:14.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:14.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:14.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:14.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:14.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:14.365 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:14.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:14.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:14.847 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:14.888 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:14.890 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:14.891 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:14.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:14.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:14.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:14.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:14.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:14.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:14.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:14.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:14.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:14.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:14.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:14.953 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:14.953 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:14.956 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:19.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:19.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:19.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:19.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:19.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:19.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:19.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:19.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:19.964 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:19.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:19.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:19.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:19.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:19.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:19.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:19.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:19.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:19.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:19.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:19.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:19.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:19.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:19.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:19.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:19.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:19.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:19.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:19.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:19.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:19.974 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:19.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:19.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:19.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:19.974 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:19.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:19.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:19.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:19.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.978 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:19.978 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:19.978 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:19.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:19.983 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:20.461 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:20.512 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:20.514 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:20.515 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:20.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:20.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:20.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:20.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:20.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:20.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:20.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:20.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:20.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:20.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:20.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:20.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:20.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:20.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:20.561 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:25.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:25.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:25.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:25.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:25.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:25.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:25.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:25.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:25.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:25.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:25.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:25.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:25.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:25.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:25.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:25.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:25.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:25.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:25.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:25.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:25.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:25.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:25.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:25.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:25.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:25.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:25.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:25.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:25.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:25.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:25.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:25.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:25.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:25.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:25.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:25.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:25.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:25.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:25.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:25.586 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:25.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:25.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:26.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:26.118 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:26.120 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:26.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:26.123 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:26.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:26.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:26.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:26.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:26.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:26.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:26.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:26.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:26.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:26.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:26.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:26.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:26.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:26.162 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:26.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:26.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:26.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:26.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:26.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:26.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:26.164 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:31.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:31.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:31.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:31.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:31.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:31.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:31.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:31.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:31.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:31.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:31.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:31.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:31.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:31.176 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:31.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:31.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:31.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:31.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:31.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:31.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:31.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:31.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:31.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:31.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:31.179 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:31.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:31.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:31.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:31.180 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:31.180 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:31.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:31.180 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:31.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:31.180 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:31.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:31.180 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:31.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:31.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:31.183 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:31.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:31.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:31.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:31.712 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:31.714 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:31.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:31.717 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:31.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:31.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:31.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:31.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:31.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:31.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:31.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:31.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:31.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:31.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:31.764 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:31.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:36.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:36.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:36.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:36.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:36.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:36.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:36.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:36.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:36.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:36.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:36.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:36.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:36.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:36.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:36.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:36.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:36.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:36.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:36.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:36.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:36.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:36.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:36.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:36.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:36.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:36.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:36.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:36.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:36.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:36.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:36.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:36.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:36.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:36.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:36.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:36.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:36.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:36.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:36.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:36.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:36.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:36.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:36.792 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:36.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:36.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:36.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:37.276 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:37.325 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:37.327 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:37.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:37.330 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:37.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:37.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:37.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:37.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:37.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:37.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:37.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:37.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:37.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:37.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:37.384 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.384 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:37.385 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:57:42.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:57:42.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:57:42.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:42.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:42.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:42.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:42.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:57:42.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:42.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:42.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:57:42.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:57:42.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:57:42.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:57:42.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:42.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:42.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:57:42.407 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:57:42.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:57:42.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:57:42.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:42.408 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:57:42.408 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:57:42.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:42.409 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:42.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:57:42.409 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:57:42.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:57:42.409 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:57:42.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:42.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:57:42.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:57:42.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:42.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:57:42.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:57:42.411 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:57:42.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:57:42.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:57:42.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:42.414 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:57:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:57:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:57:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:57:42.414 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:57:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:57:42.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:57:42.415 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:57:42.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:57:42.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:57:42.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:57:42.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:57:42.897 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:57:42.949 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:57:42.951 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:57:42.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:57:42.953 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:57:42.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:57:42.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:57:42.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:57:42.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:57:42.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:57:42.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:57:42.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:57:42.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:57:43.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:57:43.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:43.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:43.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:43.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:43.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:57:44.308 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:57:44.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:44.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:44.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:44.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:44.781 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:57:45.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:57:45.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:45.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:45.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:45.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:45.724 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:57:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:57:46.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:46.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:46.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:46.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:46.669 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:57:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:57:47.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:57:47.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:57:47.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:57:47.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:57:47.615 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:57:48.087 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:57:48.559 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:57:49.032 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:57:49.505 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:57:49.977 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:57:50.448 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:57:50.921 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:57:51.393 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 01:57:51.865 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 01:57:52.336 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 01:57:52.807 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 01:57:53.280 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 01:57:53.753 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 01:57:54.225 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 01:57:54.697 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 01:57:55.169 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 01:57:55.638 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 01:57:56.108 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 01:57:56.581 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 01:57:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 01:57:57.525 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 01:57:57.997 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 01:57:58.470 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 01:57:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 01:57:59.414 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 01:57:59.885 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 01:58:00.356 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 01:58:00.827 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 01:58:01.298 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 01:58:01.769 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 01:58:02.241 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 01:58:02.714 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 01:58:03.186 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 01:58:03.657 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 01:58:04.131 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 01:58:04.603 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 01:58:05.075 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 01:58:05.549 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 01:58:06.021 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 01:58:06.493 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 01:58:06.967 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 01:58:07.439 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 01:58:07.911 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 01:58:08.382 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 01:58:08.853 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 01:58:09.326 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 01:58:09.798 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 01:58:10.270 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 01:58:10.741 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 01:58:11.214 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 01:58:11.687 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 01:58:12.159 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 01:58:12.630 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 01:58:13.102 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 01:58:13.575 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 01:58:14.047 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 01:58:14.518 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 01:58:14.990 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 01:58:15.463 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 01:58:15.935 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 01:58:16.406 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 01:58:16.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:58:16.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:58:16.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:16.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:16.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:16.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:16.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:16.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:16.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:16.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:16.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:16.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:16.445 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:58:16.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:16.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:16.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:16.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:21.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:21.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:21.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:21.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:21.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:21.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:21.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:21.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:21.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:21.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:21.455 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:58:21.457 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:58:21.457 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:58:21.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:21.457 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:21.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:21.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:58:21.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:21.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:58:21.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:21.459 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:58:21.459 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:58:21.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:21.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:21.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:21.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:58:21.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:21.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:58:21.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:21.462 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:21.462 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:58:21.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:58:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:58:21.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:58:21.465 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:58:21.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:58:21.947 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:58:21.994 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:58:21.997 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:58:21.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:58:21.998 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:58:22.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:58:22.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:22.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:22.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:22.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:22.890 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:58:23.363 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:58:23.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:23.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:23.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:23.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:23.836 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:58:24.308 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:58:24.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:24.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:24.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:24.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:24.779 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:58:25.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:25.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:25.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:25.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:25.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:25.027 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:25.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:30.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:30.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:30.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:30.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:30.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:30.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:30.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:30.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:30.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:30.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:30.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:58:30.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:58:30.045 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:58:30.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:30.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:30.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:30.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:58:30.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:30.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:58:30.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:30.049 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:30.049 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:58:30.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:30.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:30.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:58:30.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:30.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:58:30.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:58:30.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:58:30.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:58:30.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:58:30.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:58:30.056 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:58:30.056 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:58:30.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:30.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:30.061 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:58:30.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:58:30.586 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:58:30.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:58:30.589 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:58:30.593 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:58:31.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:58:31.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:31.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:31.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:31.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:58:31.930 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:58:32.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:32.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:32.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:32.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:58:32.861 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:58:33.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:33.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:33.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:33.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:33.333 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:58:33.806 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:58:34.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:34.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:34.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:34.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:34.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:58:34.754 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:58:35.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:35.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:35.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:35.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:35.225 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:58:35.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:58:36.172 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:36.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:36.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:36.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:36.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:36.610 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:36.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1422 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:41.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:41.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:41.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:41.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:41.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:41.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:41.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:41.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:41.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:41.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:41.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:58:41.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:58:41.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:58:41.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:41.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:41.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:41.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:58:41.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:41.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:58:41.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:41.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:58:41.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:58:41.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:41.630 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:41.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:41.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:58:41.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:41.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:58:41.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:41.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:58:41.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:58:41.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:41.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:41.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:41.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:58:41.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:41.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:58:41.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:41.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:58:41.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:58:41.635 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:58:41.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:41.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:58:42.118 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:58:42.160 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:58:42.162 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:58:42.165 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:58:42.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:58:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:58:42.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:42.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:42.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:42.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:43.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:58:43.536 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:58:43.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:43.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:43.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:43.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:44.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:58:44.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:58:44.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:44.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:44.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:44.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:44.954 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:58:45.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:58:45.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:45.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:45.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:45.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:45.896 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:58:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:58:46.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:46.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:46.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:46.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:46.839 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:58:47.302 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:58:47.765 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:48.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:48.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:48.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:48.179 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:48.179 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:53.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:53.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:53.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:53.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:53.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:53.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:53.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:53.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:53.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:53.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:58:53.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:53.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:58:53.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:58:53.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:53.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:58:53.195 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:58:53.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:53.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:58:53.196 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:58:53.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:53.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:58:53.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:58:53.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:58:53.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:58:53.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:58:53.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:58:53.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:58:53.198 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:58:53.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:58:53.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:58:53.678 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:58:53.721 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:58:53.723 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:58:53.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:58:53.725 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:58:54.150 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:58:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:54.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:54.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:54.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:54.621 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:58:55.094 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:58:55.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:55.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:55.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:55.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:55.567 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:58:56.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:58:56.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:56.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:56.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:56.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:56.514 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:58:56.986 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:58:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:57.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:57.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:57.459 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:58:57.932 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:58:58.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:58.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:58.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:58.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:58.403 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:58:58.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:58:59.350 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:58:59.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:58:59.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:58:59.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:58:59.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:58:59.742 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.742 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:58:59.743 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:04.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:04.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:04.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:04.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:04.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:04.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:04.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:04.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:04.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:04.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:04.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:04.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:04.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:04.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:04.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:04.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:04.760 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:04.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:04.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:04.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:04.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:04.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:04.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:04.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:04.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:04.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:04.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:04.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:04.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:04.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:04.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:04.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:04.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:04.765 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:04.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:04.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:05.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:05.287 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:05.288 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:05.289 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:05.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:05.711 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:59:05.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:05.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:05.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:05.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:06.174 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:59:06.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:59:06.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:06.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:06.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:06.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:07.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:59:07.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:59:07.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:07.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:07.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:07.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:08.027 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:59:08.491 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:59:08.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:08.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:08.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:08.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:08.954 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:59:09.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:09.417 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 01:59:09.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:09.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:09.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:09.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:09.881 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 01:59:10.344 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 01:59:10.807 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 01:59:11.271 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 01:59:11.734 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 01:59:12.197 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 01:59:12.661 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 01:59:13.124 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:13.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:13.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:13.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:13.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:13.323 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:13.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:13.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:13.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:13.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:13.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:13.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:13.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1881 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:18.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:18.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:18.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:18.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:18.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:18.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:18.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:18.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:18.341 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:18.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:18.341 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:18.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:18.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:18.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:18.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:18.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:18.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:18.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:18.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:18.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:18.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:18.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:18.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:18.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:18.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:18.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:18.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:18.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:18.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:18.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:18.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:18.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:18.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:18.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:18.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:18.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:18.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:18.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:18.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:18.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:18.356 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:18.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:18.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:18.839 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:18.883 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:18.885 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:18.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:18.887 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:19.311 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:59:19.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:19.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:19.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:19.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:19.786 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:59:20.258 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:59:20.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:20.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:20.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:20.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:59:21.205 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:59:21.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:21.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:21.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:21.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:21.678 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:59:22.151 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:59:22.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:22.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:22.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:22.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:22.623 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:22.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:22.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:22.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:22.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:22.904 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:22.904 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:22.904 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:22.904 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:22.904 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:22.904 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:22.904 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:22.905 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=981 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:27.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:27.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:27.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:27.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:27.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:27.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:27.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:27.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:27.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:27.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:27.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:27.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:27.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:27.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:27.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:27.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:27.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:27.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:27.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:27.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:27.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:27.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:27.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:27.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:27.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:27.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:27.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:27.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:27.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:27.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:27.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:27.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:27.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:27.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:27.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:27.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:27.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:27.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:27.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.930 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:27.930 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:27.930 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:27.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:27.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:28.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:28.460 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:28.461 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:28.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:28.463 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:28.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:28.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:28.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:28.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:28.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:28.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:28.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:28.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:28.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:28.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:28.481 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:28.482 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:33.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:33.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:33.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:33.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:33.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:33.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:33.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:33.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:33.490 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:33.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:33.490 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:33.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:33.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:33.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:33.492 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:33.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:33.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:33.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:33.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:33.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:33.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:33.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:33.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:33.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:33.496 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:33.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:33.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:33.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:33.499 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:33.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:33.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:33.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:34.025 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:34.026 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:34.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:34.027 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:34.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:34.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:34.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:34.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:34.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:34.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:34.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:34.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:34.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:34.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:34.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:34.042 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:34.042 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:34.042 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:34.042 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:34.043 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:34.043 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:34.043 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:39.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:39.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:39.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:39.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:39.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:39.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:39.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:39.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:39.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:39.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:39.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:39.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:39.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:39.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:39.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:39.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:39.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:39.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:39.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:39.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:39.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:39.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:39.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:39.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:39.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:39.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:39.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:39.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:39.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:39.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:39.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:39.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:39.068 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:39.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:39.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:39.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:39.551 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:39.600 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:39.602 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:39.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:39.605 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:39.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:39.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:39.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:39.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:39.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:39.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:39.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:39.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:39.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:39.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:39.623 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:39.623 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:44.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:44.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:44.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:44.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:44.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:44.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:44.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:44.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:44.635 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:44.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:44.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:44.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:44.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:44.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:44.639 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:44.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:44.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:44.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:44.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:44.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:44.641 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:44.641 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:44.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:44.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:44.643 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:44.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:44.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:44.646 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:44.646 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:44.651 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:45.129 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:45.172 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:45.174 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:45.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:45.176 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:45.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:59:45.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:59:45.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:59:45.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:59:45.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:59:45.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:59:45.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:59:45.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:59:45.601 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:59:45.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:45.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:45.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:45.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:46.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:59:46.545 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:59:46.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:46.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:46.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:46.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:47.018 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:59:47.490 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:59:47.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:47.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:47.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:47.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:47.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:59:48.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:59:48.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:59:48.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:59:48.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:59:48.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:59:48.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:59:48.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:48.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:48.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:48.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:48.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:48.299 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:48.299 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:53.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:53.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:53.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:53.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:53.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:53.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:53.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:53.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:53.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:53.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 01:59:53.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 01:59:53.316 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 01:59:53.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 01:59:53.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:53.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:53.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:53.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 01:59:53.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 01:59:53.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 01:59:53.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:53.319 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 01:59:53.319 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 01:59:53.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:53.319 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:53.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:53.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 01:59:53.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 01:59:53.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 01:59:53.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:53.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 01:59:53.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 01:59:53.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 01:59:53.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 01:59:53.326 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 01:59:53.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 01:59:53.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 01:59:53.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 01:59:53.851 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 01:59:53.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:53.853 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 01:59:53.856 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 01:59:53.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:59:53.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:59:53.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 01:59:53.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:59:53.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:59:53.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:59:53.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 01:59:53.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 01:59:54.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 01:59:54.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:54.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:54.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:54.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:54.745 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 01:59:55.218 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 01:59:55.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:55.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:55.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:55.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 01:59:56.163 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 01:59:56.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:56.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:56.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:56.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:56.636 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 01:59:56.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 01:59:56.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 01:59:56.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:59:56.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 01:59:57.109 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 01:59:57.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:57.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:57.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:57.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:57.581 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 01:59:57.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 01:59:57.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 01:59:57.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 01:59:57.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 01:59:57.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 01:59:57.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 01:59:57.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 01:59:57.601 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 01:59:57.601 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.601 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.601 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.601 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.601 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.602 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.602 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 01:59:57.602 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:02.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:02.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:02.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:02.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:02.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:02.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:02.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:02.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:02.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:02.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:02.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:00:02.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:00:02.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:00:02.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:02.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:02.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:02.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:00:02.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:02.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:00:02.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:02.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:00:02.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:00:02.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:02.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:02.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:02.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:00:02.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:02.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:00:02.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:02.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:00:02.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:00:02.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:02.627 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:02.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:02.627 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:00:02.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:02.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:00:02.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:00:02.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:00:02.630 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:00:02.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:02.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:00:03.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:00:03.160 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:00:03.162 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:00:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:03.164 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:00:03.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:03.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:03.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:00:03.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:03.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:03.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:03.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:00:03.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:00:03.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:00:03.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:03.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:03.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:03.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:04.050 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:00:04.523 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:00:04.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:04.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:04.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:04.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:04.996 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:00:05.468 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:00:05.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:05.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:05.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:05.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:05.941 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:00:06.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:06.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:06.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:06.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:06.414 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:00:06.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:06.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:06.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:06.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:06.886 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:00:07.357 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:00:07.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:07.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:07.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:07.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:07.830 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:00:08.303 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:00:08.770 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:00:09.241 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:00:09.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:00:10.187 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:00:10.659 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:00:11.130 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:00:11.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:11.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:11.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:11.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:11.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:11.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:11.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:11.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:11.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:11.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:11.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:11.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:11.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:11.245 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:11.245 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:16.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:16.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:16.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:16.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:16.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:16.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:16.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:16.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:16.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:16.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:16.259 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:00:16.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:00:16.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:00:16.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:16.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:16.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:16.264 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:00:16.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:16.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:00:16.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:16.266 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:00:16.266 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:00:16.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:16.266 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:16.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:16.266 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:00:16.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:16.267 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:00:16.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:16.269 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:00:16.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:00:16.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:16.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:16.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:16.270 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:00:16.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:16.270 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:00:16.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:16.273 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:00:16.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:00:16.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:00:16.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:00:16.273 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.274 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:00:16.274 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:00:16.274 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:00:16.275 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:16.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:16.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:16.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:16.279 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:00:16.757 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:00:16.804 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:00:16.806 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:00:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:16.808 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:00:16.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:16.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:16.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:00:16.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:16.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:16.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:16.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:00:16.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:00:17.229 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:00:17.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:17.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:17.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:17.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:17.700 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:00:18.173 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:00:18.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:18.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:18.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:18.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:18.646 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:00:19.117 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:00:19.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:19.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:19.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:19.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:19.589 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:00:19.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:19.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:19.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:19.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:20.060 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:00:20.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:20.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:20.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:20.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:00:20.996 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:00:21.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:21.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:21.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:21.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:21.467 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:00:21.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:00:22.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:00:22.885 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:00:23.358 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:00:23.826 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:00:24.297 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:00:24.765 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:00:24.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:24.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:24.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:24.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:24.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:24.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:24.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:24.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:24.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:24.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:24.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:24.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:24.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:24.897 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:24.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1867 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:29.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:29.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:29.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:29.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:29.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:29.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:29.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:29.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:29.909 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:29.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:29.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:00:29.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:00:29.912 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:00:29.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:29.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:29.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:29.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:00:29.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:29.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:00:29.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:29.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:29.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:00:29.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:29.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:00:29.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:00:29.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:29.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:29.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:29.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:00:29.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:29.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:00:29.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:29.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:00:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:00:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:00:29.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:00:29.921 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:00:29.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:00:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:29.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:00:30.404 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:00:30.449 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:00:30.451 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:00:30.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:30.454 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:00:30.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:30.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:30.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:00:30.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:30.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:30.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:30.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:00:30.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:00:30.871 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:00:30.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:30.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:30.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:30.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:31.343 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:00:31.816 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:00:31.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:31.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:31.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:31.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:32.288 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:00:32.760 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:00:32.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:32.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:32.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:32.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:33.231 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:00:33.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:33.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:33.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:33.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:33.704 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:00:33.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:33.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:33.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:33.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:34.177 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:00:34.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:00:34.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:34.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:34.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:34.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:35.120 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:00:35.593 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:00:36.066 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:00:36.537 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:00:37.008 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:00:37.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:00:37.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:00:38.425 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:00:38.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:38.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:38.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:38.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:38.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:38.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:38.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:38.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:38.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:38.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:38.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:38.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:38.538 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:00:38.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:38.539 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:43.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:43.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:43.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:43.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:43.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:43.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:43.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:43.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:43.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:43.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:43.554 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:00:43.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:00:43.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:00:43.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:43.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:43.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:43.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:00:43.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:43.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:00:43.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:43.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:00:43.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:00:43.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:43.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:43.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:43.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:00:43.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:43.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:00:43.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:43.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:43.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:00:43.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:00:43.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:00:43.564 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:43.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:00:44.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:00:44.092 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:00:44.095 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:00:44.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:44.097 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:00:44.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:44.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:44.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:00:44.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:44.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:44.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:44.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:00:44.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:00:44.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:44.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:44.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:44.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:44.515 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:00:44.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:44.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:44.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:44.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:44.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:00:45.459 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:00:45.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:45.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:45.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:45.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:45.932 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:00:46.403 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:00:46.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:46.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:46.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:46.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:46.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:00:47.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:00:47.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:47.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:47.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:47.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:00:48.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:00:48.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:48.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:48.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:48.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:48.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:00:49.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:49.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:49.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:49.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:49.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:49.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:49.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:49.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:49.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:49.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:49.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:49.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:49.154 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:49.154 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:00:54.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:00:54.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:00:54.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:54.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:54.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:54.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:54.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:00:54.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:54.162 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:54.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:00:54.163 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:00:54.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:00:54.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:00:54.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:54.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:54.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:00:54.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:00:54.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:00:54.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:00:54.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:54.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:00:54.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:00:54.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:54.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:00:54.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:00:54.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:54.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:00:54.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:00:54.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:00:54.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:00:54.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:00:54.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:00:54.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:00:54.171 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:00:54.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:00:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:00:54.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:00:54.692 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:00:54.693 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:00:54.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:00:54.694 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:00:54.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:00:54.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:00:54.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:00:54.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:54.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:54.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:54.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:00:54.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:00:55.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:00:55.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:55.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:55.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:55.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:55.592 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:00:56.066 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:00:56.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:56.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:56.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:56.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:56.538 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:00:57.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:00:57.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:57.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:57.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:57.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:57.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:00:57.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:00:57.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:00:57.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:57.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:00:57.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:00:58.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:58.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:58.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:58.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:58.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:00:58.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:00:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:00:59.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:00:59.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:00:59.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:00:59.370 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:00:59.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:01:00.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:01:00.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:00.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:00.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:00.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:00.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:00.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:00.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:00.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:00.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:00.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:00.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:00.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:00.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:00.377 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1340 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:00.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1341 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:05.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:05.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:05.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:05.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:05.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:05.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:05.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:05.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:05.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:05.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:05.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:01:05.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:05.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:05.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:05.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:05.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:05.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:05.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:01:05.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:05.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:01:05.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:01:05.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:01:05.384 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:01:05.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:05.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:01:05.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:01:05.899 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:01:05.900 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:01:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:05.900 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:01:05.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:05.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:05.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:01:05.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:01:05.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:01:05.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:01:05.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:01:05.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:01:06.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:01:06.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:06.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:06.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:06.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:06.778 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:01:07.243 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:01:07.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:07.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:07.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:07.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:07.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:01:08.175 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:01:08.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:08.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:08.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:08.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:08.640 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:01:09.104 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:01:09.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:09.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:09.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:09.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:09.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:09.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:09.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:09.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:09.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:09.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:09.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:09.144 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:09.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:01:14.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:14.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:14.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:14.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:14.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:14.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:14.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:14.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:14.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:14.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:14.147 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:01:14.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:01:14.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:01:14.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:14.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:14.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:14.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:01:14.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:14.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:01:14.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:14.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:14.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:01:14.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:14.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:14.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:01:14.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:14.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:01:14.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:01:14.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:01:14.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:01:14.152 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:01:14.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:01:14.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:14.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:01:14.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:01:14.665 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:01:14.665 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:01:14.666 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:01:14.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:14.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:14.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:14.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:01:14.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:01:14.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:01:14.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:01:14.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:01:14.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:01:15.082 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:01:15.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:15.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:15.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:15.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:15.544 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:01:16.009 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:01:16.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:16.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:16.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:16.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:16.472 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:01:16.935 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:01:17.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:17.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:17.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:17.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:17.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:01:17.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:01:18.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:18.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:18.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:18.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:18.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:18.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:18.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:18.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:18.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:18.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:18.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:18.172 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:01:23.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:23.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:23.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:23.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:23.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:23.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:23.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:23.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:23.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:23.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:23.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:23.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:23.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:01:23.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:23.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:23.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:01:23.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:23.182 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:23.182 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:01:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.184 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:01:23.184 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:01:23.185 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:01:23.185 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:23.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:23.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:23.189 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:01:23.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:01:23.696 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:01:23.696 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:01:23.696 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:01:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:23.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:23.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:23.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:01:23.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:01:23.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:01:23.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:01:23.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:01:23.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:01:23.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:23.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:23.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:23.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:23.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:23.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:23.972 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:01:28.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:28.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:28.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:28.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:28.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:28.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:28.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:28.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:28.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:28.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:28.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:28.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:28.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:01:28.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:28.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:28.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:01:28.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:28.981 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:28.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:01:28.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:28.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:01:28.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:01:28.984 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:01:28.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:28.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:01:29.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:01:29.495 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:01:29.495 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:01:29.496 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:01:29.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:29.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:29.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:29.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:01:29.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:01:29.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:01:29.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:01:29.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:01:29.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:01:29.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:29.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:29.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:29.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:29.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:29.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:29.725 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:01:34.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:34.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:34.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:34.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:34.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:34.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:34.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:34.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:34.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:34.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:34.732 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:34.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:34.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:01:34.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:34.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:34.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:01:34.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:34.735 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:34.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:01:34.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:34.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:01:34.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:01:34.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:01:34.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:01:34.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:01:34.737 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:01:34.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:34.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:01:35.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:01:35.249 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:01:35.250 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:01:35.250 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:01:35.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:35.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:35.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:35.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:01:35.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:01:35.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:01:35.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:01:35.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:01:35.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:01:35.672 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:01:35.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:35.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:35.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:35.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:36.138 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:01:36.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:01:36.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:36.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:36.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:36.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:37.070 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:01:37.536 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:01:37.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:37.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:37.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:37.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:38.002 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:01:38.467 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:01:38.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:38.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:38.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:38.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:38.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:01:39.399 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:01:39.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:39.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:39.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:39.865 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:01:40.331 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:01:40.795 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:01:41.257 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:01:41.719 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:01:42.181 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:01:42.643 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:01:43.105 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:01:43.567 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:01:43.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:43.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:43.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:43.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:43.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:43.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:43.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:43.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:43.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:43.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:43.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:43.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:43.898 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:01:48.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:48.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:48.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:48.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:48.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:48.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:48.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:48.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:48.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:48.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:01:48.904 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:01:48.904 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:01:48.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:01:48.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:48.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:48.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:48.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:01:48.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:01:48.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:01:48.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:48.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:01:48.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:01:48.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:48.907 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:01:48.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:01:48.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:01:48.909 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:01:48.909 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:01:48.909 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:01:48.914 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:01:49.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:01:49.421 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:01:49.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:01:49.422 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:01:49.423 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:01:49.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:49.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:49.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:01:49.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:01:49.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:01:49.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:01:49.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:01:49.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:01:49.844 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:01:49.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:49.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:49.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:49.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:50.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:01:50.775 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:01:50.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:50.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:50.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:50.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:51.241 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:01:51.707 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:01:51.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:51.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:51.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:51.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:52.171 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:01:52.638 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:01:52.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:52.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:52.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:52.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:53.101 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:01:53.563 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:01:53.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:53.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:53.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:53.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:54.025 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:01:54.488 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:01:54.950 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:01:55.412 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:01:55.874 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:01:56.336 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:01:56.798 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:01:57.261 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:01:57.726 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:01:58.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:01:58.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:01:58.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:01:58.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:01:58.056 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:03.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:03.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:03.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:03.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:03.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:03.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:03.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:03.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:03.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:03.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:03.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:03.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:03.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:02:03.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:03.068 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:03.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:02:03.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:03.069 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:03.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:02:03.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:02:03.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:02:03.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:02:03.071 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:02:03.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:03.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:02:03.540 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:02:03.585 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:02:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:03.586 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:02:03.586 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:03.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:02:03.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:02:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:02:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:03.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:02:03.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:02:03.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:02:03.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:02:04.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:02:04.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:04.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:04.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:04.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:04.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:02:04.927 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:02:05.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:05.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:05.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:05.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:05.391 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:02:05.853 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:02:06.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:06.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:06.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:06.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:06.315 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:02:06.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:02:06.633 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:02:06.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:06.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:06.684 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.721 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.763 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.777 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:02:06.795 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.832 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.873 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.915 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.952 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:06.993 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:07.035 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:07.072 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:07.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:07.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:07.113 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:07.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:02:07.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:02:07.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:07.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:07.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:07.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:07.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:07.157 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:12.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:12.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:12.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:12.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:12.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:12.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:12.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:12.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:12.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:12.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:12.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:02:12.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:02:12.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:02:12.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:12.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:12.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:12.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:02:12.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:12.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:02:12.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:12.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:02:12.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:02:12.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:12.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:12.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:12.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:02:12.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:12.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:02:12.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:12.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:02:12.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:02:12.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:12.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:12.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:12.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:02:12.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:12.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:02:12.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:12.198 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:02:12.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:12.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:02:12.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:02:12.200 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:02:12.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:02:12.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:02:12.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:12.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:12.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:12.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:02:12.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:02:12.730 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:02:12.732 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:02:12.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:12.733 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:12.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:12.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:12.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:12.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:12.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:12.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:12.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:12.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:12.804 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:12.804 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:17.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:17.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:17.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:17.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:17.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:17.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:17.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:17.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:17.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:17.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:17.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:17.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:17.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:02:17.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:17.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:17.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:02:17.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:17.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:02:17.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:02:17.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:17.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:17.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:17.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:02:17.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:17.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:02:17.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:02:17.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:02:17.814 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:02:17.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:17.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:17.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:02:18.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:02:18.326 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:02:18.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:18.327 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:02:18.328 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:18.745 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:02:18.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:18.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:18.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:18.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:19.207 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:02:19.669 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:02:19.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:19.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:19.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:19.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:20.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:02:20.593 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:02:20.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:20.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:20.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:20.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:21.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:02:21.518 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:02:21.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:21.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:21.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:21.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:21.980 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:02:22.447 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:02:22.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:22.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:22.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:22.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:22.914 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:02:23.380 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:02:23.842 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:02:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:02:24.766 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:02:25.228 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:02:25.690 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:02:26.152 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:02:26.614 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:02:27.077 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:02:27.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:27.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:27.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:27.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:27.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:27.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:32.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:32.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:32.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:32.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:32.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:32.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:32.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:32.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:32.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:32.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:32.347 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:02:32.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:02:32.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:02:32.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:32.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:32.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:32.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:02:32.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:32.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:02:32.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:32.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:02:32.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:02:32.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:32.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:32.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:32.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:02:32.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:32.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:02:32.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:32.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:02:32.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:02:32.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:32.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:32.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:32.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:02:32.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:32.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:02:32.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.355 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:02:32.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:02:32.356 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:02:32.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:32.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:02:32.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:02:32.872 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:02:32.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:32.873 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:02:32.874 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:33.290 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:02:33.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:33.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:33.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:33.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:33.756 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:02:34.220 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:02:34.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:34.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:34.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:34.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:34.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:02:35.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:02:35.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:35.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:35.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:35.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:35.610 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:02:36.077 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:02:36.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:36.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:36.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:36.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:36.543 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:02:37.008 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:02:37.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:37.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:37.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:37.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:37.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:02:37.937 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:02:38.401 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:02:38.864 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:02:39.327 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:02:39.791 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:02:40.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:02:40.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:02:41.181 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:02:41.644 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:02:41.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:41.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:41.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:41.899 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:46.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:46.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:46.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:46.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:46.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:46.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:46.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:46.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:46.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:46.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:46.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:02:46.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:02:46.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:02:46.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:46.911 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:46.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:46.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:46.912 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:46.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:46.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:02:46.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:46.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:46.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:02:46.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:02:46.915 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:02:46.915 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:02:46.915 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:46.920 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:02:47.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:02:47.435 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:02:47.436 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:02:47.437 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:47.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:02:47.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:47.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:47.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:48.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:02:48.779 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:02:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:48.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:48.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:49.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:02:49.705 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:02:49.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:49.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:49.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:49.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:50.168 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:02:50.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:50.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:50.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:50.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:50.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:50.458 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:55.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:55.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:55.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:55.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:55.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:55.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:55.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:55.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:55.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:55.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:02:55.478 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:02:55.480 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:02:55.480 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:02:55.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:55.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:55.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:55.481 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:02:55.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:02:55.481 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:02:55.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:55.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:02:55.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:02:55.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:55.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:55.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:55.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:02:55.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:02:55.483 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:02:55.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:55.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:02:55.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:02:55.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:55.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:02:55.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:55.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:02:55.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:02:55.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:02:55.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:02:55.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:02:55.488 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:02:55.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:02:55.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:02:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:02:56.018 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:02:56.020 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:02:56.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:56.023 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:02:56.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:02:56.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:02:56.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:02:56.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:56.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:02:56.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:02:56.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:02:56.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:02:56.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:56.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:02:56.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:02:56.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:56.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:56.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:02:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:02:56.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:02:56.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:02:56.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:02:56.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:02:56.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:02:56.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:02:56.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:02:56.448 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:02:56.449 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:01.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:01.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:01.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:01.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:01.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:01.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:01.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:01.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:01.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:01.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:01.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:01.455 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:01.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:01.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:01.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:01.456 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:01.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:01.457 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:01.457 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:01.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:01.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:01.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:01.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:01.459 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:01.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:01.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:01.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:01.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:01.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:01.987 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:01.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:01.990 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:01.991 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:02.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:02.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:02.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:02.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:02.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:02.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:02.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:02.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:02.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:02.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:02.002 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:07.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:07.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:07.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:07.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:07.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:07.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:07.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:07.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:07.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:07.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:07.012 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:07.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:07.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:07.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:07.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:07.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:07.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:07.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:07.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:07.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:07.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:07.017 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:07.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:07.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:07.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:07.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:07.543 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:07.545 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:07.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:07.547 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:07.966 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:08.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:08.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:08.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:08.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:08.430 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:08.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:09.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:09.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:09.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:09.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:09.357 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:09.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:09.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:09.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:09.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:09.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:09.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:09.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:09.558 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:14.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:14.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:14.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:14.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:14.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:14.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:14.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:14.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:14.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:14.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:14.569 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:14.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:14.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:14.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:14.570 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:14.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:14.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:14.571 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:14.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:14.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:14.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:14.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:14.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:14.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:14.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:14.574 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:14.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:14.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:15.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:15.097 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:15.098 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:15.099 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:15.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:15.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:15.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:15.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:03:15.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:03:15.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:03:15.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:03:15.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:03:15.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:03:15.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:15.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:15.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:15.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:15.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:15.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:16.469 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:16.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:16.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:16.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:16.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:16.942 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:17.413 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:03:17.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:17.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:17.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:17.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:17.885 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:03:17.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:17.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:17.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:17.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:17.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:17.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:17.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:17.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:17.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:17.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:17.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:17.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:17.913 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:22.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:22.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:22.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:22.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:22.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:22.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:22.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:22.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:22.924 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:22.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:22.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:22.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:22.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:22.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:22.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:22.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:22.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:22.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:22.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:22.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:22.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:22.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:22.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:22.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:22.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:22.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:22.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:22.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:22.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:22.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:22.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:22.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:22.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:22.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:22.938 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:22.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:22.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:23.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:23.462 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:23.464 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:23.465 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:23.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:23.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:23.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:03:23.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:03:23.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:03:23.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:03:23.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:03:23.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:03:23.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:23.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:23.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:23.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:23.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:24.348 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:24.814 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:24.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:24.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:24.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:24.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:25.283 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:25.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:25.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:25.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:25.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:25.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:25.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:25.545 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:30.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:30.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:30.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:30.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:30.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:30.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:30.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:30.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:30.554 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:30.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:30.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:30.557 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:30.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:30.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:30.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:30.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:30.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:30.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:30.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:30.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:30.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:30.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:30.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:30.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:30.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:30.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:30.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:30.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:30.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:30.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:30.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:30.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:30.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:30.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:30.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:30.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:30.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:30.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:30.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:30.565 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:30.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:30.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:30.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:31.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:31.090 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:31.092 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:31.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:31.093 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:31.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:31.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:31.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:03:31.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:03:31.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:03:31.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:03:31.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:03:31.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:03:31.513 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:31.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:31.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:31.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:31.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:31.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:32.458 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:32.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:32.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:32.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:32.930 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:33.402 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:03:33.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:33.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:33.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:33.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:33.876 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:03:33.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:33.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:33.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:33.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:33.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:33.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:33.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:33.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:33.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:33.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:33.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:33.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:33.902 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:38.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:38.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:38.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:38.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:38.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:38.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:38.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:38.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:38.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:38.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:38.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:38.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:38.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:38.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:38.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:38.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:38.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:38.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:38.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:38.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:38.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:38.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:38.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:38.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:38.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:38.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:38.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:38.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:38.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:38.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:38.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:38.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:38.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:38.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:38.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:38.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:38.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:38.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:38.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:38.925 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:38.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:38.929 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:39.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:39.454 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:39.456 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:39.457 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:39.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:39.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:39.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:39.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:03:39.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:03:39.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:03:39.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:03:39.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:03:39.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:03:39.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:39.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:39.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:39.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:39.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:40.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:40.819 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:40.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:40.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:40.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:40.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:41.291 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:41.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:41.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:41.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:41.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:41.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:41.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:41.551 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:41.551 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.551 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.551 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:41.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:46.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:46.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:46.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:46.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:46.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:46.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:46.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:46.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:46.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:46.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:46.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:46.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:46.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:46.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:46.575 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:46.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:46.575 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:46.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:46.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:46.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:46.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:46.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:46.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:46.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:46.580 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:46.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:46.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:46.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:46.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:46.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:46.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:46.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:46.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:46.583 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:46.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:46.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:47.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:47.109 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:47.111 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:47.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:47.113 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:47.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:47.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:47.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:03:47.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:03:47.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:03:47.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:03:47.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:03:47.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:03:47.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:47.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:47.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:47.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:47.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:48.006 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:48.477 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:48.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:48.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:48.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:48.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:48.947 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:03:49.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:49.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:49.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:49.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:49.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:03:50.362 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:03:50.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:50.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:50.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:50.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:50.835 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:03:50.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:50.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:50.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:50.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:50.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:50.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:50.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:50.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:50.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:50.871 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:03:50.871 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:50.871 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:50.871 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:50.871 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:50.872 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:50.872 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:50.872 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=927 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:03:55.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:03:55.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:03:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:55.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:55.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:03:55.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:55.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:55.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:03:55.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:03:55.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:03:55.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:03:55.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:55.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:55.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:03:55.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:03:55.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:03:55.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:03:55.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:55.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:03:55.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:03:55.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:55.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:55.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:03:55.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:03:55.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:03:55.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:03:55.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:55.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:03:55.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:03:55.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:55.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:03:55.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:03:55.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:03:55.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:03:55.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:03:55.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:03:55.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:03:55.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:03:55.891 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:03:55.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:03:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:03:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:03:55.896 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:03:56.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:03:56.416 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:03:56.418 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:03:56.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:03:56.420 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:03:56.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:03:56.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:03:56.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:03:56.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:03:56.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:03:56.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:03:56.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:03:56.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:03:56.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:03:56.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:56.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:56.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:56.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:57.313 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:03:57.786 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:03:57.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:57.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:57.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:57.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:58.258 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:03:58.730 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:03:58.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:58.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:58.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:58.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:03:59.201 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:03:59.672 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:03:59.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:03:59.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:03:59.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:03:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:00.144 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:04:00.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:04:00.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:00.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:00.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:00.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:00.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:00.400 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:05.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:05.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:05.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:05.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:05.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:05.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:05.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:05.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:05.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:05.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:05.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:05.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:05.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:05.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:05.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:05.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:05.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:05.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:05.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:05.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:05.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:05.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:05.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:05.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:05.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:05.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:05.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:05.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:05.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:05.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:05.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:05.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:05.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:05.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:05.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:05.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:05.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:05.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:05.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:05.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:05.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:05.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:05.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:05.429 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:05.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:05.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:05.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:05.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:05.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:05.959 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:05.962 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:05.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:05.964 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:06.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:04:06.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:06.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:06.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:06.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:04:07.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:04:07.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:07.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:07.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:07.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:07.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:07.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:07.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:07.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:07.981 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:07.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:07.981 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=551 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:07.981 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=551 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:07.981 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=551 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:07.981 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:12.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:12.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:12.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:12.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:12.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:12.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:12.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:12.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:12.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:12.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:12.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:12.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:12.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:12.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:12.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:12.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:12.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:13.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:13.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:13.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:13.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:13.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:13.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:13.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:13.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:13.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:13.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:13.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:13.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:13.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:13.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:13.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:13.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:13.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:13.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:13.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:13.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:13.005 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:13.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:13.485 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:13.535 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:13.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:13.539 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:13.541 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:13.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:04:13.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:04:13.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:04:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:13.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:04:14.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:14.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:14.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:14.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:14.430 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:04:14.903 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:04:15.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:15.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:15.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:15.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:15.374 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:04:15.850 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:04:16.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:16.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:16.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:16.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:16.321 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:04:16.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:16.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:16.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:16.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:16.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:16.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:16.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:16.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:16.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:16.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:16.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:16.598 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:16.598 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.598 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.598 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.598 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.598 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.598 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:16.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:21.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:21.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:21.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:21.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:21.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:21.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:21.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:21.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:21.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:21.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:21.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:21.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:21.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:21.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:21.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:21.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:21.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:21.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:21.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:21.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:21.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:21.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:21.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:21.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:21.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:21.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:21.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:21.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:21.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:21.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:21.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:21.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:21.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:21.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:21.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:21.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:21.630 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:21.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:21.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:21.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:22.113 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:22.152 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:22.153 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:22.154 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:22.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:22.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:04:22.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:04:22.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:04:22.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:22.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:22.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:22.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:22.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:22.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:22.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:22.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:22.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:22.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:22.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:22.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:22.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:22.190 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:22.190 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:27.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:27.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:27.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:27.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:27.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:27.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:27.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:27.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:27.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:27.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:27.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:27.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:27.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:27.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:27.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:27.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:27.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:27.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:27.202 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:27.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:27.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:27.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:27.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:27.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:27.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:27.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:27.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:27.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:27.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:27.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:27.204 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:27.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:27.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:27.207 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:27.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:27.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:27.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:27.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:27.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:27.725 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:27.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:27.728 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:27.731 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:27.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:04:27.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:04:27.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:04:27.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:27.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:28.161 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:04:28.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:28.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:28.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:28.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:28.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:04:29.108 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:04:29.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:29.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:29.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:29.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:29.583 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:04:30.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:04:30.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:30.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:30.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:30.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:30.525 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:04:30.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:30.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:30.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:30.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:30.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:30.782 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:35.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:35.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:35.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:35.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:35.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:35.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:35.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:35.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:35.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:35.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:35.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:35.796 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:35.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:35.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:35.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:35.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:35.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:35.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:35.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:35.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:35.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:35.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:35.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:35.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:35.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:35.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:35.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:35.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:35.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:35.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:35.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:35.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:35.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:35.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:35.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:35.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:35.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:35.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:35.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:35.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:35.805 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:35.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:36.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:36.328 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:36.330 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:36.331 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:36.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:36.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:04:36.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:04:36.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:04:36.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:36.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:36.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:36.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:36.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:36.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:36.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:36.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:36.373 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:36.373 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:36.373 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:36.374 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:36.374 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:36.374 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:36.374 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:36.374 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:41.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:41.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:41.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:41.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:41.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:41.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:41.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:41.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:41.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:41.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:41.384 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:41.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:41.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:41.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:41.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:41.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:41.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:41.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:41.387 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:41.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:41.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:41.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:41.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:41.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:41.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:41.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:41.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:41.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:41.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:41.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:41.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:41.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:41.396 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:41.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:41.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:41.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:41.913 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:41.914 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:41.915 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:41.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:41.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:41.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:41.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:41.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:41.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:41.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:41.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:41.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:41.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:41.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:41.928 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:41.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:41.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:41.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:41.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:46.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:46.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:46.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:46.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:46.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:46.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:46.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:46.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:46.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:46.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:46.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:46.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:46.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:46.944 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:46.944 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:46.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:46.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:46.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:46.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:46.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:46.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:46.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:46.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:46.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:46.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:46.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:46.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:46.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:46.954 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:46.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:46.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:47.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:47.487 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:47.489 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:47.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:47.491 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:47.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:47.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:47.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:47.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:47.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:47.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:47.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:47.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:47.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:47.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:47.514 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.516 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.516 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.516 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.516 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:47.516 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:52.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:52.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:52.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:52.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:52.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:52.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:52.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:52.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:52.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:52.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:52.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:52.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:52.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:52.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:52.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:52.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:52.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:52.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:52.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:52.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:52.529 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:52.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:52.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:52.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:52.531 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:52.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:52.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:52.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:52.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:52.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:52.532 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:52.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:52.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:52.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:52.535 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:52.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:52.540 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:53.017 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:53.064 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:53.066 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:53.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:53.068 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:53.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:53.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:53.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:53.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:53.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:53.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:53.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:53.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:53.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:53.085 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:58.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:58.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:58.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:58.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:58.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:58.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:58.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:58.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:58.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:58.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:04:58.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:04:58.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:04:58.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:04:58.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:58.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:58.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:58.097 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:04:58.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:04:58.097 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:04:58.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:58.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:04:58.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:04:58.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:58.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:58.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:58.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:04:58.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:04:58.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:04:58.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:58.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:04:58.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:04:58.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:04:58.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:04:58.105 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:04:58.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:04:58.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:04:58.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:04:58.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:04:58.587 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:04:58.635 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:04:58.637 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:04:58.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:04:58.639 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:04:58.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:04:58.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:04:58.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:04:58.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:04:58.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:04:58.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:04:58.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:04:58.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:04:58.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:04:58.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:04:58.659 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:04:58.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.660 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:04:58.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:03.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:03.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:03.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:03.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:03.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:03.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:03.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:03.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:03.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:03.680 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:03.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:03.683 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:03.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:03.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:03.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:03.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:03.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:03.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:03.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:03.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:03.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:03.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:03.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:03.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:03.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:03.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:03.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:03.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:03.687 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:03.687 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:03.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:03.687 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:03.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:03.687 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:03.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:03.687 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:03.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:03.689 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:03.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:03.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:03.690 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:03.690 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:03.690 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:03.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:04.173 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:04.219 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:04.219 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:04.221 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:04.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:04.644 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:05:04.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:04.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:04.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:04.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:05.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:05:05.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:05:05.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:05.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:05.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:05.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:06.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:05:06.535 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:05:06.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:06.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:06.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:06.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:07.008 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:05:07.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:07.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:07.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:07.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:05:07.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:05:07.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:05:07.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:05:07.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:05:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:05:07.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:07.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:07.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:07.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:05:08.421 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:05:08.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:08.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:08.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:08.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:05:09.363 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:05:09.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:09.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:09.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:09.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:09.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:09.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:09.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:09.494 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:14.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:14.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:14.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:14.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:14.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:14.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:14.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:14.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:14.505 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:14.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:14.506 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:14.507 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:14.507 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:14.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:14.508 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:14.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:14.508 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:14.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:14.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:14.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:14.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:14.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:14.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:14.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:14.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:14.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:14.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:14.510 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:14.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:14.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:14.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:14.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:14.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:14.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:14.512 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:14.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:14.512 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:14.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:14.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:14.514 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:14.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:14.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:14.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:15.039 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:15.042 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:15.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:15.044 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:15.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:15.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:15.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:15.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:15.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:15.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:15.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:15.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:15.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:15.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:15.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:15.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:15.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:15.087 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:15.087 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:15.088 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:20.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:20.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:20.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:20.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:20.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:20.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:20.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:20.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:20.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:20.091 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:20.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:20.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:20.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:20.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:20.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:20.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:20.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:20.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:20.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:20.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:20.096 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:20.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:20.618 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:20.618 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:20.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:20.620 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:20.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:20.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:20.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:20.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:20.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:20.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:20.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:20.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:20.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:20.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:20.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:20.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:20.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:20.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:20.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:20.654 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:20.654 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:25.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:25.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:25.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:25.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:25.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:25.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:25.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:25.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:25.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:25.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:25.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:25.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:25.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:25.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:25.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:25.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:25.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:25.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:25.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:25.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:25.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:25.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:25.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:25.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:25.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:25.665 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:25.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:25.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:26.188 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:26.191 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:26.193 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:26.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:26.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:26.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:26.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:26.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:26.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:26.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:26.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:26.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:26.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:26.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:26.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:26.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:26.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:26.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:26.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:26.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:26.237 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:26.237 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:26.237 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:31.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:31.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:31.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:31.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:31.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:31.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:31.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:31.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:31.252 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:31.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:31.252 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:31.255 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:31.255 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:31.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:31.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:31.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:31.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:31.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:31.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:31.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:31.257 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:31.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:31.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:31.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:31.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:31.258 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:31.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:31.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:31.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:31.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:31.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:31.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:31.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:31.263 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:31.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:31.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:31.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:31.793 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:31.795 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:31.796 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:31.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:31.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:31.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:31.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:31.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:31.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:31.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:31.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:31.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:31.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:31.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:31.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:31.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:31.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:31.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:31.841 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:36.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:36.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:36.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:36.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:36.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:36.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:36.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:36.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:36.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:36.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:36.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:36.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:36.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:36.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:36.857 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:36.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:36.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:36.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:36.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:36.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:36.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:36.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:36.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:36.859 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:36.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:36.859 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:36.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:36.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:36.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:36.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:36.861 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:36.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:36.861 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:36.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:36.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:36.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:36.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:36.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:36.864 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:36.864 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:36.864 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:36.869 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:37.347 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:37.390 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:37.392 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:37.394 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:37.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:37.396 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 02:05:37.396 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 200
2026-05-07 02:05:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 02:05:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:37.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:37.821 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:05:38.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:38.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:38.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:38.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:38.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:38.294 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:05:38.766 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:05:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:39.027 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 02:05:39.027 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 0
2026-05-07 02:05:39.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 02:05:39.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:39.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:39.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:39.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:39.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:39.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:39.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:39.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:39.034 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:39.035 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:44.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:44.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:44.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:44.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:44.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:44.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:44.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:44.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:44.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:44.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:44.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:44.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:44.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:44.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:44.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:44.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:44.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:44.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:44.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:44.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:44.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:44.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:44.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:44.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:44.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:44.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:44.057 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:44.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:44.059 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:44.059 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:44.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:44.059 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:44.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:44.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:44.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:44.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:44.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:44.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:44.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:44.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:44.063 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:44.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:44.068 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:44.545 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:44.593 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:44.595 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:44.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:44.597 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:44.599 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 02:05:44.599 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 200
2026-05-07 02:05:44.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 02:05:44.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:45.017 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:05:45.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:45.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:45.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:45.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:45.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:45.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:05:45.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:45.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:45.963 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:05:46.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.229 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 02:05:46.229 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 0
2026-05-07 02:05:46.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 02:05:46.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:46.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:46.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:46.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:46.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:46.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:46.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:46.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:46.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:46.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:46.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:46.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:46.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:46.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:46.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:46.238 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:46.238 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:51.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:51.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:51.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:51.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:51.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:51.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:51.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:51.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:51.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:51.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:51.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:51.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:51.253 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:51.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:51.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:51.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:51.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:51.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:51.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:51.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:51.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:51.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:51.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:51.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:51.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:51.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:51.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:51.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:51.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:51.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:51.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:51.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:51.262 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:51.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:51.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:51.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:51.787 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:51.789 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:51.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:51.791 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:51.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:51.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:51.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:51.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:51.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:51.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:51.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:51.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:51.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:51.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:51.831 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:51.832 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:51.832 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:51.832 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:56.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:56.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:56.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:56.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:56.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:56.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:56.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:56.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:56.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:56.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:05:56.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:05:56.839 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:05:56.840 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:05:56.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:56.840 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:56.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:56.840 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:05:56.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:05:56.840 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:05:56.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:56.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:05:56.841 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:05:56.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:56.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:05:56.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:05:56.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:56.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:05:56.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:05:56.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:05:56.844 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:05:56.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:05:56.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:05:57.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:05:57.370 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:05:57.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:57.373 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:05:57.375 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:05:57.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:05:57.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:05:57.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:05:57.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:57.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:05:57.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:05:57.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:05:57.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:05:57.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:05:57.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:05:57.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:05:57.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:05:57.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:05:57.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:05:57.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:05:57.424 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.425 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:05:57.426 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:02.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:06:02.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:06:02.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:02.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:02.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:02.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:02.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:02.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:06:02.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:02.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:06:02.436 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:06:02.439 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:06:02.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:06:02.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:02.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:06:02.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:06:02.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:06:02.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:02.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:02.442 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:06:02.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:06:02.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:06:02.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:06:02.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:06:02.444 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:06:02.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.447 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:06:02.447 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:06:02.447 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:02.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:06:02.930 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:06:02.977 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:06:02.979 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:06:02.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:02.982 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:06:03.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:03.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:03.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:03.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:03.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:03.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:03.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:03.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:03.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:03.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:03.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:03.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:03.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:03.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:03.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:03.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:03.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:03.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:03.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:03.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:03.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:03.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:03.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:03.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:03.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:06:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:03.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:03.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:03.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:06:04.340 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:06:04.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:04.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:04.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:04.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:04.812 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:06:05.285 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:06:05.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:05.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:05.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:05.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:05.757 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:06:06.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:06.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:06.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:06.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:06.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:06.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:06.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:06.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:06.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:06.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:06.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:06.229 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:06:06.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:06.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:06.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:06.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:06.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:06.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:06.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:06.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:06.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:06.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:06.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:06.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:06.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:06.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:06.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:06.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:06.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:06.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:06.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:06.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:06.699 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:06:07.170 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:06:07.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:07.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:06:08.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:06:08.577 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:06:09.048 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:06:09.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:09.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:09.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:09.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:09.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:09.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:09.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:09.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:09.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:09.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:09.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:09.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:09.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:09.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:09.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:09.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:09.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:09.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:06:09.990 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:06:10.463 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:06:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:06:11.408 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:06:11.879 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:06:12.352 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:06:12.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:12.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:12.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:12.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:12.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:12.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:12.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:12.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:12.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:12.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:12.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:12.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:12.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:12.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:12.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:12.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:12.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:12.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:12.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:12.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:12.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:12.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:12.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:12.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:12.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:12.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:06:13.291 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:06:13.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:13.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:13.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:13.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:13.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:13.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:13.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:13.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:13.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:13.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:13.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:13.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:13.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:13.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:13.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:13.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:13.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:13.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:13.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:13.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:13.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:13.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:13.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:13.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:13.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:13.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:13.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:13.764 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:06:14.237 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:06:14.709 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:06:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:06:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:06:16.121 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:06:16.592 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:06:16.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:16.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:16.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:16.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:16.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:16.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:16.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:16.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:16.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:16.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:16.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:16.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:16.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:16.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:16.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:16.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:16.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:16.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:16.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:16.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:16.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:16.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:16.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:16.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:16.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:16.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:16.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:16.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:17.063 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:06:17.536 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:06:18.009 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:06:18.480 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:06:18.952 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:06:19.425 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:06:19.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:19.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:19.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:19.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:19.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:19.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:19.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:19.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:19.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:19.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:19.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:19.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:19.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:19.897 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:06:19.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:19.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:19.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:19.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:20.369 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:06:20.841 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:06:21.314 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:06:21.787 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:06:22.258 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:06:22.731 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:06:22.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:22.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:22.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:22.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:22.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:22.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:22.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:22.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:22.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:22.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:22.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:22.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:22.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:22.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:22.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:22.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:22.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:23.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:23.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:23.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:23.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:23.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:23.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:23.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:23.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:23.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:23.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:23.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:23.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:23.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:23.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:23.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:23.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:23.203 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:06:23.675 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:06:24.146 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:06:24.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:24.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:24.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:24.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:24.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:24.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:24.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:24.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:24.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:24.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:24.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:24.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:24.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:24.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:24.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:24.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:24.619 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:06:24.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:24.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:24.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:24.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:24.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:24.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:24.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:24.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:24.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:24.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:24.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:24.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:06:25.558 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:06:26.031 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:06:26.504 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:06:26.975 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:06:27.447 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:06:27.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:27.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:27.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:27.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:27.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:27.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:27.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:27.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:27.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:27.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:27.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:27.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:27.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:27.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:27.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:27.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:27.919 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:06:27.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:27.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:27.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:27.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:27.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:27.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:27.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:27.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:27.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:27.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:27.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:27.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:28.388 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:06:28.859 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:06:29.332 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:06:29.805 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:06:30.276 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:06:30.748 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:06:30.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:30.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:30.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:30.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:30.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:30.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:30.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:30.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:30.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:30.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:30.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:30.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:31.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:31.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:31.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:31.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:31.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:31.215 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:06:31.684 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:06:32.155 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:06:32.628 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:06:33.101 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:06:33.573 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:06:34.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:34.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.044 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:06:34.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:34.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:34.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:34.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:34.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:34.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:34.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:34.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:34.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:34.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:34.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:34.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:34.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:34.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:34.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:34.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:34.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:34.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:34.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:34.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:34.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:34.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:34.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:34.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:34.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:34.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:34.513 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:06:34.979 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:06:35.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:35.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:35.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:35.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:35.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:35.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:35.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:35.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:35.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:35.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:35.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:35.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:35.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:35.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:35.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:35.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:35.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:35.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:35.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:35.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:35.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:35.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:35.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:35.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:35.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:35.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:35.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:35.444 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:06:35.913 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:06:36.384 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:06:36.855 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:06:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:06:37.796 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:06:38.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:38.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:38.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:38.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:38.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:38.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:38.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:38.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:38.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:38.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:38.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:38.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:38.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:38.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.267 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:06:38.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:38.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:38.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:38.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:38.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:38.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:38.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:38.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:38.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:38.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:38.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:38.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:38.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:38.733 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:06:39.204 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:06:39.675 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:06:40.145 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:06:40.617 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:06:41.086 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:06:41.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:41.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:41.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:41.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:41.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:41.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:41.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:41.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:41.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:41.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:41.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:41.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:41.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:41.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:41.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:41.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:41.557 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:06:42.028 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:06:42.499 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:06:42.972 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:06:43.444 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:06:43.916 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:06:44.387 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:06:44.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:44.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:44.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:44.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:44.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:44.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:44.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:44.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:44.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:44.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:44.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:44.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:44.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:44.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:44.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:44.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:44.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:44.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:44.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:44.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:44.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:44.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:44.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:44.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:44.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:44.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:44.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:44.856 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:06:45.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:45.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:45.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:45.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:45.324 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:06:45.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:45.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:45.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:45.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:45.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:45.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:45.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:45.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:45.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:06:45.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:06:45.333 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:06:45.333 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:45.334 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:50.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:06:50.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:06:50.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:50.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:50.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:50.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:50.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:50.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:06:50.350 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:50.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:06:50.350 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:06:50.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:06:50.355 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:06:50.355 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:06:50.355 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:50.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:50.356 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:06:50.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:06:50.356 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:06:50.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:50.359 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:06:50.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:06:50.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:06:50.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:50.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:50.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:06:50.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:06:50.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:06:50.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:50.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:06:50.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:06:50.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:06:50.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:50.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:50.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:06:50.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:06:50.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:06:50.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:06:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:06:50.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:06:50.366 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:50.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:06:50.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:06:50.897 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:06:50.899 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:06:50.901 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:06:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:50.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:50.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:50.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:50.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:50.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:50.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:50.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:50.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:50.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:50.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:50.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:50.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:50.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:51.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:51.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:51.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:51.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:51.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:51.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:51.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:51.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:51.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:51.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:51.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:51.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:51.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:51.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:51.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:51.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:51.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:51.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:06:51.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:51.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:51.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:51.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:51.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:51.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:51.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:51.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:51.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:51.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:51.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:51.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:51.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:51.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:51.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:51.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:51.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:51.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:51.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:06:51.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:06:51.410 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:51.410 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:56.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:06:56.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:06:56.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:56.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:56.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:56.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:56.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:56.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:06:56.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:56.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:06:56.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:06:56.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:06:56.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:06:56.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:06:56.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:56.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:56.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:06:56.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:06:56.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:06:56.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:56.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:06:56.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:06:56.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:06:56.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:56.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:56.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:06:56.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:06:56.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:06:56.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:56.433 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:06:56.433 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:06:56.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:06:56.433 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:06:56.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:56.433 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:06:56.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:06:56.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:06:56.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:06:56.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:06:56.438 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:06:56.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:06:56.443 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:06:56.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:06:56.974 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:06:56.976 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:06:56.978 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:06:56.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:56.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:56.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:56.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:56.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:56.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:56.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:56.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:56.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:57.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:57.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:57.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:57.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:57.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:57.387 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:06:57.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:57.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:57.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:57.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:57.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:06:57.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:57.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:57.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:57.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:57.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:57.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:57.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:57.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:57.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:57.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:57.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:57.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:57.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:57.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:57.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:57.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:57.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:06:58.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:58.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:58.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:58.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:58.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:58.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:58.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:58.593 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=469 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:58.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:58.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:58.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:58.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:58.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:58.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:58.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:58.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:58.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:58.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:58.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:58.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:58.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:58.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:58.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:58.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:06:58.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:58.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:58.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:06:58.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:06:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:58.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:06:58.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:06:58.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:06:59.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:06:59.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:06:59.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:06:59.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:06:59.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:06:59.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:06:59.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:06:59.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:06:59.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:06:59.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:06:59.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:06:59.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:06:59.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:06:59.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:06:59.199 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:06:59.199 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=599 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:59.199 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=599 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:59.199 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=599 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:06:59.199 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:04.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:04.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:04.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:04.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:04.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:04.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:04.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:04.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:04.216 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:04.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:04.216 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:07:04.220 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:07:04.220 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:07:04.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:04.220 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:04.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:04.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:07:04.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:04.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:07:04.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:04.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:07:04.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:07:04.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:04.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:04.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:04.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:07:04.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:04.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:07:04.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:04.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:07:04.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:07:04.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:04.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:04.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:04.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:07:04.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:04.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:07:04.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:04.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:07:04.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:07:04.230 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:07:04.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:04.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:04.235 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:07:04.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:07:04.762 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:07:04.763 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:07:04.763 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:07:04.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:04.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:04.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:04.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:04.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:04.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:04.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:04.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:04.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:04.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:04.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:04.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:04.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:04.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:04.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:05.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:05.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:05.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:05.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:05.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:05.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:05.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:05.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:05.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:05.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:05.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:07:05.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:05.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:05.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:05.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:05.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:05.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:05.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:05.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:05.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:05.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:05.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:05.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:05.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:05.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:05.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:05.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:05.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:05.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:05.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:05.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:05.650 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:07:05.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:05.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:05.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:05.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:05.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:05.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:05.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:05.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:05.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:05.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:05.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:05.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:06.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:06.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:06.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:06.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:06.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:06.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:06.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:06.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:06.049 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:07:11.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:11.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:11.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:11.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:11.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:11.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:11.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:11.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:11.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:11.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:11.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:07:11.071 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:07:11.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:07:11.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:11.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:11.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:11.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:07:11.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:11.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:07:11.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:11.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:11.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:07:11.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:11.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:11.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:07:11.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:07:11.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:07:11.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:07:11.078 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:11.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:07:11.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:07:11.603 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:07:11.606 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:07:11.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:11.608 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:07:11.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:11.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:11.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:11.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:11.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:11.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:11.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:11.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:11.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:11.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:11.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:11.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:11.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:11.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:11.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:11.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:11.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:11.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:11.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:11.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:11.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:11.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:11.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:11.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:11.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:11.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:11.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:11.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:11.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:11.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.028 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:07:12.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:12.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:12.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:12.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:12.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:12.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:12.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:12.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:12.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:12.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:12.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:12.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:12.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:12.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:12.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:12.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:12.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:12.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:12.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:07:12.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:12.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:12.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:12.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:12.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:12.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:12.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:12.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:12.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:12.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:12.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:12.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:12.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:12.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:12.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:12.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:12.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:12.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:12.898 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:12.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:17.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:17.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:17.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:17.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:17.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:17.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:17.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:17.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:17.913 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:17.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:17.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:07:17.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:07:17.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:07:17.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:17.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:17.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:17.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:07:17.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:17.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:07:17.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:17.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:07:17.918 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:07:17.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:17.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:17.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:17.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:07:17.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:17.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:07:17.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:17.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:07:17.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:07:17.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:17.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:17.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:17.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:07:17.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:17.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:07:17.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:07:17.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:07:17.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:07:17.926 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:07:17.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:17.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:07:18.409 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:07:18.454 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:07:18.455 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:07:18.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:18.457 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:07:18.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:18.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:18.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:18.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:18.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:18.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:18.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:18.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:18.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:18.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:18.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:18.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:18.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:18.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:07:18.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:18.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:18.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:18.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:19.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:07:19.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:07:19.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:19.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:19.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:19.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:20.294 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:07:20.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:20.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:20.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:20.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:20.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:20.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:20.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:20.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:20.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:20.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:20.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:20.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:20.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:20.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:20.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:20.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:20.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:20.767 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:07:20.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:20.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:20.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:20.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:21.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:07:21.709 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:07:21.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:21.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:21.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:21.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:22.177 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:07:22.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:22.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:22.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:22.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:22.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:22.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:22.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:22.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:22.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:22.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:22.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:22.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:22.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:22.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:22.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:22.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:22.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:22.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:07:22.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:22.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:22.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:22.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:23.119 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:07:23.589 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:07:24.061 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:07:24.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:24.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:24.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:24.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:24.103 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1337 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:24.103 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1337 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:24.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:24.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:24.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:24.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:24.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:24.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:24.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:24.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:24.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:24.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:24.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:24.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:24.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:24.532 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:07:25.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:07:25.477 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:07:25.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:25.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:25.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:25.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:25.949 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:07:25.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:25.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:25.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:25.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:25.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:25.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:25.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:25.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:25.961 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:07:25.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:30.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:30.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:30.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:30.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:30.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:30.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:30.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:30.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:30.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:30.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:30.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:07:30.976 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:07:30.976 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:07:30.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:30.977 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:30.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:30.977 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:07:30.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:30.978 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:07:30.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:30.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:07:30.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:07:30.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:30.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:30.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:30.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:07:30.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:30.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:07:30.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:30.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:07:30.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:07:30.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:30.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:30.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:30.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:07:30.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:30.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:07:30.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:07:30.986 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:07:30.986 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:07:30.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:30.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:30.991 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:07:31.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:07:31.513 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:07:31.515 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:07:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:31.517 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:07:31.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:31.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:31.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:31.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:31.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:31.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:31.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:31.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:31.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:31.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:31.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:31.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:31.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:31.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:07:31.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:31.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:31.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:31.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:32.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:07:32.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:07:32.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:32.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:32.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:32.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:33.351 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:07:33.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:33.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:33.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:33.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:33.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:33.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:33.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:33.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:33.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:33.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:33.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:33.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:33.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:33.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:33.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:33.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:33.819 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:07:33.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:33.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:33.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:33.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:34.290 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:07:34.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:07:34.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:34.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:34.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:34.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:35.232 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:07:35.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:35.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:35.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:35.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:35.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:35.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:35.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:35.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:35.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:35.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:35.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:35.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:35.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:35.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:35.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:35.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:35.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:35.702 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:07:35.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:35.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:35.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:35.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:36.167 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:07:36.639 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:07:37.111 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:07:37.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:37.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:37.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:37.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:37.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:37.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:37.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:37.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:37.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:37.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:37.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:37.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:37.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:37.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:37.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:37.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:37.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:37.582 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:07:38.053 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:07:38.525 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:07:38.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:38.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:38.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:38.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:38.998 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:07:38.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:38.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:39.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:39.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:39.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:39.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:39.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:39.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:39.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:39.002 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:07:39.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:39.002 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:07:44.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:07:44.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:07:44.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:44.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:44.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:44.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:07:44.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:44.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:44.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:07:44.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:07:44.023 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:07:44.023 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:07:44.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:44.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:44.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:07:44.024 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:07:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:07:44.024 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:07:44.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:44.025 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:07:44.025 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:07:44.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:44.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:44.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:07:44.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:07:44.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:07:44.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:07:44.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:44.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:07:44.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:07:44.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:07:44.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:07:44.030 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:07:44.030 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:07:44.030 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:07:44.035 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:07:44.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:07:44.559 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:07:44.561 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:07:44.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:44.561 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:07:44.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:44.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:44.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:44.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:44.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:44.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:44.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:44.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:44.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:44.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:44.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:44.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:44.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:44.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:44.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:44.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:44.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:44.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:44.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:44.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:44.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:44.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:44.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:44.978 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:07:45.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:45.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:45.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:45.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:45.450 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:07:45.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:07:46.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:46.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:46.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:46.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:46.386 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:07:46.857 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:07:46.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:46.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:46.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:46.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:46.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:46.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:46.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:46.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:46.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:46.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:46.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:46.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:46.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:46.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:46.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:46.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:46.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:47.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:47.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:47.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:47.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:47.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:47.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:47.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:47.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:47.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:47.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:47.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:47.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:47.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:47.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:47.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:47.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:47.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:47.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:47.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:47.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:47.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:07:47.799 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:07:48.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:48.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:48.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:48.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:48.270 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:07:48.737 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:07:49.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:07:49.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:07:49.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:07:49.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:07:49.202 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:07:49.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:49.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:49.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:49.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:49.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:49.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:49.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:49.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:49.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:49.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:49.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:49.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:49.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:49.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:49.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:49.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:49.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:49.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:49.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:49.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:49.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:49.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:49.672 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:07:49.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:49.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:49.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:49.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:49.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:50.143 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:07:50.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:07:51.084 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:07:51.556 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:07:51.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:51.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:51.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:51.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:51.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:51.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:51.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:51.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:51.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:51.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:51.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:51.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:51.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:51.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:51.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:51.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:51.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:52.027 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:07:52.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:52.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:52.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:52.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:52.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:52.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:52.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:52.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:52.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:52.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:52.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:52.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:52.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:52.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:52.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:52.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:52.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:52.492 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:07:52.958 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:07:53.428 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:07:53.900 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:07:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:54.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:54.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:54.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:54.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:54.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:54.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:54.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:54.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:54.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:54.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:54.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:54.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:54.371 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:07:54.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:54.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:54.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:54.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:54.841 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:07:54.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:55.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:55.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:55.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:55.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:55.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:55.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:55.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:55.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:55.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:55.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:55.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:55.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:55.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:55.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:55.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:55.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:55.309 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:07:55.779 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:07:56.249 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:07:56.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:56.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:56.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:56.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:56.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:56.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:56.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:56.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:56.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:56.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:56.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:56.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:56.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:56.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:56.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:56.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:56.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:56.721 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:07:57.191 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:07:57.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:57.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:57.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:57.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:57.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:57.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:57.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:57.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:57.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:57.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:57.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:57.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:57.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:57.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:57.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:57.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:57.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:57.662 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:07:58.133 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:07:58.603 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:07:59.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:59.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:59.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:59.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:59.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:59.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:59.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:59.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:59.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:59.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:59.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:59.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:59.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:59.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.074 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:07:59.545 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:07:59.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:59.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:59.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:59.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:07:59.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:07:59.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:07:59.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:59.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:59.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:07:59.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:07:59.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:07:59.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:07:59.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:07:59.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:07:59.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:00.015 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:08:00.486 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:08:00.960 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:08:01.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:01.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:01.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:01.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:01.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:01.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:01.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:01.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:01.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:01.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:01.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:01.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:01.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:01.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:01.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:01.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:01.432 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:08:01.904 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:08:01.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:01.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:01.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:01.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:01.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:01.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:02.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:02.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:02.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:02.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:02.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:02.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:02.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:02.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:02.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:02.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:02.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:02.375 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:08:02.845 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:08:03.316 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:08:03.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:03.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:03.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:03.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:03.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:03.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:03.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:03.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:03.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:03.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:03.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:03.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:03.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:03.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:03.721 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.721 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.722 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.722 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.722 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:03.722 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:08.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:08.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:08.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:08.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:08.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:08.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:08.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:08.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:08.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:08.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:08.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:08.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:08.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:08.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:08.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:08.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:08.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:08.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:08.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:08.744 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:08.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:08.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:08.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:08.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:08.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:08.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:08.751 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:08.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:09.234 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:09.264 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:09.265 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:09.265 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:09.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:09.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:09.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:09.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:09.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:09.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:09.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:09.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:09.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:09.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:09.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:09.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:09.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:09.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:09.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:09.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:09.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:09.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:09.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:09.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:09.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:09.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:09.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:09.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:09.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:09.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:09.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:09.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:09.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:10.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:10.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:10.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:10.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:10.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:10.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:10.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:10.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:10.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:10.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:10.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:10.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:10.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:10.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:10.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:10.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:10.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:10.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:10.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:10.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:10.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:10.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:10.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:10.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:10.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:10.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:10.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:10.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:10.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:10.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:10.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:10.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:10.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:10.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:10.490 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:10.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:15.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:15.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:15.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:15.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:15.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:15.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:15.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:15.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:15.505 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:15.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:15.505 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:15.507 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:15.507 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:15.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:15.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:15.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:15.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:15.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:15.508 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:15.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:15.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:15.509 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:15.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:15.509 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:15.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:15.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:15.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:15.510 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:15.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:15.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:15.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:15.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:15.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:15.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:15.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:15.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:15.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:15.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:15.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:15.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:15.514 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:15.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:15.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:15.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:16.038 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:16.040 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:16.041 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:16.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:16.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:16.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:16.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:16.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:16.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:16.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:16.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:16.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:16.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:16.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:16.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:16.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:16.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:16.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:16.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:16.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:16.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:16.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:16.940 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:16.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:16.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:16.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:16.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:16.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:16.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:16.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:16.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:16.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:16.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:16.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:16.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:16.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:16.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:16.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:16.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:16.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:17.411 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:08:17.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:17.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:17.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:17.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:17.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:17.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:17.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:17.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:17.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:17.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:17.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:17.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:17.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:17.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:17.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:17.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:17.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:17.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:17.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:17.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:17.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:17.881 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:08:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:18.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:18.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:18.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:18.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:18.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:18.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:18.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:18.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:18.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:18.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:18.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:18.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.352 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:08:18.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:18.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:18.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:18.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:18.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:18.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:18.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:18.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:18.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:18.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:18.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:18.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:18.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:18.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:18.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:18.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:18.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:18.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:18.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:18.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:18.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:18.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:18.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:18.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:18.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:18.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:18.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:18.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:18.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:18.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:18.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:18.822 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:08:19.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:19.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:19.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:19.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:19.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:19.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:19.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:19.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:19.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:19.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:19.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:19.293 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:08:19.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:19.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:19.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:19.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:19.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:19.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:19.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:19.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:19.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:19.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:19.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:19.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:19.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:19.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:19.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:19.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:19.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:19.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:19.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:19.764 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:08:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:20.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:20.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:20.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:20.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:20.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:20.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:20.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:20.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:20.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:20.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:20.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:20.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:20.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:20.172 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:25.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:25.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:25.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:25.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:25.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:25.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:25.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:25.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:25.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:25.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:25.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:25.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:25.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:25.186 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:25.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:25.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:25.187 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:25.187 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:25.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:25.187 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:25.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:25.187 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:25.187 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:25.187 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:25.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:25.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:25.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:25.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:25.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:25.191 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:25.192 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:25.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:25.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:25.724 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:25.727 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:25.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:25.729 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:25.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:25.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:25.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:25.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:25.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:25.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:25.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:25.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:25.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:25.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:25.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:25.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:25.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:25.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:25.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:25.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:25.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:25.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:25.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:25.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:25.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:25.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:25.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:25.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:25.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:25.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:25.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:25.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:25.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:25.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:25.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:25.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:25.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:25.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:26.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:26.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:26.144 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:26.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:26.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:26.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:26.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:26.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:26.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:26.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:26.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:26.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:26.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:26.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.612 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:26.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:26.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:26.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:26.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:26.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:26.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:26.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:26.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:26.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:26.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:26.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:26.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:26.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:27.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:27.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:27.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:27.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:27.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:27.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:27.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:27.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:27.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:27.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:27.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:27.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:27.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:27.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:27.020 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:27.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:27.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:27.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:27.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:27.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:27.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:32.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:32.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:32.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:32.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:32.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:32.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:32.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:32.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:32.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:32.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:32.033 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:32.035 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:32.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:32.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:32.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:32.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:32.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:32.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:32.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:32.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:32.037 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:32.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:32.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:32.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:32.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:32.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:32.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:32.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:32.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:32.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:32.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:32.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:32.042 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:32.042 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:32.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:32.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:32.047 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:32.524 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:32.564 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:32.566 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:32.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:32.568 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:32.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:32.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:32.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:32.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:32.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:32.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:32.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:32.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:32.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:32.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:32.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:32.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:32.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:33.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:33.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:33.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:33.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:33.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:33.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:33.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:33.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:33.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:33.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:33.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:33.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:33.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:33.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:33.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:33.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:33.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:33.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:33.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:33.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:33.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:33.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:33.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:08:34.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:34.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:34.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:34.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:34.407 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:08:34.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:34.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:34.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:34.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:34.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:34.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:34.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:34.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:34.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:34.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:34.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:34.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:34.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:34.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:34.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:34.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:34.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:34.875 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:08:35.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:35.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:35.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:35.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:08:35.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:35.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:35.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:35.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:35.646 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=781 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:35.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:35.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:35.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:35.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:35.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:35.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:35.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:35.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:35.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:35.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:35.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:35.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:35.817 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:08:36.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:36.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:36.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:36.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:36.288 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:08:36.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:36.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:36.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:36.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:36.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:36.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:36.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:36.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:36.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:36.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:36.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:36.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:36.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:36.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:36.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:36.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:36.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:36.760 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:08:37.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:37.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:37.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:37.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:37.234 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:08:37.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:37.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:37.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:37.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:37.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:37.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:37.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:37.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:37.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:37.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:37.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:37.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:37.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:37.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:37.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:37.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:37.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:37.705 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:08:38.177 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:08:38.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:38.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:38.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:38.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:38.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:38.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:38.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:38.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:38.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:38.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:38.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:38.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:38.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:38.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:38.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:38.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:38.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:38.642 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:08:39.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:39.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:39.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:39.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:08:39.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:39.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:39.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:39.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:39.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:39.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:39.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:39.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:39.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:39.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:39.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:39.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:39.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:39.584 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:08:40.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:40.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:40.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:40.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:40.055 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:08:40.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:40.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:40.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:40.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:40.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:40.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:40.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:40.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:40.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:40.069 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:40.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:40.070 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:45.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:45.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:45.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:45.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:45.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:45.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:45.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:45.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:45.076 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:45.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:45.076 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:45.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:45.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:45.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:45.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:45.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:45.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:45.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:45.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:45.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:45.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:45.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:45.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:45.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:45.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:45.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:45.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:45.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:45.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:45.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:45.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:45.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:45.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:45.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:45.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:45.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:45.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:45.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:45.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:45.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:45.090 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:45.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:45.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:45.618 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:45.620 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:45.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:45.620 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:45.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:45.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:45.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:45.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:45.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:45.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:45.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:45.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:45.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:45.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:45.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:45.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:45.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:45.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:45.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:45.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:45.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:45.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:45.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:45.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:45.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:45.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:45.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:45.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:45.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:45.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:45.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:45.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:45.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:45.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:46.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:46.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:46.039 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:46.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:46.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:46.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:46.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:46.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:46.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:46.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:46.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:46.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:46.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:46.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:46.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:46.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:46.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:46.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:46.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:46.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:46.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:46.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:46.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:46.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:46.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:46.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:46.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:46.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:46.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:46.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:46.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:46.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:46.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:46.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:46.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:46.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:46.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:46.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:46.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:46.676 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:46.677 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:51.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:51.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:51.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:51.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:51.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:51.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:51.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:51.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:51.691 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:51.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:51.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:51.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:51.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:51.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:51.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:51.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:51.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:51.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:51.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:51.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:51.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:51.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:51.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:51.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:51.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:51.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:51.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:51.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:51.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:51.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:51.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:51.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:51.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:51.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:51.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:51.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:51.702 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:51.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:51.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:51.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:52.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:52.228 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:52.231 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:52.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.233 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:52.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:52.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:52.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:52.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:52.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:52.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:52.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:52.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:52.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:52.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:52.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:52.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:52.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:52.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:52.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:52.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:52.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:52.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:52.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:52.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:52.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:52.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:52.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:53.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:53.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:53.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:53.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:53.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:53.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:53.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:53.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:53.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:53.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:58.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:58.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:58.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:58.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:58.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:58.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:58.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:58.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:58.293 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:58.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:08:58.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:58.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:08:58.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:08:58.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:58.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:08:58.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:08:58.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:58.296 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:08:58.296 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:08:58.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:08:58.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:08:58.298 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:08:58.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:08:58.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:08:58.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:08:58.824 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:08:58.827 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:08:58.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:58.829 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:08:58.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:58.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:58.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:58.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:58.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:58.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:58.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:58.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:58.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:58.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:58.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:58.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:58.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:58.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:58.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:58.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:58.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:59.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:59.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:59.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:59.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:59.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:59.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:59.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:59.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:59.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:59.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:59.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:59.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:59.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:59.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:59.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:59.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:59.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:59.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:59.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:08:59.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:59.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:59.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:59.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:59.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:59.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:08:59.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:59.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:59.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:08:59.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:08:59.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:59.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:08:59.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:08:59.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:08:59.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:08:59.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:08:59.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:08:59.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:08:59.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:08:59.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:08:59.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:08:59.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:08:59.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:08:59.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:08:59.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:08:59.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:08:59.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:08:59.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:08:59.894 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:08:59.895 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.895 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.895 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:08:59.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:04.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:04.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:04.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:04.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:04.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:04.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:04.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:04.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:04.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:04.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:04.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:04.897 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:04.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:04.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:04.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:04.898 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:04.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:04.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:04.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:04.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:04.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:04.901 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:04.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:04.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:04.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:05.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:05.424 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:05.424 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:05.425 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:05.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:05.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:05.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:05.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:05.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:05.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:05.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:05.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:05.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:05.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:05.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:05.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:05.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:05.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:05.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:05.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:05.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:05.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:05.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:05.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:05.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:05.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:05.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:05.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:05.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:05.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:05.856 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:09:05.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:05.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:05.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:05.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:05.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:05.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:05.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:05.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:05.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:05.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:05.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:05.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:05.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:05.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:05.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:05.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:06.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:06.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:06.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:06.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:06.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:06.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:06.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:06.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:06.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:06.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:06.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:06.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:06.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:06.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:06.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:06.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:06.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:09:06.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:06.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:06.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:06.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:06.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:06.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:06.496 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:06.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:11.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:11.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:11.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:11.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:11.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:11.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:11.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:11.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:11.503 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:11.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:11.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:11.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:11.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:11.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:11.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:11.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:11.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:11.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:11.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:11.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:11.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:11.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:11.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:11.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:11.506 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:11.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:11.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:11.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:11.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:11.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:11.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:11.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:11.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:11.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:11.509 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:11.509 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:11.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:11.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:11.992 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:12.030 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:12.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:12.032 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:12.034 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:12.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:12.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:12.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:12.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:12.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:12.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:12.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:12.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:12.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:12.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:12.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:12.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:12.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:12.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:12.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:12.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:12.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:12.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:12.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:12.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:12.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:09:12.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:12.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:12.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:12.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:12.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:12.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:12.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:12.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:09:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:12.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:12.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:12.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:12.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:12.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:12.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:12.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:12.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:12.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:12.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:12.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:12.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:12.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:12.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:13.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:09:13.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:13.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:13.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:13.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:09:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:14.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:14.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:14.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:14.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:14.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:14.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:14.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:14.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:14.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:14.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:14.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:14.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:14.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:14.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:14.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:14.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:14.352 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:09:14.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:14.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:14.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:14.823 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:09:15.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:15.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:15.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:15.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:15.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:15.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:15.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:15.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:15.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:15.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:15.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:15.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:15.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:20.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:20.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:20.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:20.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:20.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:20.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:20.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:20.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:20.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:20.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:20.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:20.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:20.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:20.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:20.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:20.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:20.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:20.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:20.175 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:20.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:20.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:20.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:20.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:20.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:20.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:20.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:20.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:20.181 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:20.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:20.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:20.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:20.706 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:20.708 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:20.710 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:20.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:20.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:20.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:20.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:20.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:20.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:20.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:20.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:20.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:20.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:20.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:20.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:20.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:20.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:21.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:21.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:21.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:21.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:21.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:21.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:21.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:21.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:21.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:21.129 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:09:21.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:21.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:21.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:21.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:21.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:21.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:21.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:21.596 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:09:21.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:21.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:21.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:21.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:21.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:21.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:21.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:21.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:21.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:21.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:21.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:21.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:21.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:21.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:21.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:22.067 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:09:22.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:22.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:22.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:22.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:22.538 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:09:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:22.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:22.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:22.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:22.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:22.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:22.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:22.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:22.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:22.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:22.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:22.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:22.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:22.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:22.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:22.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:22.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:23.008 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:09:23.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:23.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:23.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:23.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:23.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:09:23.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:23.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:23.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:23.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:23.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:23.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:23.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:23.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:23.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:23.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:23.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:23.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:23.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:23.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:23.819 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:23.820 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.820 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.820 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.820 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.820 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.820 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.821 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:23.822 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:28.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:28.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:28.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:28.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:28.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:28.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:28.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:28.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:28.821 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:28.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:28.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:28.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:28.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:28.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:28.822 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:28.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:28.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:28.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:28.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:28.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:28.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:28.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:28.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:28.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:28.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:28.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:28.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:28.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:28.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:28.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:28.827 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:28.827 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:28.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:29.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:29.352 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:29.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:29.356 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:29.358 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:29.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:29.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:29.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:29.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:29.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:29.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:29.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:29.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:29.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:29.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:29.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:29.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:29.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:29.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:29.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:29.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:29.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:29.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:29.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:29.781 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:09:29.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:29.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:29.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:29.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:29.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:29.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:29.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:29.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:30.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:09:30.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:30.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:30.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:30.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:30.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:30.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:30.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:30.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:30.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:30.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:30.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:30.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:30.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:30.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:30.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:30.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:30.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:30.723 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:09:30.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:30.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:30.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:30.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:31.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:09:31.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:31.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:31.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:31.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:31.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:31.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:31.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:31.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:31.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:31.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:31.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:31.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:31.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:31.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:31.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:31.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:31.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:31.664 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:09:31.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:31.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:31.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:31.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:32.135 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:09:32.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:32.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:32.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:32.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:32.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:32.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:32.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:32.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:32.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:32.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:32.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:32.468 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:32.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:37.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:37.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:37.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:37.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:37.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:37.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:37.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:37.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:37.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:37.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:37.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:37.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:37.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:37.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:37.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:37.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:37.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:37.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:37.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:37.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:37.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:37.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:37.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:37.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:37.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:37.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:37.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:37.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:37.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:37.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:37.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:37.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:37.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:37.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:37.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:37.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:37.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:37.482 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:37.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:37.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:37.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:37.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:38.003 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:38.005 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:38.007 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:38.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:38.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:38.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:38.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:38.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:38.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:38.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:38.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:38.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:38.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:38.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:38.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:38.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:38.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:38.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:38.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:38.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:38.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:38.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:38.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:38.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:38.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:09:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:38.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:38.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:38.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:38.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:38.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:38.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:38.901 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:09:38.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:38.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:38.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:38.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:38.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:38.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:38.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:38.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:38.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:38.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:38.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:38.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:38.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:38.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:39.372 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:09:39.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:39.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:39.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:39.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:39.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:09:39.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:40.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:40.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:40.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:40.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:40.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:40.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:40.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:40.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:40.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:40.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:09:40.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:09:40.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:40.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:09:40.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:09:40.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:40.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:40.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:09:40.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:40.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:40.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:40.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:40.785 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:09:41.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:41.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:09:41.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:41.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:41.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:41.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:41.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:41.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:41.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:41.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:41.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:41.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:41.125 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:41.125 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.125 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.126 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.126 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.126 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.126 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.126 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.126 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=790 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:41.127 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=790 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:46.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:46.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:46.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:46.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:46.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:46.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:46.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:46.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:46.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:46.133 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:46.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:46.137 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:46.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:46.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:46.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:46.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:46.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:46.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:46.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:46.140 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:46.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:46.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:46.141 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:46.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:46.141 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:46.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:46.141 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:46.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:46.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:46.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:46.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:46.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:46.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:46.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:46.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:46.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:46.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:46.146 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:46.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:46.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.147 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:46.147 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:46.147 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:46.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:46.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:46.152 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:46.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:46.676 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:46.678 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:46.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:46.680 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:46.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:46.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:46.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:46.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:46.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:46.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:46.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:46.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:46.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:46.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:46.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:46.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:46.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:46.723 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:46.723 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:51.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:51.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:51.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:51.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:51.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:51.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:51.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:51.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:51.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:51.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:51.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:51.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:51.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:51.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:51.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:51.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:51.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:51.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:51.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:51.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:51.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:51.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:51.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:51.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:51.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:51.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:51.747 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:51.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:51.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:52.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:52.276 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:52.278 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:52.281 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:52.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:52.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:52.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:52.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:52.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:52.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:52.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:52.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:52.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:52.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:52.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:52.331 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:57.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:57.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:57.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:57.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:57.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:57.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:57.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:57.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:57.341 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:57.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:09:57.341 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:09:57.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:09:57.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:09:57.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:57.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:57.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:57.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:09:57.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:09:57.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:09:57.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:57.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:09:57.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:09:57.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:57.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:09:57.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:09:57.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:57.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:09:57.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:57.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:09:57.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:09:57.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:09:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:57.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:09:57.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:09:57.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:09:57.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:09:57.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:09:57.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:09:57.349 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:09:57.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:09:57.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:09:57.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:09:57.874 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:09:57.876 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:09:57.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:09:57.879 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:09:57.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:09:57.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:09:57.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:09:57.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:09:57.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:09:57.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:09:57.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:09:57.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:09:57.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:09:57.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:09:57.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:09:57.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:09:57.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:09:57.917 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:09:57.917 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:10:02.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:02.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:02.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:02.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:02.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:02.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:02.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:02.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:02.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:02.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:02.929 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:10:02.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:10:02.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:10:02.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:02.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:02.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:02.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:10:02.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:02.934 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:10:02.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:02.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:10:02.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:10:02.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:02.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:02.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:02.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:10:02.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:02.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:10:02.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:02.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:10:02.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:10:02.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:02.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:02.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:02.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:10:02.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:02.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:10:02.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:02.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:10:02.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:10:02.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.943 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:10:02.943 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:10:02.943 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:10:02.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:02.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:02.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:02.946 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:10:07.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:07.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:07.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:07.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:07.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:07.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:07.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:07.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:07.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:07.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:07.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:10:07.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:10:07.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:10:07.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:07.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:07.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:07.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:07.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:07.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:07.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:10:07.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:07.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:07.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:10:07.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.963 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:10:07.963 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:10:07.963 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:10:07.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:07.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:07.968 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:10:08.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:10:08.485 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:10:08.487 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:10:08.489 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:10:08.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:08.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:08.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:08.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:08.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:08.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:08.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:08.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:08.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:08.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:08.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:08.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:08.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:08.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:08.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:10:08.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:08.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:08.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:08.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:09.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:10:09.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:09.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:09.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:09.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:09.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:09.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:09.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:09.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:09.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:09.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:09.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:09.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:09.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:09.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:09.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:09.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:09.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:09.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:10:09.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:09.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:09.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:09.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:10:10.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:10.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:10.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:10.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:10.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:10.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:10.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:10.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:10.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:10.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:10.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:10.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:10.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:10.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:10.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:10.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:10.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:10.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:10:10.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:10.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:10.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:10.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:11.259 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:10:11.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:11.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:11.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:11.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:11.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:11.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:11.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:11.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:11.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:11.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:11.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:11.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:11.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:11.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:11.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:11.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:11.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:11.730 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:10:11.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:11.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:11.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:11.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:12.201 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:10:12.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:12.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:12.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:12.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:12.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:12.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:12.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:12.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:12.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:12.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:12.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:12.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:12.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:12.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:12.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:12.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:12.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:10:12.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:12.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:12.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:12.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:12.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:12.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:12.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:12.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:13.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:13.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:13.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:13.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:13.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:13.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:13.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:13.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:13.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:13.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:13.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:13.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:13.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:13.145 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:10:13.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:13.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:13.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:13.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:13.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:13.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:13.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:13.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:13.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:13.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:13.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:13.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:13.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:10:13.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:13.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:13.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:13.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:13.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.088 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:10:14.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:14.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:14.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:14.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:14.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:14.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:14.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:14.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:14.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:14.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:14.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:14.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:14.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:14.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:14.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:10:14.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:14.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:14.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:14.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:14.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:14.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:14.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:14.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:14.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:14.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:14.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:14.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:14.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:14.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:15.027 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:10:15.497 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:10:15.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:15.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:15.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:15.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:15.512 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1637 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:10:15.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:15.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:15.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:15.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:15.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:15.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:15.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:15.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:15.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:15.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:15.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:15.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:15.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:15.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:15.968 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:10:16.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:16.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:16.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:16.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:16.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:16.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:16.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:16.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:16.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:16.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:16.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:16.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:16.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:16.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.440 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:10:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:16.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:16.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:16.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:16.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:16.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:16.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:16.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:16.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:16.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:16.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:16.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:16.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:16.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:16.912 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:10:17.385 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:10:17.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:17.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:17.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:17.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:17.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:17.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:17.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:17.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:17.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:17.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:17.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:17.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:17.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:17.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:17.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:17.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:17.852 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:10:18.323 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:10:18.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:18.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:18.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:18.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:18.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:18.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:18.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:18.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:18.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:18.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:18.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:18.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:18.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:18.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:18.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:18.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:18.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:18.794 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:10:19.267 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:10:19.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:19.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:19.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:19.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:19.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:19.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:19.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:19.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:19.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:19.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:19.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:19.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:19.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:19.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:19.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:19.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:19.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:19.739 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:10:20.211 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:10:20.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:20.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:20.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:20.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:20.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:20.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:20.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:20.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:20.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:20.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:20.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:20.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:20.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:20.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:20.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:20.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:20.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:20.682 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:10:21.152 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:10:21.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:21.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:21.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:21.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:21.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:21.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:21.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:21.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:21.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:21.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:21.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:21.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:21.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:21.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:21.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:21.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:21.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:21.623 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:10:22.094 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:10:22.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:22.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:22.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:22.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:22.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:22.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:22.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:22.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:22.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:22.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:22.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:22.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:22.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:22.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:22.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:22.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:22.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:22.565 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:10:23.036 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:10:23.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:23.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:23.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:23.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:23.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:23.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:23.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:23.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:23.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:23.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:23.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:23.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:23.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:23.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:23.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:23.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:23.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:23.506 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:10:23.977 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:10:24.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:24.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:24.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:24.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:24.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:24.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:24.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:24.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:24.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:24.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:24.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:24.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:24.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:24.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:24.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:24.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:24.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:24.450 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:10:24.923 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:10:25.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:25.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:25.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:25.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:25.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:25.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:25.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:25.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:25.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:25.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:25.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:25.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:25.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:25.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:25.075 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:10:30.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:30.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:30.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:30.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:30.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:30.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:30.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:30.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:30.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:30.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:30.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:10:30.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:10:30.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:10:30.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:30.086 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:30.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:30.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:10:30.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:30.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:10:30.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:30.088 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:30.088 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:10:30.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:30.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:10:30.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:10:30.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:30.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:30.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:30.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:10:30.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:30.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:10:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:30.091 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:10:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:10:30.092 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:10:30.092 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:10:30.092 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:30.097 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:10:30.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:10:30.616 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:10:30.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:30.620 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:10:30.622 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:10:30.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:30.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:30.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:30.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:30.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:30.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:30.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:30.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:30.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:30.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:30.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:30.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:30.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:30.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:30.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:30.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:30.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:30.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:30.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:30.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:30.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:30.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:30.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:30.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:30.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:30.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:30.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:30.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:30.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:30.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.039 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:10:31.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:31.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:31.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:31.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:31.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:31.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:31.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:31.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:31.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:31.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:31.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:31.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:31.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:31.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:31.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:31.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:31.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:31.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:31.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:31.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:31.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:31.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:31.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:10:31.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:31.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:31.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:10:31.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:10:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:31.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:10:31.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:10:31.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:10:31.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:10:31.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:10:31.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:10:31.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:31.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:31.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:31.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:31.686 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:10:36.688 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:10:36.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:10:36.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:36.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:36.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:36.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:36.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:10:36.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:36.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:36.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:10:36.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:36.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:10:36.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:10:36.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:36.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:10:36.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:10:36.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:10:36.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:10:36.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:10:36.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:36.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:10:36.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:10:36.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:10:36.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:10:36.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:10:36.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:10:36.709 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:10:36.709 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:10:36.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:10:36.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:10:36.714 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:10:37.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:10:37.664 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:10:38.131 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:10:38.594 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:10:39.058 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:10:39.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:10:39.984 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:10:40.448 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:10:40.911 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:10:41.374 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:10:41.838 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:10:42.301 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:10:42.765 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:10:43.228 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:10:43.691 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:10:44.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:10:44.618 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:10:45.081 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:10:45.544 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:10:46.007 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:10:46.471 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:10:46.934 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:10:47.398 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:10:47.861 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:10:48.324 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:10:48.788 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:10:49.251 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:10:49.714 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:10:50.178 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:10:50.641 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:10:51.104 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:10:51.568 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:10:52.031 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:10:52.494 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:10:52.957 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:10:53.421 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:10:53.884 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:10:54.347 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:10:54.811 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:10:55.274 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:10:55.737 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:10:56.200 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:10:56.664 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:10:57.127 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:10:57.590 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:10:58.054 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:10:58.517 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:10:58.980 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:10:59.444 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:10:59.907 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:11:00.371 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:11:00.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:11:00.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:11:00.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:11:00.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:11:00.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:11:00.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:11:00.746 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:00.746 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:11:05.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:11:05.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:11:05.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:11:05.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:11:05.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:11:05.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:11:05.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:11:05.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:11:05.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:05.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:11:05.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:11:05.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:11:05.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:11:05.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:11:05.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:05.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:11:05.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:11:05.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:11:05.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:11:05.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:05.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:11:05.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:11:05.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:11:05.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:05.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:11:05.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:11:05.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:11:05.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:11:05.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:05.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:11:05.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:11:05.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:11:05.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:05.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:11:05.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:11:05.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:11:05.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:11:05.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:05.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:11:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:11:05.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:11:05.775 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:11:05.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:05.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:05.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:05.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:05.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:11:06.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:11:06.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:11:07.204 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:11:07.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:11:08.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:11:08.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:11:09.081 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:11:09.544 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:11:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:11:10.471 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:11:10.934 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:11:11.398 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:11:11.861 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:11:12.324 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:11:12.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:11:13.251 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:11:13.714 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:11:14.178 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:11:14.641 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:11:15.104 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:11:15.568 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:11:16.031 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:11:16.495 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:11:16.958 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:11:17.421 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:11:17.885 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:11:18.348 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:11:18.812 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:11:19.275 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:11:19.738 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:11:20.201 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:11:20.665 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:11:21.128 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:11:21.592 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:11:22.055 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:11:22.518 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:11:22.981 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:11:23.445 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:11:23.908 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:11:24.371 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:11:24.835 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:11:25.298 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:11:25.762 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:11:26.225 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:11:26.688 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:11:27.152 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:11:27.615 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:11:28.078 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:11:28.542 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:11:29.005 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:11:29.468 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:11:29.932 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:11:30.396 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:11:30.861 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:11:31.325 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:11:31.788 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:11:32.252 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:11:32.715 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:11:33.178 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:11:33.642 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:11:34.105 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:11:34.568 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:11:35.032 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:11:35.495 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:11:35.959 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:11:36.422 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:11:36.885 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:11:37.349 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:11:37.812 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:11:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:11:38.738 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:11:39.202 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:11:39.665 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:11:40.128 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:11:40.592 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:11:41.055 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:11:41.519 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:11:41.982 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:11:42.445 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:11:42.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:42.909 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:11:43.372 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:11:43.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:43.836 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:11:44.299 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:11:44.762 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:11:44.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:45.225 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:11:45.689 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:11:45.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:46.152 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:11:46.615 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:11:46.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:47.079 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:11:47.542 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:11:47.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:47.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:11:47.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:11:47.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:11:47.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:11:47.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:11:47.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:11:47.814 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:11:52.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:11:52.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:11:52.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:11:52.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:11:52.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:11:52.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:11:52.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:11:52.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:11:52.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:52.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:11:52.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:11:52.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:11:52.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:11:52.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:11:52.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:52.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:11:52.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:11:52.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:11:52.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:11:52.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:52.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:11:52.835 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:11:52.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:11:52.835 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:52.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:11:52.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:11:52.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:11:52.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:11:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:52.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:11:52.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:11:52.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:11:52.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:11:52.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:11:52.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:11:52.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:11:52.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:11:52.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:52.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:11:52.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:11:52.842 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:11:52.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:11:52.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:11:53.325 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:11:53.358 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:11:53.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:11:53.359 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:11:53.360 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:11:53.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:11:53.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:11:53.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:11:53.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:53.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:11:53.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:11:53.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:11:53.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:11:53.417 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:11:53.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:11:53.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:11:53.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:11:53.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:53.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:53.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:11:53.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:53.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:53.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:53.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:54.264 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:11:54.278 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:11:54.737 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:11:54.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:54.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:54.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:54.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:55.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:11:55.682 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:11:55.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:55.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:55.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:55.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:56.155 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:11:56.628 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:11:56.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:56.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:56.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:56.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:57.100 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:11:57.571 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:11:57.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:11:57.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:57.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:11:57.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:11:57.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:11:57.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:11:57.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:11:57.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:57.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:11:57.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:11:57.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:11:57.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:11:57.709 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:11:57.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:11:57.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:11:57.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:11:57.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:57.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:11:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:11:57.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:11:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:11:57.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:11:58.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:11:58.514 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:11:58.851 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:11:58.987 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:11:59.459 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:11:59.930 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:12:00.403 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:12:00.876 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:12:01.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:12:01.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:01.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:01.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:01.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:01.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:01.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:01.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:01.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:01.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:01.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:01.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:01.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:01.817 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:01.819 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:12:01.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:01.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:01.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:01.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:01.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:02.253 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:02.284 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:12:02.756 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:12:03.226 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:12:03.697 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:12:04.168 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:12:04.639 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:12:05.111 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:12:05.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:05.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:05.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:05.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:05.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:05.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:05.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:05.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:05.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:05.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:05.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:05.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:05.575 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:05.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:05.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:05.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:05.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:05.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:05.583 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:12:06.051 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:12:06.439 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:06.524 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:12:06.911 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:06.997 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:12:07.469 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:12:07.857 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:07.942 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:12:08.412 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:12:08.881 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:12:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:09.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:09.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:09.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:09.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:09.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:09.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:09.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:09.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:09.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:09.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:09.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:09.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:12:09.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:12:09.295 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3559 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:09.295 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:14.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:12:14.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:12:14.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:14.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:14.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:14.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:14.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:14.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:12:14.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:14.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:12:14.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:12:14.306 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:12:14.306 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:12:14.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:12:14.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:14.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:14.307 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:12:14.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:12:14.307 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:12:14.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:14.308 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:12:14.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:12:14.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:12:14.309 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:14.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:14.309 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:12:14.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:12:14.309 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:12:14.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:14.311 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:12:14.311 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:12:14.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:12:14.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:14.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:14.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:12:14.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:12:14.312 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:12:14.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:14.314 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:12:14.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:12:14.316 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:12:14.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:14.320 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:12:14.797 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:12:14.843 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:12:14.845 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:14.847 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:12:14.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:14.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:14.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:14.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:14.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:14.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:14.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:14.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:14.890 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:14.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:14.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:14.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:14.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:15.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:12:15.271 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:15.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:15.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:15.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:15.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:15.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:12:15.750 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:15.752 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:16.211 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:12:16.236 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:16.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:16.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:16.683 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:12:16.716 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:17.154 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:12:17.196 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:17.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:17.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:17.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:17.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:12:17.676 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:18.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:12:18.161 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:18.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:18.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:18.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:18.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:18.572 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:12:18.641 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:19.045 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:12:19.121 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:19.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:19.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:19.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:19.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:19.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:12:19.608 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:19.990 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:12:20.088 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:20.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:12:20.567 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:20.932 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:12:21.047 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:21.403 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:12:21.527 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:21.873 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:12:22.007 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:22.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:12:22.487 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:22.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:22.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:22.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:22.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:22.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:22.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:22.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:22.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:22.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:22.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:22.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:22.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:22.524 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:22.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:22.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:22.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:22.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:22.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:22.814 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:12:23.208 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:23.285 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:12:23.688 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:23.690 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:23.752 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:12:24.163 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:24.223 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:12:24.643 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:24.693 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:12:25.123 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:25.164 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:12:25.603 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:25.635 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:12:26.084 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:26.105 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:12:26.564 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:26.576 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:12:27.043 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:27.047 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:12:27.518 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:12:27.524 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:27.989 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:12:28.003 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:28.461 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:12:28.483 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:12:28.964 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:29.401 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:12:29.443 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:29.872 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:12:29.924 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:30.346 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:12:30.404 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:30.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:30.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:30.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:30.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:30.412 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=3485 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:30.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:30.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:30.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:30.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:30.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:30.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:30.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:30.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:30.430 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:30.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:30.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:30.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:30.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:30.777 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:30.813 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:12:31.247 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:31.250 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:31.284 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:12:31.718 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:31.755 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:12:32.189 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:32.228 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:12:32.660 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:32.701 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:12:33.136 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:33.173 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:12:33.607 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:12:34.078 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:34.114 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:12:34.549 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:34.587 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:12:35.019 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:35.060 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:12:35.495 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:35.526 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:12:35.961 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:35.998 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:12:36.432 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:36.470 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:12:36.903 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:36.943 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:12:37.379 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:37.415 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:12:37.849 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:37.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:37.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:37.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:37.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:37.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:37.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:37.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:37.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:37.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:37.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:37.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:37.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:37.881 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:37.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:37.885 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:12:37.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:37.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:37.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:37.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:38.275 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:38.356 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:12:38.745 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:38.748 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:38.827 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:12:39.216 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:39.219 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:39.298 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:12:39.687 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:39.769 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:12:40.158 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:40.160 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:12:40.242 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:12:40.628 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:40.714 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:12:41.105 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:41.187 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:12:41.575 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:41.660 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:12:42.046 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:42.132 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:12:42.522 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:42.604 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:12:42.993 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:43.075 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:12:43.464 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:43.548 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:12:43.935 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:44.021 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:12:44.411 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:44.493 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:12:44.882 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:44.964 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:12:45.353 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:45.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:45.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:45.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:45.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:45.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:45.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:45.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:12:45.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:12:45.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:45.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:50.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:12:50.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:12:50.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:50.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:50.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:50.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:50.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:50.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:12:50.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:50.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:12:50.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:12:50.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:12:50.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:12:50.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:12:50.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:12:50.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:12:50.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:12:50.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:12:50.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:12:50.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:12:50.386 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:12:50.386 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:12:50.386 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:12:50.391 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:12:50.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:12:50.914 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:12:50.917 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:12:50.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:50.920 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:12:50.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:50.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:50.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:50.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:50.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:50.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:50.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:50.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:50.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:50.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:50.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:50.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:50.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:51.335 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:12:51.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:51.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:51.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:51.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:51.806 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:12:52.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:12:52.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:52.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:52.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:52.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:52.747 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:12:53.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:53.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:53.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:53.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:53.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:53.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:53.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:53.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:53.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:53.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:53.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:53.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:53.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:53.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:53.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:53.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:53.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:53.217 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:12:53.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:53.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:53.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:53.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:53.684 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:12:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:12:54.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:54.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:54.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:54.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:54.626 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:12:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:12:55.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:55.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:55.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:55.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:55.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:55.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:55.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:12:55.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:55.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:55.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:55.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:12:55.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:12:55.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:55.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:12:55.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:12:55.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:55.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:55.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:55.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:55.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:55.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:55.571 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:12:56.043 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:12:56.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:12:56.985 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:12:57.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:12:57.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:12:57.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:12:57.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:12:57.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:12:57.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:12:57.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:12:57.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:12:57.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:12:57.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:12:57.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:12:57.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:12:57.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:12:57.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:12:57.395 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1519 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:12:57.395 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1519 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:02.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:02.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:02.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:02.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:02.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:02.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:02.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:02.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:02.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:02.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:02.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:02.412 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:02.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:02.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:02.413 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:02.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:02.413 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:02.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:02.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:02.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:02.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:02.415 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:02.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:02.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:02.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:02.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:02.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:02.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:02.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:02.418 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:02.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:02.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:02.422 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:02.422 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:02.422 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:02.427 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:02.898 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:02.950 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:02.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:02.952 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:02.953 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:02.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:02.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:02.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:02.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:02.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:02.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:02.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:02.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:02.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:02.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:02.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:02.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:02.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:03.370 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:03.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:03.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:03.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:03.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:03.841 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:04.312 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:13:04.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:04.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:04.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:04.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:04.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:13:05.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:05.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:05.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:05.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:05.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:05.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:05.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:05.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:05.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:05.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:05.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:05.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:05.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:05.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:05.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:05.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:05.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:05.252 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:13:05.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:05.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:05.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:05.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:05.724 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:13:06.195 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:13:06.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:06.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:06.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:06.668 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:13:07.141 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:13:07.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:07.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:07.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:07.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:07.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:07.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:07.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:07.272 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:13:12.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:12.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:12.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:12.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:12.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:12.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:12.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:12.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:12.285 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:12.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:12.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:12.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:12.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:12.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:12.288 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:12.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:12.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:12.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:12.289 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:12.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:12.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:12.290 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:12.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:12.290 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:12.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:12.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:12.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:12.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:12.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:12.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:12.292 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:12.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:12.295 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:12.295 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:12.295 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:12.300 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:12.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:12.815 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:12.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:12.817 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:12.819 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:12.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:12.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:12.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:12.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:12.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:12.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:12.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:12.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:12.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:12.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:12.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:12.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:12.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:13.243 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:13.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:13.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:13.715 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:14.185 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:13:14.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:14.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:14.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:14.657 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:13:14.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:14.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:14.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:14.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:14.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:14.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:14.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:14.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:14.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:14.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:14.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:14.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:14.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:14.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:14.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:14.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:14.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:15.130 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:13:15.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:15.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:15.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:15.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:15.602 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:13:16.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:13:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:16.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:16.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:16.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:16.545 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:13:17.018 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:13:17.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:17.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:17.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:17.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:17.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:17.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:17.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:17.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:17.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:17.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:17.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:17.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:17.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:17.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:17.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:17.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:17.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:17.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:17.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:17.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:17.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:17.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:13:17.957 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:13:18.428 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:13:18.899 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:13:19.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:19.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:19.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:19.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:19.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:19.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:19.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:19.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:19.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:19.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:19.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:19.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:19.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:19.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:19.201 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:13:19.201 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.206 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.206 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.206 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.207 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.207 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.207 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.207 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.207 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.207 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:19.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:24.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:24.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:24.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:24.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:24.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:24.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:24.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:24.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:24.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:24.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:24.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:24.205 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:24.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:24.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:24.206 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:24.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:24.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:24.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:24.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:24.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:24.207 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:24.207 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:24.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:24.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:24.208 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:24.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:24.208 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:24.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:24.209 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:24.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:24.209 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:24.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:24.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:24.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:24.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:24.211 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:24.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:24.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:24.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:24.732 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:24.733 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:24.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:24.735 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:24.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:24.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:24.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:24.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:24.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:24.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:24.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:24.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:24.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:24.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:24.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:24.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:24.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:25.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:25.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:25.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:25.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:25.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:25.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:26.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:13:26.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:26.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:26.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:26.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:26.582 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:13:26.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:26.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:26.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:26.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:26.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:26.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:26.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:26.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:26.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:26.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:26.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:26.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:26.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:26.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:26.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:26.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:26.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:27.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:13:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:27.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:27.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:27.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:13:27.996 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:13:28.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:28.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:28.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:28.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:28.469 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:13:28.942 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:13:29.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:29.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:29.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:29.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:29.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:29.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:29.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:29.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:29.079 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:13:34.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:34.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:34.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:34.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:34.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:34.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:34.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:34.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:34.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:34.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:34.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:34.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:34.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:34.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:34.089 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:34.089 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:34.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:34.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:34.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:34.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.092 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:34.092 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:34.092 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:34.093 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:34.097 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:34.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:34.607 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:34.608 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:34.609 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:34.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:34.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:34.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:34.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:34.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:34.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:34.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:34.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:34.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:34.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:34.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:34.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:34.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:35.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:35.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:35.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:35.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:35.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:35.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:35.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:13:36.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:36.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:36.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:36.455 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:13:36.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:36.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:36.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:36.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:36.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:36.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:36.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:36.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:36.888 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:36.888 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:41.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:41.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:41.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:41.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:41.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:41.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:41.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:41.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:41.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:41.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:41.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:41.904 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:41.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:41.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:41.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:41.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:41.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:41.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:41.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:41.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:41.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:41.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:41.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:41.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:41.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:41.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:41.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:41.911 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:41.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:41.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:42.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:42.434 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:42.435 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:42.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:42.437 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:42.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:42.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:42.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:42.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:42.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:42.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:42.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:42.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:42.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:42.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:42.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:42.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:42.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:42.862 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:42.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:42.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:42.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:42.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:43.332 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:43.804 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:13:43.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:43.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:43.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:43.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:44.277 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:13:44.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:44.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:44.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:44.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:44.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:44.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:44.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:44.722 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:13:49.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:49.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:49.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:49.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:49.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:49.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:49.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:49.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:49.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:49.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:49.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:49.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:49.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:49.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:49.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:49.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:49.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:49.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:49.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:49.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:49.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:49.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:49.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:49.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:49.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:49.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:49.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:49.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:49.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:49.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:49.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:49.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:49.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:49.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:49.747 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:49.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:49.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:50.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:50.275 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:50.278 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:50.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:50.280 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:50.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:50.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:50.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:50.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:50.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:50.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:50.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:50.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:50.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:50.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:50.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:50.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:50.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:50.701 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:50.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:50.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:50.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:50.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:50.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:50.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:50.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:50.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:50.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:50.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:50.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:50.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:50.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:50.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:50.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:50.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:50.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:50.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:50.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:50.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:51.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:51.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:51.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:51.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:51.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:51.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:51.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:51.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:51.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:51.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:51.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:51.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:51.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:51.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:51.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:51.191 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:13:51.192 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:51.192 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:51.192 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:56.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:56.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:56.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:56.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:56.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:56.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:56.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:56.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:56.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:56.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:13:56.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:13:56.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:13:56.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:13:56.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:56.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:56.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:56.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:13:56.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:13:56.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:13:56.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:56.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:13:56.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:13:56.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:56.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:56.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:56.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:13:56.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:13:56.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:13:56.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:56.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:13:56.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:13:56.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:56.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:13:56.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:56.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:13:56.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:13:56.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:13:56.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:13:56.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:13:56.207 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:13:56.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:13:56.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:13:56.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:13:56.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:13:56.746 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:13:56.749 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:13:56.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:56.751 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:13:56.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:56.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:56.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:56.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:56.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:56.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:56.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:56.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:56.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:56.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:56.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:56.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:56.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:57.160 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:13:57.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:57.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:57.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:57.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:57.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:57.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:57.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:57.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:57.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:57.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:57.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:13:57.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:57.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:57.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:57.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:13:57.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:13:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:57.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:13:57.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:13:57.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:57.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:57.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:13:57.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:13:57.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:13:57.631 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:13:57.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:13:57.631 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=308 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:13:57.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:13:57.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:13:57.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:13:57.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:13:57.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:13:57.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:13:57.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:13:57.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:13:57.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:13:57.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:13:57.640 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:02.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:02.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:02.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:02.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:02.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:02.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:02.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:02.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:02.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:02.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:02.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:02.656 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:02.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:02.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:02.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:02.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:02.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:02.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:02.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:02.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:02.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:02.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:02.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:02.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:02.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:02.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:02.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:02.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:02.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:02.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:02.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:02.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:02.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:02.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:02.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:02.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:02.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:02.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:02.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:02.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:02.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:02.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:02.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:02.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:02.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:02.666 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:02.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:02.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:02.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:02.671 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:03.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:03.190 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:03.192 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:03.194 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:03.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:03.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:03.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:03.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:03.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:03.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:03.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:03.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:03.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:03.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:03.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:03.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:03.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:03.621 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:03.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:03.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:03.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:03.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:03.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:03.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:03.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:03.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:03.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:03.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:03.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:03.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:03.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:03.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:03.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:03.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:03.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:03.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:03.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:03.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:04.092 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:14:04.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:04.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:04.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:04.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:04.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:04.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:04.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:04.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:04.146 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:09.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:09.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:09.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:09.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:09.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:09.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:09.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:09.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:09.158 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:09.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:09.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:09.159 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:09.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:09.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:09.160 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:09.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:09.160 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:09.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:09.160 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:09.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:09.162 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:09.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:09.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:09.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:09.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:09.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:09.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:09.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:09.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:09.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:09.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:09.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:09.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:09.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:09.167 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:09.172 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:09.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:09.698 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:09.701 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:09.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:09.703 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:09.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:09.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:09.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:09.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:09.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:09.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:09.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:09.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:09.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:09.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:09.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:09.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:09.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:10.117 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:10.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:10.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:10.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:10.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:10.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:14:11.060 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:14:11.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:11.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:11.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:11.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:11.530 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:14:12.001 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:14:12.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:12.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:12.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:12.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:12.471 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:14:12.944 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:14:13.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:13.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:13.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:13.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:13.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:14:13.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:13.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:13.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:13.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:13.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:13.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:13.809 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1004 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.809 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.810 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.810 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.810 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.810 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.810 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:13.810 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:18.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:18.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:18.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:18.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:18.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:18.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:18.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:18.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:18.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:18.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:18.819 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:18.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:18.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:18.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:18.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:18.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:18.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:18.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:18.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:18.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:18.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:18.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:18.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:18.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:18.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:18.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:18.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:18.825 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:18.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:18.830 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:19.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:19.351 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:19.353 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:19.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:19.356 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:19.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:19.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:19.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:19.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:19.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:19.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:19.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:19.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:19.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:19.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:19.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:19.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:19.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:19.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:19.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:19.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:19.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:19.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:19.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:19.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:19.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:19.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:19.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.776 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:19.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:19.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:19.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:19.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:19.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:19.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:19.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:19.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:19.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:19.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:19.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:19.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:19.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:19.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:19.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:19.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:19.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:19.959 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:19.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=244 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:19.959 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:24.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:24.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:24.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:24.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:24.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:24.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:24.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:24.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:24.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:24.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:24.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:24.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:24.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:24.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:24.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:24.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:24.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:24.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:24.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:24.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:24.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:24.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:24.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:24.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:24.982 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:24.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:24.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:24.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:24.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:24.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:24.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:24.984 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:24.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:24.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:25.466 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:25.504 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:25.506 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:25.508 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:25.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:25.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:25.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:25.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:25.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:25.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:25.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:25.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:25.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:25.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:25.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:25.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:25.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:25.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:25.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:25.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:25.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:25.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:14:26.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:14:26.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:26.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:26.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:26.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:27.341 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:14:27.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:14:27.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:27.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:27.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:27.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:28.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:14:28.753 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:14:28.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:28.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:28.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:28.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:29.225 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:14:29.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:29.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:29.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:29.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:29.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:29.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:29.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:29.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:29.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:29.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:29.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:29.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:29.622 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:34.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:34.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:34.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:34.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:34.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:34.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:34.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:34.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:34.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:34.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:34.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:34.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:34.642 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:34.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:34.642 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:34.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:34.642 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:34.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:34.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:34.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:34.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:34.644 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:34.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:34.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:34.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:34.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:34.647 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:34.647 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:34.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:34.652 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:35.129 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:35.171 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:35.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:35.174 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:35.175 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:35.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:35.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:35.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:35.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:35.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:35.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:35.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:35.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:35.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:35.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:35.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:35.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:35.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:35.597 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:35.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:35.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:35.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:35.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:35.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:35.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:35.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:35.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:36.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:36.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:36.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:36.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:36.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:36.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:36.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:36.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:36.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:36.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:36.005 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:36.005 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:36.005 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:36.005 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:36.005 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:36.005 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:41.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:41.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:41.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:41.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:41.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:41.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:41.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:41.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:41.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:41.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:41.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:41.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:41.019 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:41.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:41.019 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:41.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:41.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:41.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:41.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:41.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:41.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:41.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:41.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:41.021 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:41.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:41.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:41.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:41.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:41.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:41.023 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:41.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:41.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:41.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:41.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:41.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:41.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:41.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:41.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:41.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:41.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:41.027 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:41.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:41.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:41.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:41.541 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:41.542 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:41.542 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:41.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:41.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:41.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:41.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:41.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:41.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:41.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:41.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:41.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:41.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:41.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:41.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:41.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:41.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:41.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:42.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:42.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:42.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:42.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:42.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:42.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:42.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:42.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:42.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:42.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:42.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:42.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:42.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:42.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:42.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:42.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:42.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:42.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:42.341 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:42.342 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:47.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:47.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:47.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:47.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:47.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:47.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:47.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:47.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:47.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:47.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:47.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:47.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:47.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:47.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:47.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:47.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:47.364 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:47.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:47.365 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:47.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:47.366 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:47.366 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:47.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:47.366 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:47.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:47.366 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:47.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:47.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:47.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:47.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:47.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:47.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:47.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:47.370 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:47.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:47.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:47.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:47.888 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:47.890 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:47.891 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:47.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:47.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:47.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:47.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:47.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:47.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:47.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:47.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:47.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:47.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:47.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:47.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:47.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:48.322 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:48.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:48.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:48.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:48.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:48.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:48.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:48.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:48.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:48.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:48.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:48.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:48.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:48.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:48.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:48.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:48.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:48.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:48.691 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:48.691 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:48.692 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=285 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:53.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:53.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:53.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:53.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:53.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:53.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:53.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:53.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:53.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:53.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:14:53.692 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:14:53.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:14:53.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:14:53.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:53.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:53.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:53.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:14:53.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:14:53.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:14:53.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:53.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:14:53.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:14:53.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:53.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:14:53.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:14:53.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:53.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:14:53.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:14:53.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:53.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:14:53.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:14:53.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:14:53.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:14:53.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:14:53.700 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:14:53.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:14:53.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:14:53.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:14:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:14:53.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:14:54.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:14:54.222 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:14:54.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:54.226 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:14:54.228 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:14:54.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:54.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:54.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:14:54.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:54.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:54.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:54.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:14:54.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:14:54.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:54.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:14:54.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:14:54.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:54.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:54.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:14:54.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:54.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:54.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:54.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:55.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:14:55.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:14:55.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:14:55.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:14:55.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:14:55.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:14:55.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:14:55.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:14:55.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:14:55.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:14:55.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:14:55.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:14:55.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:14:55.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:14:55.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:14:55.194 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.194 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:14:55.195 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:00.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:00.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:00.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:00.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:00.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:00.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:00.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:00.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:00.207 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:00.207 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:00.207 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:15:00.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:15:00.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:15:00.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:00.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:00.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:00.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:15:00.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:00.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:15:00.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:00.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:15:00.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:15:00.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:00.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:00.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:00.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:15:00.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:00.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:15:00.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:00.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:15:00.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:15:00.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:00.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:00.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:00.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:15:00.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:00.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:15:00.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:00.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:15:00.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:15:00.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:15:00.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:15:00.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:15:00.220 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:15:00.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:00.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:00.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:00.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:15:00.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:15:00.745 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:15:00.747 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:15:00.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:00.750 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:15:00.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:00.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:00.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:15:00.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:00.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:00.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:00.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:15:00.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:15:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:00.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:00.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:00.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:00.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:01.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:15:01.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:01.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:01.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:01.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:01.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:01.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:01.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:01.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:01.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:01.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:01.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:01.574 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:06.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:06.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:06.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:06.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:06.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:06.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:06.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:06.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:06.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:06.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:06.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:15:06.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:15:06.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:15:06.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:06.592 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:06.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:06.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:15:06.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:06.593 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:15:06.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:06.594 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:15:06.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:15:06.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:06.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:06.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:06.595 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:15:06.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:06.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:15:06.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:06.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:15:06.597 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:15:06.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:06.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:06.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:06.598 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:15:06.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:06.598 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:15:06.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:15:06.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:15:06.602 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:15:06.602 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:15:06.602 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:06.607 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:15:07.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:15:07.131 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:15:07.133 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:15:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:07.137 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:15:07.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:07.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:07.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:15:07.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:07.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:07.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:07.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:15:07.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:15:07.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:07.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:07.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:07.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:07.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:07.552 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:15:07.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:07.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:07.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:07.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:08.023 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:15:08.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:08.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:08.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:08.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:08.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:08.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:08.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:08.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:08.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:08.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:08.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:08.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:08.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:08.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:08.098 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:15:08.099 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:08.099 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:13.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:13.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:13.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:13.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:13.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:13.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:13.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:13.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:13.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:13.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:13.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:15:13.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:15:13.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:15:13.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:13.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:13.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:13.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:15:13.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:13.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:15:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:13.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:15:13.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:15:13.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:13.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:13.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:13.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:15:13.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:13.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:15:13.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:13.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:13.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:15:13.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:13.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:15:13.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:15:13.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:15:13.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:15:13.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:15:13.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:15:13.126 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:15:13.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:15:13.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:13.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:15:13.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:15:13.650 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:15:13.652 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:15:13.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:13.654 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:15:13.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:13.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:13.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:15:13.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:13.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:13.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:13.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:15:13.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:15:14.076 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:15:14.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:14.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:14.547 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:15:14.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:14.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:14.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:14.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:14.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:14.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:15:14.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:14.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:14.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:14.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:15:14.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:15:15.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:15:15.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:15.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:15.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:15.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:15.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:15:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:15:15.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:15:16.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:15:16.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:16.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:16.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:16.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:16.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:16.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:16.013 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:15:16.013 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:16.014 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:21.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:21.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:21.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:21.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:21.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:21.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:21.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:21.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:21.027 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:21.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:21.028 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:15:21.029 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:15:21.030 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:15:21.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:21.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:21.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:21.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:15:21.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:21.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:15:21.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:21.032 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:21.032 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:15:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:21.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:21.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:15:21.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:21.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:15:21.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:15:21.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:15:21.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:15:21.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:15:21.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:15:21.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:15:21.037 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:15:21.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:21.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:15:21.518 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:15:21.562 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:15:21.563 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:15:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:21.565 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:15:21.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:21.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:21.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:15:21.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:21.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:21.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:21.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:15:21.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:15:21.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:15:22.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:22.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:22.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:22.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:22.456 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:15:22.930 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:15:23.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:23.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:23.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:23.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:23.402 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:15:23.869 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:15:24.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:24.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:24.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:24.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:24.341 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:15:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:15:25.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:25.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:25.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:25.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:25.282 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:15:25.757 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:15:26.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:26.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:26.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:26.228 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:15:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:15:26.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:26.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:26.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:26.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:26.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:15:27.174 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:15:27.646 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:15:28.118 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:15:28.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:15:29.047 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:15:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:15:29.977 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:15:30.442 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:15:30.911 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:15:31.384 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:15:31.850 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:15:32.315 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:15:32.779 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:15:33.245 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:15:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:15:34.174 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:15:34.638 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:15:35.105 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:15:35.570 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:15:36.034 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:15:36.498 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:15:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:15:37.427 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:15:37.897 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:15:38.370 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:15:38.834 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:15:39.305 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:15:39.779 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:15:40.251 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:15:40.720 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:15:41.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:15:41.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:41.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:41.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:41.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:41.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:41.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:41.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:41.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:41.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:41.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:41.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:41.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:41.054 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:15:41.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:46.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:46.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:46.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:46.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:46.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:46.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:46.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:46.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:46.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:46.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:15:46.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:15:46.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:15:46.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:15:46.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:46.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:46.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:46.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:15:46.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:15:46.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:15:46.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:46.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:15:46.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:15:46.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:46.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:15:46.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:15:46.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:46.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:15:46.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:46.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:15:46.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:15:46.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:15:46.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:15:46.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:15:46.079 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:15:46.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:15:46.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:15:46.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:15:46.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:15:46.605 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:15:46.607 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:15:46.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:15:46.609 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:15:46.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:46.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:46.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:15:46.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:46.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:46.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:46.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:15:46.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:15:47.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:15:47.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:47.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:47.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:47.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:47.500 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:15:47.971 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:15:48.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:48.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:48.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:48.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:48.444 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:15:48.916 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:15:49.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:49.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:49.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:49.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:49.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:15:49.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:15:50.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:50.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:50.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:50.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:50.330 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:15:50.803 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:15:51.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:51.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:51.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:51.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:51.275 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:15:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:15:51.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:15:51.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:15:51.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:51.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:51.747 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:15:52.220 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:15:52.693 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:15:53.165 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:15:53.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:15:54.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:15:54.576 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:15:55.048 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:15:55.520 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:15:55.986 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:15:56.453 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:15:56.920 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:15:57.384 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:15:57.850 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:15:58.317 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:15:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:15:58.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:15:58.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:15:58.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:15:58.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:15:58.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:15:58.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:15:58.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:15:58.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:15:58.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:15:58.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:15:58.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:15:58.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:15:58.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:15:58.501 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2693 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2693 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2693 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:15:58.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2694 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:03.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:03.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:03.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:03.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:03.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:03.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:03.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:03.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:03.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:03.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:03.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:16:03.516 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:16:03.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:16:03.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:03.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:03.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:03.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:16:03.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:03.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:16:03.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:03.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:03.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:16:03.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:03.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:03.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:16:03.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:03.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:16:03.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:16:03.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:16:03.524 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:16:03.524 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:16:03.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:16:03.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:03.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:03.529 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:16:04.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:16:04.051 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:16:04.054 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:16:04.055 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:16:04.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:16:04.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:16:04.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:16:04.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:16:04.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:04.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:16:04.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:16:04.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:16:04.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:16:04.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:16:04.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:04.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:04.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:04.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:04.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:16:05.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:16:05.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:05.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:05.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:05.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:05.886 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:16:06.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:16:06.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:06.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:06.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:06.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:06.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:16:07.301 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:16:07.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:07.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:07.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:07.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:07.773 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:16:08.245 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:16:08.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:08.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:08.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:08.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:08.711 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:16:08.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:16:08.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:16:08.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:16:08.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:08.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:09.183 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:16:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:16:10.129 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:16:10.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:16:11.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:16:11.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:16:12.014 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:16:12.486 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:16:12.959 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:16:13.431 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:16:13.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:16:13.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:13.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:16:13.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:16:13.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:13.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:13.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:13.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:13.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:13.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:13.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:13.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:13.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:13.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:13.578 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2175 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.579 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:13.580 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:18.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:18.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:18.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:18.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:18.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:18.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:18.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:18.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:18.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:18.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:18.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:16:18.585 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:16:18.585 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:16:18.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:18.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:18.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:18.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:16:18.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:18.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:16:18.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:18.587 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:18.587 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:16:18.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:18.588 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:16:18.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:16:18.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:18.589 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:18.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:18.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:16:18.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:18.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:16:18.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:18.590 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:16:18.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:16:18.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:16:18.591 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:16:18.591 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:16:18.591 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:18.596 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:16:19.074 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:16:19.112 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:16:19.114 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:16:19.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:16:19.116 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:16:19.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:16:19.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:16:19.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:16:19.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:19.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:16:19.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:16:19.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:16:19.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:16:19.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:16:19.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:19.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:19.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:19.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:20.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:16:20.485 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:16:20.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:20.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:20.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:20.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:20.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:16:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:16:21.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:21.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:21.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:21.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:21.901 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:16:22.373 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:16:22.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:22.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:22.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:22.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:22.846 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:16:23.318 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:16:23.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:23.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:23.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:23.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:23.784 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:16:24.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:16:24.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:16:24.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:16:24.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:24.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:24.255 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:16:24.726 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:16:25.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:16:25.667 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:16:26.138 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:16:26.603 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:16:27.068 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:16:27.532 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:16:27.998 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:16:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:16:28.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:16:28.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:28.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:16:28.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:16:28.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:28.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:28.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:28.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:28.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:28.604 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:16:33.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:33.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:33.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:33.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:33.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:33.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:33.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:33.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:33.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:33.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:33.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:16:33.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:16:33.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:16:33.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:33.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:33.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:33.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:16:33.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:33.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:33.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:33.616 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:16:33.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:33.617 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:33.617 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:16:33.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:16:33.619 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:16:33.619 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:16:33.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.619 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:33.624 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:16:34.102 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:16:34.142 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:16:34.143 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:16:34.146 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:16:34.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:16:34.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:16:34.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:16:34.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:16:34.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:34.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:16:34.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:16:34.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:16:34.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:16:34.568 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:16:34.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:34.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:34.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:34.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:35.032 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:16:35.502 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:16:35.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:35.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:35.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:35.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:35.973 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:16:36.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:16:36.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:36.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:36.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:36.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:36.914 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:16:37.385 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:16:37.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:37.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:37.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:37.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:37.858 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:16:38.331 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:16:38.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:38.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:38.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:38.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:38.798 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:16:39.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:16:39.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:16:39.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:16:39.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:39.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:39.271 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:16:39.744 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:16:40.216 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:16:40.682 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:16:41.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:16:41.621 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:16:42.085 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:16:42.556 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:16:43.029 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:16:43.502 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:16:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:16:43.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:16:43.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:16:43.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:43.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:43.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:43.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:43.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:43.640 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:16:48.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:48.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:48.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:48.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:48.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:48.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:48.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:48.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:48.656 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:48.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:16:48.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:16:48.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:16:48.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:16:48.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:48.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:48.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:48.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:16:48.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:16:48.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:16:48.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:48.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:16:48.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:16:48.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:48.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:48.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:48.664 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:16:48.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:16:48.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:16:48.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:48.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:16:48.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:16:48.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:16:48.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:16:48.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:16:48.670 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:16:48.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:16:48.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:16:49.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:16:49.200 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:16:49.202 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:16:49.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:16:49.204 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:16:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:16:49.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:49.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:49.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:49.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:50.098 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:16:50.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:16:50.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:50.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:50.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:50.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:16:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:16:51.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:51.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:51.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:51.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:51.988 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:16:52.462 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:16:52.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:52.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:52.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:52.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:16:53.405 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:16:53.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:53.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:53.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:53.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:53.877 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:16:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:16:54.824 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:16:55.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:16:55.771 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:16:56.246 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:16:56.718 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:16:57.193 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:16:57.665 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:16:58.137 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:16:58.600 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:16:59.064 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:16:59.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:16:59.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:16:59.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:16:59.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:16:59.216 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:16:59.217 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:04.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:04.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:04.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:04.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:04.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:04.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:04.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:04.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:04.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:04.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:04.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:17:04.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:17:04.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:17:04.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:04.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:04.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:04.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:17:04.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:04.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:17:04.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:04.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:17:04.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:17:04.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:04.240 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:04.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:04.240 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:17:04.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:04.240 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:17:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:04.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:17:04.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:17:04.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:04.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:04.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:04.242 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:17:04.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:04.242 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:17:04.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:17:04.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:17:04.245 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:17:04.245 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:17:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:04.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:04.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:04.247 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:17:04.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:04.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:09.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:09.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:09.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:09.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:09.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:09.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:09.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:09.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:09.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:09.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:09.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:17:09.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:17:09.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:17:09.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:09.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:09.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:09.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:17:09.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:09.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:17:09.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:09.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:17:09.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:17:09.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:09.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:09.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:09.268 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:17:09.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:09.268 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:17:09.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:09.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:09.270 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:17:09.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:17:09.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:17:09.273 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:17:09.273 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:17:09.273 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:09.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:17:09.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:17:09.801 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:17:09.803 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:17:09.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:17:09.806 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:17:09.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:17:09.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:17:09.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:17:09.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:17:09.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:17:09.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:17:09.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:17:09.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:17:10.227 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:17:10.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:10.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:10.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:10.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:10.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:17:11.172 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:17:11.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:11.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:11.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:11.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:11.640 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:17:12.106 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:17:12.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:12.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:12.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:12.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:12.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:17:13.048 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:17:13.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:13.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:13.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:13.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:13.518 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:17:13.991 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:17:14.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:14.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:14.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:14.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:14.464 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:17:14.936 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:17:15.407 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:17:15.880 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:17:16.352 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:17:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:17:17.298 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:17:17.770 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:17:17.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:17:17.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:17:17.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:17.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:17.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:17.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:17.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:17.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:17.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:17.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:17.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:17.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:17.859 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:17.859 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:22.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:22.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:22.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:22.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:22.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:22.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:22.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:22.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:22.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:22.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:22.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:17:22.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:17:22.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:17:22.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:22.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:22.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:22.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:17:22.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:22.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:17:22.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:22.877 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:17:22.877 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:17:22.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:22.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:22.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:22.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:17:22.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:22.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:17:22.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:22.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:17:22.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:17:22.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:22.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:22.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:22.880 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:17:22.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:22.880 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:17:22.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:22.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:22.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:22.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:17:22.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:17:22.883 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:17:22.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:22.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:17:22.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:22.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:22.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:22.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:22.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:22.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:22.884 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:17:22.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:22.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:22.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:27.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:27.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:27.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:27.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:27.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:27.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:27.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:27.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:27.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:27.897 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:27.899 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:27.899 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:17:27.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:27.901 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:17:27.901 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:17:27.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:27.901 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:27.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:27.901 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:17:27.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:27.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:17:27.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:27.903 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:17:27.903 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:17:27.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:27.903 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:27.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:27.903 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:17:27.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:27.904 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:17:27.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.908 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:17:27.908 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:17:27.908 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:17:27.909 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:27.913 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:17:28.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:17:28.435 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:17:28.437 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:17:28.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:17:28.438 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:17:28.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:17:28.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:17:28.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:17:28.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:17:28.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:17:28.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:17:28.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:17:28.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:17:28.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:17:28.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:28.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:28.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:28.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:29.329 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:17:29.800 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:17:29.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:29.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:29.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:29.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:30.271 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:17:30.743 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:17:30.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:30.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:30.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:30.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:31.216 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:17:31.688 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:17:31.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:31.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:31.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:31.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:32.160 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:17:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:17:32.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:32.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:32.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:32.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:33.104 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:17:33.577 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:17:34.044 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:17:34.515 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:17:34.988 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:17:35.461 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:17:35.932 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:17:36.404 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:17:36.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:17:36.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:17:36.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:36.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:36.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:36.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:36.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:36.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:36.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:36.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:36.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:36.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:36.499 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:17:36.499 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.499 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.499 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.500 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:36.501 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:17:41.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:41.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:41.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:41.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:41.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:41.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:41.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:41.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:41.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:41.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:41.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:17:41.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:17:41.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:17:41.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:41.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:41.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:41.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:17:41.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:41.516 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:17:41.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:41.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:17:41.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:17:41.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:41.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:41.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:41.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:17:41.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:41.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:17:41.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:41.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:41.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:17:41.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:17:41.520 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:17:41.520 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:17:41.520 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:41.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:41.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:41.522 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:17:46.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:46.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:46.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:46.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:46.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:46.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:46.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:46.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:46.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:46.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:17:46.534 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:17:46.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:17:46.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:17:46.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:46.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:46.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:17:46.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:46.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:17:46.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:17:46.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:46.537 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:17:46.537 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:17:46.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:46.537 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:17:46.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:46.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:17:46.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:17:46.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:17:46.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:17:46.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:17:46.540 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:17:46.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:17:46.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:17:47.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:17:47.055 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:17:47.056 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:17:47.057 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:17:47.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:17:47.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:17:47.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:17:47.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:17:47.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:17:47.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:17:47.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:17:47.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:17:47.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:17:47.494 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:17:47.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:47.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:47.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:47.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:47.966 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:17:48.439 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:17:48.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:48.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:48.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:48.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:48.911 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:17:49.383 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:17:49.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:49.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:49.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:49.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:49.854 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:17:50.325 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:17:50.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:50.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:50.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:50.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:50.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:17:51.271 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:17:51.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:51.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:51.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:51.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:51.743 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:17:52.214 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:17:52.687 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:17:53.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:17:53.631 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:17:54.102 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:17:54.573 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:17:55.044 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:17:55.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:17:55.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:17:55.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:17:55.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:17:55.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:17:55.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:17:55.073 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:00.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:00.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:00.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:00.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:00.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:00.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:00.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:00.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:00.088 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:00.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:00.088 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:18:00.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:18:00.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:18:00.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:00.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:00.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:00.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:18:00.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:00.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:18:00.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:00.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:18:00.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:18:00.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:00.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:00.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:00.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:18:00.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:00.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:18:00.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:00.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:00.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:18:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:18:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:18:00.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:18:00.098 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:18:00.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:00.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:00.099 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:00.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:05.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:05.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:05.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:05.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:05.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:05.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:05.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:05.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:05.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:05.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:18:05.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:18:05.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:18:05.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:05.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:05.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:05.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:18:05.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:05.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:18:05.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:05.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:18:05.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:18:05.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:05.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:05.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:05.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:18:05.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:05.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:18:05.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:05.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:18:05.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:18:05.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:05.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:05.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:05.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:18:05.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:05.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:18:05.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:18:05.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:18:05.124 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:18:05.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:05.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:18:05.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:18:05.644 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:18:05.646 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:18:05.647 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:18:05.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:18:05.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:18:05.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:18:05.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:18:05.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:18:05.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:18:05.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:18:05.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:18:05.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:18:06.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:18:06.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:06.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:06.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:06.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:06.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:18:07.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:18:07.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:07.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:07.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:07.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:07.490 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:18:07.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:18:08.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:08.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:08.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:08.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:08.434 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:18:08.905 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:18:09.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:09.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:09.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:09.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:09.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:18:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:18:10.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:10.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:10.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:10.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:18:10.793 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:18:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:18:11.739 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:18:12.211 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:18:12.682 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:18:13.155 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:18:13.627 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:18:13.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:18:13.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:13.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:13.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:13.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:13.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:13.705 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:18.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:18.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:18.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:18.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:18.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:18.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:18.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:18.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:18.721 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:18.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:18.721 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:18:18.722 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:18:18.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:18:18.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:18.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:18.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:18.723 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:18:18.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:18.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:18:18.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:18.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:18.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:18:18.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:18.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:18:18.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:18:18.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:18.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:18.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:18.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:18:18.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:18.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:18:18.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:18:18.729 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:18:18.729 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:18:18.729 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:18.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:18.731 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:18.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:23.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:23.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:23.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:23.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:23.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:23.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:23.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:23.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:23.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:23.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:23.746 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:18:23.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:18:23.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:18:23.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:23.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:23.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:23.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:18:23.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:23.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:18:23.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:23.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:18:23.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:18:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:23.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:23.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:23.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:18:23.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:23.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:18:23.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:23.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:18:23.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:18:23.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:23.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:23.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:23.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:18:23.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:23.757 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:18:23.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:23.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:18:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:18:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:18:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:18:23.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:18:23.760 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:18:23.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:18:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:23.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:18:24.241 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:18:24.310 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:18:24.312 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:18:24.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:18:24.314 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:18:24.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:18:24.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:18:24.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:18:24.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:18:24.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:18:24.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:18:24.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:18:24.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:18:24.709 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:18:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:24.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:24.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:25.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:18:25.649 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:18:25.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:25.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:25.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:25.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:26.121 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:18:26.592 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:18:26.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:26.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:26.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:26.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:27.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:18:27.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:18:27.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:27.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:27.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:27.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:28.004 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:18:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:18:28.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:28.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:28.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:28.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:28.948 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:18:29.416 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:18:29.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:18:30.353 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:18:30.824 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:18:31.295 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:18:31.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:18:32.239 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:18:32.712 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:18:33.184 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:18:33.656 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:18:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:18:34.601 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:18:35.072 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:18:35.545 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:18:36.018 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:18:36.490 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:18:36.961 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:18:37.434 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:18:37.906 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:18:38.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:18:38.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:18:38.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:38.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:38.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:38.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:38.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:38.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:38.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:38.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:38.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:38.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:38.335 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:43.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:43.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:43.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:43.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:43.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:43.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:43.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:43.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:43.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:43.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:43.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:18:43.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:18:43.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:18:43.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:43.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:43.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:43.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:18:43.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:43.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:18:43.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:43.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:18:43.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:18:43.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:43.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:43.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:43.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:18:43.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:43.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:18:43.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:43.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:18:43.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:18:43.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:43.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:43.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:43.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:18:43.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:43.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:18:43.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:18:43.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:18:43.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:18:43.369 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:18:43.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:18:43.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:43.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:43.371 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:43.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:48.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:48.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:48.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:48.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:48.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:48.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:48.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:48.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:48.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:48.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:18:48.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:18:48.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:18:48.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:18:48.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:48.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:48.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:48.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:18:48.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:18:48.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:18:48.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:48.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:18:48.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:18:48.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:48.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:48.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:48.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:18:48.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:18:48.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:18:48.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:48.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:18:48.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:18:48.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:48.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:18:48.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:48.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:18:48.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:18:48.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:18:48.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:18:48.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:18:48.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:18:48.398 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:18:48.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:18:48.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:18:48.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:18:48.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:18:48.928 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:18:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:18:48.932 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:18:48.934 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:18:48.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:18:48.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:18:48.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:18:48.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:18:48.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:18:48.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:18:48.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:18:48.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:18:49.347 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:18:49.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:49.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:49.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:49.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:49.819 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:18:50.292 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:18:50.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:50.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:50.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:50.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:50.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:18:51.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:18:51.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:51.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:51.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:51.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:51.708 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:18:52.181 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:18:52.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:52.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:52.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:52.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:52.654 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:18:53.126 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:18:53.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:53.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:53.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:53.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:53.596 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:18:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:18:54.541 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:18:55.013 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:18:55.485 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:18:55.956 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:18:56.429 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:18:56.897 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:18:56.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:18:56.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:18:56.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:18:56.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:18:56.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:18:56.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:18:56.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:18:56.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:18:56.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:18:56.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:18:56.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:18:56.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:18:56.984 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:18:56.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:18:56.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:18:56.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:18:56.984 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:18:56.985 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:01.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:01.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:02.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:02.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:02.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:02.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:02.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:02.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:02.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:02.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:02.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:19:02.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:19:02.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:19:02.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:02.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:02.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:02.019 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:19:02.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:02.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:19:02.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:02.022 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:19:02.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:19:02.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:02.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:02.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:02.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:19:02.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:02.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:19:02.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:02.026 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:02.026 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:19:02.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:19:02.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:19:02.030 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:19:02.030 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:19:02.030 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:02.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:02.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:02.032 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:19:07.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:07.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:07.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:07.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:07.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:07.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:07.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:07.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:07.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:07.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:07.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:19:07.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:19:07.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:19:07.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:07.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:07.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:07.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:19:07.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:07.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:19:07.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:07.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:19:07.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:19:07.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:07.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:07.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:07.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:19:07.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:07.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:19:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:07.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:07.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:19:07.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:19:07.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:19:07.080 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:19:07.080 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:19:07.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:07.085 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:19:07.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:19:07.607 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:19:07.610 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:19:07.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:19:07.612 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:19:07.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:19:07.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:19:07.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:19:07.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:19:07.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:19:07.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:19:07.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:19:07.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:19:08.030 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:19:08.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:08.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:08.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:08.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:08.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:19:08.968 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:19:09.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:09.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:09.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:09.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:09.438 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:19:09.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:19:10.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:10.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:10.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:10.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:10.384 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:19:10.856 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:19:11.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:11.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:11.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:11.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:11.330 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:19:11.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:19:12.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:12.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:12.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:12.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:12.274 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:19:12.745 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:19:13.219 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:19:13.691 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:19:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:19:14.634 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:19:15.104 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:19:15.575 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:19:16.046 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:19:16.519 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:19:16.987 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:19:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:19:17.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:19:17.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:19:17.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:17.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:17.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:17.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:17.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:17.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:17.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:17.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:17.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:17.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:17.672 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:17.672 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2292 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:22.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:22.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:22.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:22.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:22.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:22.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:22.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:22.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:22.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:22.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:22.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:19:22.688 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:19:22.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:19:22.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:22.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:22.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:22.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:19:22.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:22.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:19:22.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:22.691 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:19:22.691 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:19:22.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:22.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:22.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:22.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:19:22.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:22.692 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:19:22.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:22.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:19:22.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:19:22.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:22.694 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:22.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:22.694 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:19:22.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:22.694 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:19:22.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.697 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:19:22.697 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:19:22.698 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:19:22.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:19:22.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:22.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:22.700 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:19:22.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:27.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:27.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:27.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:27.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:27.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:27.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:27.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:27.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:27.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:27.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:19:27.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:19:27.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:19:27.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:27.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:27.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:27.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:19:27.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:27.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:19:27.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:27.722 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:19:27.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:19:27.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:27.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:27.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:27.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:19:27.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:27.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:19:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:27.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:19:27.724 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:19:27.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:27.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:27.724 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:19:27.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:27.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:19:27.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:19:27.728 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:19:27.728 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:19:27.728 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:27.732 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:19:28.210 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:19:28.253 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:19:28.254 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:19:28.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:19:28.256 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:19:28.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:19:28.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:19:28.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:19:28.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:19:28.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:19:28.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:19:28.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:19:28.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:19:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:19:28.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:28.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:28.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:28.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:29.149 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:19:29.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:19:29.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:29.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:29.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:29.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:19:30.566 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:19:30.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:30.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:30.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:30.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:31.037 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:19:31.510 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:19:31.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:31.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:31.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:31.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:31.983 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:19:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:19:32.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:32.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:32.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:32.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:32.926 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:19:33.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:19:33.872 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:19:34.344 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:19:34.815 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:19:35.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:19:35.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:19:36.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:19:36.706 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:19:37.179 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:19:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:19:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:19:38.592 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:19:39.064 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:19:39.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:19:39.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:39.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:39.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:39.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:39.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:39.309 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:39.309 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:19:44.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:44.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:44.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:44.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:44.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:44.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:44.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:44.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:44.325 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:44.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:44.325 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:19:44.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:19:44.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:19:44.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:44.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:44.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:44.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:19:44.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:44.330 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:19:44.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:44.333 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:19:44.333 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:19:44.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:44.333 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:44.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:44.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:19:44.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:44.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:19:44.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:44.336 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:44.336 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:19:44.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:19:44.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:19:44.340 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:19:44.340 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:19:44.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:19:44.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:44.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:44.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:44.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:44.342 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:44.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:19:49.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:19:49.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:49.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:49.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:49.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:49.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:19:49.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:49.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:49.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:19:49.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:19:49.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:19:49.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:19:49.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:49.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:49.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:19:49.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:19:49.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:19:49.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:19:49.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:49.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:19:49.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:19:49.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:49.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:49.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:19:49.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:19:49.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:19:49.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:19:49.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:49.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:19:49.366 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:19:49.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:49.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:19:49.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:19:49.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:19:49.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:19:49.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:19:49.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:19:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:19:49.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:19:49.370 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:19:49.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:19:49.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:19:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:19:49.896 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:19:49.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:19:49.900 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:19:49.902 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:19:49.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:19:49.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:19:49.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:19:49.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:19:49.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:19:49.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:19:49.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:19:49.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:19:50.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:19:50.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:50.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:50.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:50.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:50.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:19:51.265 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:19:51.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:51.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:51.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:51.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:51.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:19:52.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:19:52.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:52.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:52.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:52.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:52.681 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:19:53.154 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:19:53.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:53.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:53.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:53.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:53.622 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:19:54.093 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:19:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:19:54.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:19:54.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:19:54.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:19:54.566 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:19:55.038 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:19:55.510 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:19:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:19:56.455 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:19:56.927 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:19:57.399 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:19:57.870 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:19:58.343 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:19:58.816 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:19:59.288 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:19:59.758 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:20:00.229 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:20:00.702 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:20:01.175 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:20:01.647 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:20:02.120 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:20:02.593 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:20:03.064 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:20:03.536 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:20:04.009 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:20:04.481 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:20:04.953 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:20:05.424 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:20:05.895 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:20:06.366 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:20:06.840 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:20:07.312 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:20:07.785 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:20:08.258 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:20:08.724 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:20:09.196 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:20:09.669 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:20:09.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:20:09.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:09.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:09.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:09.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:09.957 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:20:09.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:09.957 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.957 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.957 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.957 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.958 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.958 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.958 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:09.958 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:14.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:14.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:14.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:14.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:14.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:14.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:14.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:14.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:14.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:14.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:14.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:20:14.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:20:14.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:20:14.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:14.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:14.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:20:14.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:14.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:20:14.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:14.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:20:14.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:20:14.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:14.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:14.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:14.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:20:14.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:14.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:20:14.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:14.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:20:14.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:20:14.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:14.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:14.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:14.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:20:14.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:14.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:20:14.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:20:14.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:20:14.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:20:14.998 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:20:14.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:14.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:14.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:14.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:14.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:14.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:14.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:15.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:15.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:15.000 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:20:20.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:20.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:20.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:20.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:20.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:20.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:20.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:20.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:20.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:20.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:20.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:20:20.020 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:20:20.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:20:20.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:20.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:20.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:20.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:20:20.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:20.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:20:20.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:20.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:20.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:20:20.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:20.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:20.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:20:20.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:20:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:20:20.029 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:20:20.029 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:20:20.029 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:20.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:20.034 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:20:20.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:20:20.543 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:20:20.543 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:20:20.544 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:20:20.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:20:20.975 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:20:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:21.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:21.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:21.438 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:20:21.901 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:20:22.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:22.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:22.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:22.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:22.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:20:22.841 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:20:23.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:23.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:23.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:23.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:23.313 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:20:23.778 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:20:24.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:24.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:24.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:24.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:24.241 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:20:24.704 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:20:25.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:25.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:25.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:25.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:25.170 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:20:25.640 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:20:26.103 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:20:26.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:20:27.030 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:20:27.493 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:20:27.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:20:28.420 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:20:28.883 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:20:29.346 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:20:29.810 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:20:30.274 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:30.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:30.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:30.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:30.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:30.552 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:30.552 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:20:35.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:35.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:35.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:35.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:35.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:35.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:35.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:35.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:35.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:35.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:35.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:20:35.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:20:35.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:20:35.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:35.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:35.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:35.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:20:35.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:35.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:20:35.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:35.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:20:35.573 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:20:35.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:35.573 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:35.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:35.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:20:35.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:35.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:20:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:35.575 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:35.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:20:35.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:35.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:20:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:20:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:20:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:20:35.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:20:35.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:20:35.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:20:35.578 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:20:35.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:35.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:35.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:35.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:35.580 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:20:40.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:40.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:40.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:40.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:40.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:40.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:40.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:40.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:40.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:40.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:40.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:20:40.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:20:40.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:20:40.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:40.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:40.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:40.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:20:40.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:40.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:20:40.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:40.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:20:40.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:20:40.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:40.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:40.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:40.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:20:40.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:40.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:20:40.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:40.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:40.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:20:40.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:20:40.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:20:40.609 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:20:40.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:40.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:20:41.091 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:20:41.135 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:20:41.137 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:20:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:20:41.138 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:20:41.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:20:41.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:41.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:41.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:41.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:42.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:20:42.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:20:42.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:42.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:42.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:42.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:42.946 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:20:43.409 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:20:43.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:43.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:43.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:43.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:43.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:20:44.336 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:20:44.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:44.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:44.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:44.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:44.800 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:20:45.263 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:20:45.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:45.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:45.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:45.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:45.727 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:20:46.190 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:20:46.653 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:20:47.117 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:20:47.580 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:20:48.044 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:20:48.507 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:20:48.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:20:49.434 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:20:49.898 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:20:50.361 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:20:50.824 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:20:51.288 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:20:51.751 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:20:52.215 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:20:52.679 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:20:53.142 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:53.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:53.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:53.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:53.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:53.150 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:20:58.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:58.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:58.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:58.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:58.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:58.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:58.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:58.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:58.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:58.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:20:58.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:20:58.170 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:20:58.170 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:20:58.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:58.170 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:58.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:58.171 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:20:58.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:20:58.171 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:20:58.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:20:58.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:20:58.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:20:58.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:58.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:58.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:58.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:20:58.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:20:58.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:20:58.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:20:58.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:20:58.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:20:58.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:58.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:20:58.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:20:58.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:20:58.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:20:58.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:20:58.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:20:58.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:20:58.179 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:20:58.179 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:20:58.179 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:20:58.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:20:58.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:20:58.180 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:20:58.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:03.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:03.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:03.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:03.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:03.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:03.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:03.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:03.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:03.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:03.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:03.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:03.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:03.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:03.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:03.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:03.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:03.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:03.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:03.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:03.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:03.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:03.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:03.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:03.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:03.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:03.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:03.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:03.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:03.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:03.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:03.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:03.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:03.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:03.205 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:03.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:03.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:03.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:21:03.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:21:03.727 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:21:03.729 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:21:03.730 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:21:03.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:21:03.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:03.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:03.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:21:03.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:03.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:03.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:03.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:21:03.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:21:03.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:03.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:03.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:03.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:04.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:21:04.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:04.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:04.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:04.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:04.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:21:05.100 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:21:05.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:05.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:05.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:05.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:05.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:21:06.044 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:21:06.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:06.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:06.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:06.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:06.515 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:21:06.986 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:21:07.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:07.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:07.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:07.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:07.458 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:21:07.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:21:08.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:08.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:08.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:08.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:08.402 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:21:08.874 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:21:09.345 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:21:09.818 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:21:10.286 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:21:10.757 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:21:11.230 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:21:11.703 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:21:11.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:11.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:11.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:11.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:11.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:11.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:11.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:11.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:11.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:11.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:11.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:11.791 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:21:11.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:11.791 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:16.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:16.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:16.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:16.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:16.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:16.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:16.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:16.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:16.796 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:16.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:16.797 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:16.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:16.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:16.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:16.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:16.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:16.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:16.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:16.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:16.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:16.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:16.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:16.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:16.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:16.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:16.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:16.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:16.804 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:16.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:16.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:16.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:16.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:16.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:16.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:16.806 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:21:21.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:21.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:21.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:21.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:21.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:21.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:21.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:21.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:21.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:21.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:21.822 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:21.824 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:21.824 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:21.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:21.825 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:21.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:21.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:21.826 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:21.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:21.827 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:21.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:21.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:21.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:21.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:21.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:21.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:21.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:21.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:21.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:21.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:21.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:21.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:21.832 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:21.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:21.837 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:21:22.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:21:22.366 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:21:22.369 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:21:22.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:21:22.371 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:21:22.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:22.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:22.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:21:22.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:22.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:22.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:22.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:21:22.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:21:22.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:22.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:22.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:22.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:21:22.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:22.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:22.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:22.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:23.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:21:23.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:21:23.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:23.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:23.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:23.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:24.195 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:21:24.668 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:21:24.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:24.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:24.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:25.141 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:21:25.613 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:21:25.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:25.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:25.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:25.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:26.111 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:21:26.583 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:21:26.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:26.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:26.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:26.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:27.054 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:21:27.527 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:21:28.000 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:21:28.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:21:28.943 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:21:29.416 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:21:29.888 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:21:30.361 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:21:30.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:30.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:30.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:30.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:30.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:30.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:30.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:30.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:30.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:30.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:30.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:30.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:30.418 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:30.418 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:21:35.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:35.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:35.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:35.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:35.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:35.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:35.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:35.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:35.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:35.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:35.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:35.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:35.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:35.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:35.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:35.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:35.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:35.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:35.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:35.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:35.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:35.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:35.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:35.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:35.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:35.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:35.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:35.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:35.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:35.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:35.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:35.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.441 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:35.441 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:35.441 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:35.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:35.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:35.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:35.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:35.443 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:35.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:40.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:40.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:40.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:40.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:40.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:40.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:40.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:40.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:40.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:40.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:40.461 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:40.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:40.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:40.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:40.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:40.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:40.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:40.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:40.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:40.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:40.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:40.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:40.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:40.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:40.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:40.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:40.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:40.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:40.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:40.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:40.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:40.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:40.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:40.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:40.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:40.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:40.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:40.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:40.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:40.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:40.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:40.472 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:40.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:40.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:21:40.955 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:21:40.994 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:21:40.996 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:21:40.997 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:21:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:21:41.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:41.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:41.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:21:41.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:41.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:41.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:41.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:21:41.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:21:41.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:41.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:41.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:41.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:41.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:21:41.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:41.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:41.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:41.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:41.898 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:21:42.371 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:21:42.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:42.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:42.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:42.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:42.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:21:43.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:21:43.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:43.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:43.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:43.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:43.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:21:44.261 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:21:44.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:44.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:44.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:44.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:44.733 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:21:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:21:45.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:45.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:45.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:45.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:21:46.145 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:21:46.616 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:21:47.089 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:21:47.562 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:21:48.034 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:21:48.505 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:21:48.978 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:21:49.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:49.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:49.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:49.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:49.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:49.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:49.060 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:21:54.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:54.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:54.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:54.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:54.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:54.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:54.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:54.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:54.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:54.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:54.076 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:54.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:54.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:54.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:54.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:54.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:54.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:54.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:54.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:54.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:54.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:54.082 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:54.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:54.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:54.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:54.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:54.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:54.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:54.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:54.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:54.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:54.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:54.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:54.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:54.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:54.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:54.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:54.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:54.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:54.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:54.090 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:54.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:54.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:54.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:54.093 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:21:59.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:21:59.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:21:59.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:59.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:59.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:59.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:59.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:21:59.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:59.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:59.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:21:59.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:21:59.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:21:59.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:21:59.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:59.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:59.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:21:59.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:21:59.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:21:59.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:21:59.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:21:59.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:21:59.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:21:59.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:59.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:59.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:21:59.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:21:59.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:21:59.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:21:59.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:59.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:21:59.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:21:59.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:21:59.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:21:59.122 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:21:59.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:21:59.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:21:59.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:21:59.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:21:59.645 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:21:59.647 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:21:59.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:21:59.648 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:21:59.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:21:59.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:21:59.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:21:59.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:59.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:59.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:59.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:21:59.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:21:59.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:21:59.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:21:59.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:21:59.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:00.073 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:22:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:00.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:00.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:00.544 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:22:01.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:22:01.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:01.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:01.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:01.490 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:22:01.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:22:02.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:02.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:02.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:02.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:22:02.906 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:22:03.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:03.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:03.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:03.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:03.379 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:22:03.851 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:22:04.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:04.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:04.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:04.322 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:22:04.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:22:05.267 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:22:05.739 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:22:06.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:22:06.683 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:22:07.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:22:07.633 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:22:07.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:22:07.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:07.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:07.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:07.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:07.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:07.705 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:22:07.705 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:07.705 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:07.706 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:07.706 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:07.706 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:07.706 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:07.706 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:12.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:12.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:12.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:12.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:12.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:12.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:12.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:12.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:12.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:12.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:12.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:22:12.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:22:12.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:22:12.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:12.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:12.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:12.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:22:12.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:12.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:22:12.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:12.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:22:12.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:22:12.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:12.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:12.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:12.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:22:12.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:12.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:22:12.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:12.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:22:12.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:22:12.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:12.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:12.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:12.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:22:12.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:12.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:22:12.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:22:12.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:22:12.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:22:12.738 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:22:12.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:12.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:12.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:12.740 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:22:17.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:17.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:17.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:17.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:17.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:17.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:17.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:17.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:17.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:17.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:17.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:22:17.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:22:17.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:22:17.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:17.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:17.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:17.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:22:17.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:17.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:22:17.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:17.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:22:17.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:22:17.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:17.764 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:17.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:17.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:22:17.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:17.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:22:17.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:17.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:17.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:22:17.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:22:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:22:17.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:22:17.771 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:22:17.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:17.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:22:18.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:22:18.299 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:22:18.301 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:22:18.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:22:18.303 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:22:18.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:22:18.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:22:18.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:22:18.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:18.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:22:18.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:22:18.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:22:18.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:22:18.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:22:18.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:22:18.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:18.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:18.721 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:22:18.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:18.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:18.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:18.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:19.192 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:22:19.663 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:22:19.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:19.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:19.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:19.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:20.136 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:22:20.609 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:22:20.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:20.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:20.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:20.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:21.081 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:22:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:22:21.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:21.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:21.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:21.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:22.025 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:22:22.497 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:22:22.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:22.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:22.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:22.969 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:22:23.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:22:23.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:22:24.384 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:22:24.857 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:22:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:22:25.800 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:22:26.273 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:22:26.745 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:22:27.217 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:22:27.688 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:22:28.162 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:22:28.634 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:22:29.106 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:22:29.577 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:22:30.050 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:22:30.523 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:22:30.995 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:22:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:22:31.937 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:22:32.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:22:32.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:22:32.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:32.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:32.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:32.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:32.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:32.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:32.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:32.372 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:22:32.372 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3156 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:32.372 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3156 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:32.372 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3156 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:32.372 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3156 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:32.372 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3156 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:37.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:37.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:37.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:37.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:37.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:37.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:37.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:37.411 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:22:37.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:22:37.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:22:37.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:37.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:37.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:37.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:22:37.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:37.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:22:37.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:37.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:22:37.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:22:37.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:37.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:37.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:37.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:22:37.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:37.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:22:37.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:37.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:22:37.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:22:37.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:37.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:37.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:37.429 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:22:37.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:37.429 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:22:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:37.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:22:37.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:22:37.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:22:37.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:22:37.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:22:37.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:22:37.433 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:22:37.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:37.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:37.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:37.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:37.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:37.436 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:22:42.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:42.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:42.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:42.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:42.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:42.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:42.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:42.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:42.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:42.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:42.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:22:42.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:22:42.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:22:42.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:42.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:42.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:42.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:22:42.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:42.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:22:42.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:42.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:22:42.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:22:42.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:42.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:42.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:42.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:22:42.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:42.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:22:42.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:42.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:22:42.486 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:22:42.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:42.486 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:42.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:42.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:22:42.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:42.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:22:42.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:22:42.489 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:22:42.489 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:22:42.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:42.494 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:22:42.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:22:43.011 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:22:43.013 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:22:43.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:22:43.014 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:22:43.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:22:43.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:22:43.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:22:43.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:43.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:22:43.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:22:43.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:22:43.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:22:43.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:22:43.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:22:43.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:43.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:22:43.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:22:43.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:43.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:43.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:43.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:43.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:22:44.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:22:44.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:44.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:44.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:44.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:22:45.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:22:45.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:45.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:45.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:45.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:45.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:22:46.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:22:46.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:46.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:46.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:46.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:46.743 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:22:47.210 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:22:47.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:47.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:47.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:47.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:47.681 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:22:48.155 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:22:48.627 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:22:49.099 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:22:49.572 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:22:50.045 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:22:50.517 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:22:50.988 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:22:51.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:22:51.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:51.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:51.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:51.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:51.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:51.072 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:22:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:51.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:22:56.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:56.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:56.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:56.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:56.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:56.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:56.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:56.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:56.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:56.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:22:56.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:22:56.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:22:56.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:22:56.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:56.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:56.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:56.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:22:56.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:22:56.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:22:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:22:56.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:22:56.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:22:56.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:56.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:56.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:56.095 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:22:56.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:22:56.095 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:22:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:56.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:22:56.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:22:56.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:22:56.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:22:56.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:22:56.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:22:56.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:22:56.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:22:56.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:22:56.104 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:23:01.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:01.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:01.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:01.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:01.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:01.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:01.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:01.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:01.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:01.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:01.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:23:01.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:23:01.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:23:01.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:01.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:01.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:01.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:23:01.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:01.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:23:01.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:01.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:01.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:23:01.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:01.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:01.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:23:01.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:23:01.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:23:01.124 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:23:01.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:01.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:23:01.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:23:01.647 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:23:01.649 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:23:01.650 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:23:01.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:23:01.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:23:01.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:23:01.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:23:01.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:23:01.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:23:01.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:23:01.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:23:01.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:23:01.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:23:01.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:23:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:23:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:23:02.073 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:23:02.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:02.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:02.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:02.544 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:23:03.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:23:03.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:03.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:03.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:03.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:23:03.959 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:23:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:04.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:04.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:04.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:23:04.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:23:05.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:05.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:05.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:05.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:05.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:23:05.847 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:23:06.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:06.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:06.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:06.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:06.320 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:23:06.791 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:23:07.263 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:23:07.736 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:23:08.208 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:23:08.680 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:23:09.151 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:23:09.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:23:10.095 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:23:10.568 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:23:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:23:11.511 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:23:11.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:23:11.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:23:11.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:11.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:11.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:11.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:11.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:11.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:11.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:11.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:11.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:11.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:11.715 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.716 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.717 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:11.718 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:16.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:16.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:16.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:16.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:16.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:16.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:16.724 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:16.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:16.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:23:16.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:23:16.729 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:23:16.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:16.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:16.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:16.730 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:23:16.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:16.730 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:23:16.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:16.732 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:16.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:23:16.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:16.735 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:16.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:23:16.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:23:16.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:23:16.739 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:23:16.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:16.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:16.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:16.741 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:23:21.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:21.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:21.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:21.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:21.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:21.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:21.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:21.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:21.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:21.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:21.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:23:21.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:23:21.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:23:21.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:21.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:21.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:21.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:23:21.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:21.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:23:21.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:21.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:21.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:23:21.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:21.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:23:21.766 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:23:21.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:21.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:21.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:21.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:23:21.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:21.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:23:21.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:23:21.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:23:21.769 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:23:21.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:21.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:23:22.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:23:22.292 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:23:22.294 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:23:22.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:23:22.296 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:23:22.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:23:22.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:23:22.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:23:22.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:23:22.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:23:22.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:23:22.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:23:22.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:23:22.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:23:22.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:23:22.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:23:22.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:23:22.718 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:23:22.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:22.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:22.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:22.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:23.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:23:23.655 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:23:23.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:23.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:23.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:23.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:24.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:23:24.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:23:24.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:24.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:24.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:24.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:25.070 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:23:25.543 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:23:25.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:25.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:25.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:25.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:26.015 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:23:26.486 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:23:26.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:26.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:26.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:26.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:26.959 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:23:27.431 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:23:27.903 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:23:28.374 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:23:28.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:23:29.320 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:23:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:23:30.265 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:23:30.733 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:23:31.205 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:23:31.675 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:23:32.146 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:23:32.620 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:23:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:23:33.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:23:33.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:23:33.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:33.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:33.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:33.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:33.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:33.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:33.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:33.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:33.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:33.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:33.356 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2507 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2507 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:33.356 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:38.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:38.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:38.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:38.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:38.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:38.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:38.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:38.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:38.368 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:38.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:38.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:38.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:38.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:23:38.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:38.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:23:38.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:23:38.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:38.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:38.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:38.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:23:38.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:38.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:23:38.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:38.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:23:38.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:23:38.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:38.376 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:38.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:38.376 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:23:38.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:38.376 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:23:38.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.378 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:23:38.379 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:23:38.379 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:23:38.379 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:38.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:38.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:38.380 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:23:43.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:43.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:43.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:43.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:43.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:43.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:43.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:43.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:43.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:43.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:43.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:23:43.394 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:23:43.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:23:43.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:43.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:43.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:43.395 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:43.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:23:43.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:43.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:23:43.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:43.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:23:43.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:23:43.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:43.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:43.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:43.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:23:43.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:43.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:23:43.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:23:43.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:23:43.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:23:43.399 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:23:43.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:43.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:23:43.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:23:43.914 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:23:43.914 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:23:43.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:23:43.915 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:23:44.355 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:23:44.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:44.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:44.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:44.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:44.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:23:45.300 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:23:45.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:45.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:45.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:45.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:45.773 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:23:46.246 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:23:46.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:46.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:46.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:46.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:46.718 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:23:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:23:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:47.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:47.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:47.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:47.648 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:23:48.112 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:23:48.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:48.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:48.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:48.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:48.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:23:49.039 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:23:49.502 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:23:49.965 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:23:50.429 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:23:50.892 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:23:51.355 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:23:51.819 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:23:52.282 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:23:52.745 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:23:53.209 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:23:53.672 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:53.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:53.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:53.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:53.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:53.924 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:23:53.924 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:53.924 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:53.924 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:53.924 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:53.924 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:23:58.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:58.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:58.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:58.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:58.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:58.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:58.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:58.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:58.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:58.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:23:58.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:23:58.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:23:58.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:23:58.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:58.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:58.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:58.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:23:58.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:23:58.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:23:58.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:23:58.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:23:58.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:23:58.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:58.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:58.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:58.948 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:23:58.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:23:58.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:23:58.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:58.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:23:58.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:23:58.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:23:58.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:23:58.954 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:23:58.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:23:58.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:23:58.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:23:58.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:23:58.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:23:58.956 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:24:03.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:03.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:03.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:03.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:03.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:03.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:03.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:03.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:03.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:03.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:03.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:24:03.980 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:24:03.980 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:24:03.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:03.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:03.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:03.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:24:03.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:03.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:24:03.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:03.984 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:24:03.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:24:03.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:03.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:03.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:03.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:24:03.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:03.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:24:03.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:03.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:24:03.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:24:03.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:03.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:03.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:03.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:24:03.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:03.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:24:03.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:24:03.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:24:03.993 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:24:03.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:03.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:24:04.475 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:24:04.517 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:24:04.518 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:24:04.518 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:24:04.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:24:04.944 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:24:04.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:04.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:04.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:05.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:05.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:24:05.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:24:05.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:05.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:06.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:06.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:06.334 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:24:06.797 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:24:06.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:06.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:07.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:07.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:07.261 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:24:07.728 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:24:07.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:07.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:08.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:08.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:08.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:24:08.662 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:24:09.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:09.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:09.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:09.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:09.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:24:09.589 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:24:10.052 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:24:10.516 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:24:10.979 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:24:11.442 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:24:11.905 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:24:12.369 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:24:12.832 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:24:13.296 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:24:13.759 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:24:14.222 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:24:14.686 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:24:15.149 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:24:15.612 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:24:16.076 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:24:16.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:16.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:16.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:16.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:16.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:16.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:16.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:16.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:16.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:16.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:16.534 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:16.534 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2753 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:21.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:21.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:21.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:21.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:21.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:21.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:21.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:21.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:21.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:21.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:21.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:24:21.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:24:21.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:24:21.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:21.555 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:21.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:21.555 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:24:21.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:21.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:24:21.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:21.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:21.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:24:21.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:21.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:24:21.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:24:21.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:21.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:21.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:21.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:24:21.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:21.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:24:21.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:24:21.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:24:21.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:24:21.564 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:24:21.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:21.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:24:22.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:24:22.088 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:24:22.090 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:24:22.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:24:22.091 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:24:22.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:24:22.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:24:22.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:24:22.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:24:22.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:24:22.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:24:22.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:24:22.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:24:22.512 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:24:22.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:22.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:22.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:22.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:22.980 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:24:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:24:23.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:23.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:23.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:23.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:23.922 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:24:24.396 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:24:24.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:24.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:24.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:24.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:24.868 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:24:25.340 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:24:25.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:25.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:25.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:25.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:25.811 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:24:26.284 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:24:26.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:26.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:26.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:26.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:26.757 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:24:27.229 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:24:27.700 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:24:28.170 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:24:28.643 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:24:29.116 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:24:29.588 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:24:30.059 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:24:30.532 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:24:31.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:24:31.476 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:24:31.948 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:24:32.418 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:24:32.892 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:24:33.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:24:33.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:24:33.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:33.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:33.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:33.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:33.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:33.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:33.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:33.148 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:33.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:38.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:38.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:38.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:38.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:38.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:38.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:38.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:38.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:38.162 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:38.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:38.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:24:38.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:24:38.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:24:38.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:38.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:38.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:38.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:24:38.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:38.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:24:38.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:38.169 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:24:38.170 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:24:38.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:38.170 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:38.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:38.170 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:24:38.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:38.170 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:24:38.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:38.172 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:24:38.173 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:24:38.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:38.173 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:38.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:38.173 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:24:38.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:38.173 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:24:38.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:38.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:24:38.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:24:38.177 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:24:38.178 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:38.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:24:38.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:24:38.705 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:24:38.707 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:24:38.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:24:38.709 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:24:38.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:24:38.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:24:38.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:24:38.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:24:38.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:24:38.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:24:38.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:24:38.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:24:39.124 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:24:39.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:39.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:39.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:39.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:39.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:24:40.069 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:24:40.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:40.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:40.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:40.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:40.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:24:41.013 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:24:41.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:41.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:41.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:41.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:41.484 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:24:41.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:24:42.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:42.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:42.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:42.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:42.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:24:42.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:24:43.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:43.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:43.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:43.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:43.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:24:43.842 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:24:44.313 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:24:44.786 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:24:45.259 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:24:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:24:46.202 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:24:46.673 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:24:47.145 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:24:47.618 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:24:48.090 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:24:48.561 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:24:49.034 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:24:49.506 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:24:49.979 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:24:50.451 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:24:50.924 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:24:51.396 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:24:51.867 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:24:52.339 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:24:52.812 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:24:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:24:53.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:24:53.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:24:53.755 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:24:53.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:53.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:53.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:53.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:53.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:53.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:53.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:53.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:53.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:53.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:53.765 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3368 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3368 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:53.765 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:58.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:58.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:58.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:58.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:58.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:58.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:58.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:24:58.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:24:58.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:24:58.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:24:58.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:58.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:58.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:58.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:24:58.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:24:58.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:24:58.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:58.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:24:58.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:24:58.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:58.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:58.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:58.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:24:58.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:24:58.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:24:58.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:58.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:24:58.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:24:58.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:58.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:24:58.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:58.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:24:58.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:24:58.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:24:58.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:58.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:24:58.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:24:58.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:24:58.786 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:24:58.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:24:58.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:24:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:24:59.313 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:24:59.315 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:24:59.317 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:24:59.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:24:59.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:24:59.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:24:59.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:24:59.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:24:59.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:24:59.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:24:59.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:24:59.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:24:59.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:24:59.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:24:59.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:24:59.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:24:59.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:24:59.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:24:59.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:24:59.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:24:59.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:24:59.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:24:59.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:24:59.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:24:59.379 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:24:59.379 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.379 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:24:59.380 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:04.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:25:04.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:25:04.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:04.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:04.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:04.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:04.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:04.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:25:04.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:04.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:25:04.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:25:04.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:25:04.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:25:04.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:25:04.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:04.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:04.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:25:04.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:25:04.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:25:04.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:04.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:25:04.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:25:04.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:25:04.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:04.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:04.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:25:04.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:25:04.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:25:04.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:04.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:25:04.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:25:04.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:25:04.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:04.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:04.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:25:04.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:25:04.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:25:04.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:04.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:25:04.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:25:04.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:25:04.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:25:04.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:25:04.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:25:04.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:25:04.397 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:25:04.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:04.402 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:25:04.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:25:04.924 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:25:04.927 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:25:04.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:04.929 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:25:04.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:04.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:04.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:04.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:04.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:04.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:04.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:04.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:04.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:04.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:04.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:04.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:05.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:05.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:05.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:05.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:05.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:05.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:05.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.349 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:25:05.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:05.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:05.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:05.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:05.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:05.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:05.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:05.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:05.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:05.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:05.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:05.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:05.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:05.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:05.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:05.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:05.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:05.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:05.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:05.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:05.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:05.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:25:05.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:06.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:06.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:06.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:06.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:06.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:06.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:06.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:06.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:06.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:06.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:06.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:06.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:06.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:25:06.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:25:06.152 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:06.152 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:25:11.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:25:11.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:25:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:11.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:11.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:11.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:11.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:11.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:25:11.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:11.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:25:11.168 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:25:11.170 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:25:11.170 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:25:11.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:25:11.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:11.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:11.171 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:25:11.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:25:11.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:25:11.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:25:11.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:25:11.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:25:11.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:11.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:25:11.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:25:11.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:25:11.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:11.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:11.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:25:11.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:25:11.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:25:11.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:25:11.179 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:25:11.179 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:25:11.179 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:25:11.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:25:11.700 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:25:11.702 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:25:11.703 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:25:11.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:11.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:11.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:11.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:11.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:11.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:11.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:11.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:11.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:11.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:11.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:11.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:11.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:11.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:11.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:11.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:11.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:12.128 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:25:12.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:12.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:12.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:12.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:12.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:25:13.070 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:25:13.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:13.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:13.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:13.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:13.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:25:14.014 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:25:14.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:14.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:14.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:14.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:14.487 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:25:14.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:25:15.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:15.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:15.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:15.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:15.430 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:25:15.901 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:25:16.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:16.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:16.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:16.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:16.374 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:25:16.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:16.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:16.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:16.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:16.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:16.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:16.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:16.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:16.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:16.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:16.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:16.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:16.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:16.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:16.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:16.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:16.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:16.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:16.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:16.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:16.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:25:17.314 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:25:17.785 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:25:18.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:25:18.726 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:25:19.197 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:25:19.668 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:25:20.139 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:25:20.610 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:25:21.081 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:25:21.553 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:25:21.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:21.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:21.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:21.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:21.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:21.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:21.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:21.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:21.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:21.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:21.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:21.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:21.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:21.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:21.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:21.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:21.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:21.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:21.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:21.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:22.023 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:25:22.492 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:25:22.963 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:25:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:25:23.904 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:25:24.375 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:25:24.846 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:25:25.317 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:25:25.787 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:25:26.258 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:25:26.729 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:25:26.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:26.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:26.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:26.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:26.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:26.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:26.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:26.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:26.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:26.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:26.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:26.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:26.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:26.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:26.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:26.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:26.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:26.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:26.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:26.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:27.200 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:25:27.670 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:25:28.141 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:25:28.612 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:25:29.085 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:25:29.558 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:25:30.030 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:25:30.501 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:25:30.971 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:25:31.437 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:25:31.908 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:25:31.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:31.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:31.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:31.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:31.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:31.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:31.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:25:31.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:25:31.928 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:25:36.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:25:36.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:25:36.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:36.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:36.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:36.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:36.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:36.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:25:36.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:36.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:25:36.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:25:36.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:25:36.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:25:36.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:25:36.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:36.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:36.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:25:36.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:25:36.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:25:36.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:25:36.948 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:25:36.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:25:36.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:25:36.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:25:36.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:25:36.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:25:36.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:25:36.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:25:36.954 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:25:36.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:25:36.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:25:36.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:25:37.437 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:25:37.485 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:25:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:37.487 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:25:37.490 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:25:37.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:37.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:37.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:37.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:37.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:37.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:37.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:37.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:37.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:37.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:37.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:37.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:37.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:37.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:37.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:37.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:25:37.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:37.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:37.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:37.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:38.379 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:25:38.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:25:38.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:38.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:38.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:38.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:39.317 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:25:39.788 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:25:39.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:39.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:39.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:39.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:40.259 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:25:40.729 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:25:40.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:40.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:40.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:40.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:41.200 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:25:41.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:25:41.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:41.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:41.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:41.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:42.146 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:25:42.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:42.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:42.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:42.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:42.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:42.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:42.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:42.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:42.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:42.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:42.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:42.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:42.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:42.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:42.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:42.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:42.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:42.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:42.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:42.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:25:43.089 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:25:43.560 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:25:44.031 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:25:44.502 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:25:44.974 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:25:45.447 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:25:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:25:46.390 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:25:46.861 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:25:47.332 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:25:47.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:47.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:47.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:47.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:47.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:47.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:47.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:47.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:47.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:47.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:47.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:47.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:47.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:47.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:47.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:47.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:47.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:47.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:47.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:47.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:47.800 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:25:48.268 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:25:48.739 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:25:49.210 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:25:49.681 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:25:50.152 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:25:50.622 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:25:51.093 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:25:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:25:52.039 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:25:52.511 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:25:52.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:52.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:52.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:52.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:52.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:52.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:52.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:52.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:52.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:52.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:25:52.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:52.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:52.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:52.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:52.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:25:52.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:25:52.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:25:52.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:25:52.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:52.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:52.981 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:25:53.450 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:25:53.918 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:25:54.389 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:25:54.860 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:25:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:25:55.805 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:25:56.277 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:25:56.748 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:25:57.222 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:25:57.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:25:57.694 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:25:57.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:25:57.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:25:57.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:25:57.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:25:57.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:25:57.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:25:57.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:25:57.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:25:57.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:25:57.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:25:57.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:25:57.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:25:57.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:25:57.715 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:26:02.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:26:02.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:26:02.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:02.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:02.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:02.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:02.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:02.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:26:02.724 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:02.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:26:02.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:26:02.725 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:26:02.725 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:26:02.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:26:02.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:02.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:02.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:26:02.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:26:02.726 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:26:02.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:26:02.727 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:26:02.727 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:26:02.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:26:02.729 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:26:02.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:26:02.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:26:02.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:26:02.731 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:02.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:26:03.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:26:03.256 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:26:03.258 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:26:03.260 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:26:03.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:03.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:03.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:03.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:03.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:03.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:03.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:03.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:03.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:03.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:03.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:03.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:03.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:03.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:03.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:03.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:03.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:03.680 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:26:03.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:03.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:03.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:03.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:04.151 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:26:04.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:26:04.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:04.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:04.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:04.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:26:05.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:26:05.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:05.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:26:06.511 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:26:06.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:06.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:06.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:06.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:06.982 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:26:07.453 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:26:07.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:07.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:07.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:07.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:07.924 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:26:08.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:08.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:08.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:08.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:08.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:08.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:08.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:08.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:08.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:08.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:08.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:08.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:08.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:08.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:08.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:08.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:08.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:08.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:08.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:08.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:08.394 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:26:08.860 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:26:09.327 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:26:09.793 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:26:10.263 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:26:10.735 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:26:11.208 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:26:11.681 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:26:12.153 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:26:12.623 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:26:13.094 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:26:13.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:13.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:13.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:13.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:13.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:13.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:13.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:13.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:13.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:13.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:13.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:13.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:13.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:13.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:13.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:13.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:13.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:13.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:13.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:13.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:13.564 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:26:14.036 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:26:14.507 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:26:14.977 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:26:15.448 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:26:15.921 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:26:16.394 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:26:16.866 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:26:17.337 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:26:17.810 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:26:18.282 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:26:18.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:18.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:18.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:18.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:18.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:18.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:18.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:18.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:18.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:18.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:18.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:18.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:18.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:18.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:18.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:18.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:18.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:18.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:18.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:18.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:18.754 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:26:19.225 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:26:19.698 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:26:20.171 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:26:20.643 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:26:21.117 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:26:21.589 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:26:22.061 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:26:22.533 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:26:22.998 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:26:23.467 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:26:23.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:23.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:23.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:23.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:23.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:23.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:23.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:23.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:23.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:23.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:23.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:23.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:23.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:26:23.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:26:23.543 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:26:23.543 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4505 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:23.544 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4505 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:28.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:26:28.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:26:28.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:28.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:28.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:28.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:28.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:28.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:26:28.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:28.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:26:28.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:26:28.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:26:28.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:26:28.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:26:28.555 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:28.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:28.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:26:28.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:26:28.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:26:28.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:26:28.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:26:28.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:26:28.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:26:28.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:26:28.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:26:28.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:28.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:26:28.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:26:28.562 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:26:28.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:28.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:26:29.044 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:26:29.093 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:26:29.095 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:26:29.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:29.097 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:26:29.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:29.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:29.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:29.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:29.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:29.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:29.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:29.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:29.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:29.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:29.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:29.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:29.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:29.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:29.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:29.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:29.516 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:26:29.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:29.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:29.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:29.989 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:26:30.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:26:30.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:30.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:30.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:30.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:30.930 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:26:31.401 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:26:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:31.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:31.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:31.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:31.871 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:26:32.342 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:26:32.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:32.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:32.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:32.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:26:33.288 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:26:33.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:33.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:33.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:33.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:33.760 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:26:34.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:34.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:34.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:34.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:34.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:34.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:34.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:34.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:34.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:34.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:34.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:34.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:34.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:34.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:34.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:34.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:34.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:34.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:34.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:34.231 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:26:34.702 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:26:35.173 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:26:35.644 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:26:36.117 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:26:36.590 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:26:37.062 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:26:37.534 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:26:38.007 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:26:38.479 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:26:38.950 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:26:39.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:39.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:39.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:39.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:39.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:39.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:39.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:39.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:39.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:39.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:39.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:39.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:39.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:39.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:39.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:39.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:39.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:39.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:39.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:39.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:39.421 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:26:39.892 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:26:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:26:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:26:41.304 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:26:41.777 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:26:42.250 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:26:42.722 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:26:43.193 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:26:43.665 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:26:44.138 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:26:44.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:44.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:44.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:44.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:44.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:44.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:44.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:44.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:44.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:44.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:44.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:44.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:44.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:44.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:44.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:44.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:44.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:44.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:44.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:44.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:44.605 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:26:45.076 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:26:45.547 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:26:46.020 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:26:46.493 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:26:46.964 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:26:47.436 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:26:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:26:48.382 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:26:48.854 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:26:49.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:49.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:49.324 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:26:49.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:49.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:49.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:49.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:49.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:26:49.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:26:49.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:49.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:26:54.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:26:54.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:26:54.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:54.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:54.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:54.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:54.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:54.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:26:54.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:54.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:26:54.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:26:54.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:26:54.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:26:54.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:26:54.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:54.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:54.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:26:54.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:26:54.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:26:54.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:26:54.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:26:54.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:26:54.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:54.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:26:54.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:26:54.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:26:54.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:26:54.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:54.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:26:54.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:26:54.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:26:54.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:26:54.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:26:54.366 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:26:54.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:26:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:26:54.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:26:54.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:26:54.370 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:26:54.847 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:26:54.887 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:26:54.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:54.891 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:26:54.893 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:26:54.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:54.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:54.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:54.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:54.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:54.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:54.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:54.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:54.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:54.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:54.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:54.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:54.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:54.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:54.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:54.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:55.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:55.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:55.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:55.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:55.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:55.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:55.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:55.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:55.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:55.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:55.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:55.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:55.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:55.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:55.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:55.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:26:55.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:55.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:55.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:55.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:55.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:55.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:55.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:55.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:55.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:55.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:55.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:55.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:55.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:55.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:55.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:55.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:55.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:55.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:55.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:55.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:55.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:55.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:26:56.247 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:26:56.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:56.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:56.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:56.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:56.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:56.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:56.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:56.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:56.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:56.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:56.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:56.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:56.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:56.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:26:56.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:56.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:56.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:56.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:56.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:26:56.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:26:56.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:26:56.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:26:56.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:56.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:56.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:26:57.184 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:26:57.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:26:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:26:57.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:26:57.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:26:57.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:26:57.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:26:57.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:26:57.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:26:57.281 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:27:02.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:27:02.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:27:02.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:27:02.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:27:02.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:27:02.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:27:02.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:27:02.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:27:02.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:27:02.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:27:02.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:27:02.302 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:27:02.302 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:27:02.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:27:02.302 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:27:02.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:27:02.303 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:27:02.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:27:02.303 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:27:02.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:27:02.305 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:27:02.305 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:27:02.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:27:02.305 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:27:02.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:27:02.305 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:27:02.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:27:02.306 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:27:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:27:02.307 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:27:02.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:27:02.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:27:02.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:27:02.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:27:02.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:27:02.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:27:02.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:27:02.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:27:02.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:27:02.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:27:02.311 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:27:02.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:27:02.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:27:02.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:27:02.841 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:27:02.843 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:27:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:27:02.846 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:27:02.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:02.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:02.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:27:02.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:02.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:02.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:27:02.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:27:02.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:02.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:27:02.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:27:02.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:27:02.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:27:02.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:27:02.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:27:02.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:02.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:03.262 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:27:03.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:27:03.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:27:03.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:27:03.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:27:03.736 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:27:04.208 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:27:04.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:27:04.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:27:04.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:27:04.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:27:04.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:27:05.152 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:27:05.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:27:05.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:27:05.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:27:05.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:27:05.625 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:27:06.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:27:06.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:27:06.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:27:06.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:27:06.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:27:06.568 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:27:07.041 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:27:07.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:27:07.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:27:07.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:27:07.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:27:07.514 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:27:07.986 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:27:08.458 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:27:08.931 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:27:09.403 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:27:09.875 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:27:10.346 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:27:10.816 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:27:11.286 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:27:11.757 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:27:12.228 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:27:12.699 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:27:13.169 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:27:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:27:14.111 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:27:14.583 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:27:15.053 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:27:15.526 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:27:15.999 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:27:16.471 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:27:16.942 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:27:17.415 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:27:17.888 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:27:18.360 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:27:18.831 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:27:19.303 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:27:19.776 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:27:20.248 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:27:20.719 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:27:21.190 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:27:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:27:22.136 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:27:22.608 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:27:22.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:22.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:27:22.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:22.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:22.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:22.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:22.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:27:22.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:22.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:22.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:27:22.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:27:22.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:22.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:27:22.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:27:22.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:27:22.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:27:22.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:27:22.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:27:22.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:22.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:23.079 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:27:23.550 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:27:24.021 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:27:24.493 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:27:24.966 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:27:25.438 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:27:25.909 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:27:26.379 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:27:26.850 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:27:27.321 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:27:27.792 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:27:28.262 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:27:28.733 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:27:29.206 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:27:29.678 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:27:30.150 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:27:30.621 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:27:31.092 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:27:31.563 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:27:32.034 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:27:32.504 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:27:32.975 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:27:33.446 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:27:33.917 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:27:34.387 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:27:34.858 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:27:35.329 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:27:35.800 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:27:36.271 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:27:36.741 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:27:37.212 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:27:37.683 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:27:38.154 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:27:38.624 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:27:39.095 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:27:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:27:40.040 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:27:40.513 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:27:40.985 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:27:41.454 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:27:41.924 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:27:42.396 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:27:42.866 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:27:42.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:42.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:27:42.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:42.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:43.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:43.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:43.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:27:43.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:27:43.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:27:43.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:27:43.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:27:43.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:43.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:27:43.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:27:43.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:27:43.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:27:43.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:27:43.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:27:43.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:43.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:27:43.337 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:27:43.808 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:27:44.279 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:27:44.752 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:27:45.223 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:27:45.690 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:27:46.162 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:27:46.632 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:27:47.105 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:27:47.578 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:27:48.050 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:27:48.521 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:27:48.992 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:27:49.463 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:27:49.936 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:27:50.408 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:27:50.881 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:27:51.354 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:27:51.826 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:27:52.298 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:27:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:27:53.243 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:27:53.711 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:27:54.182 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:27:54.653 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:27:55.124 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:27:55.598 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:27:56.070 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:27:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:27:57.011 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:27:57.482 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:27:57.955 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:27:58.428 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:27:58.899 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:27:59.370 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:27:59.841 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:28:00.314 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:28:00.787 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:28:01.259 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:28:01.730 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 02:28:02.203 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 02:28:02.676 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 02:28:03.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:03.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:03.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:03.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:03.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:03.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:03.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:03.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:03.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:03.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:03.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:03.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:03.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:03.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:03.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:03.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:03.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:03.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:03.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:03.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:03.147 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 02:28:03.619 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 02:28:04.092 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 02:28:04.564 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 02:28:05.036 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 02:28:05.507 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 02:28:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 02:28:06.453 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 02:28:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 02:28:07.396 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 02:28:07.869 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 02:28:08.342 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 02:28:08.808 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 02:28:09.274 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 02:28:09.738 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 02:28:10.200 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 02:28:10.664 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 02:28:11.130 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 02:28:11.599 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 02:28:12.067 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 02:28:12.538 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 02:28:13.009 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 02:28:13.480 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 02:28:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 02:28:14.424 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 02:28:14.892 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 02:28:15.363 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 02:28:15.834 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 02:28:16.304 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 02:28:16.777 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 02:28:17.250 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 02:28:17.722 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 02:28:18.193 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 02:28:18.664 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 02:28:19.134 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 02:28:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 02:28:20.077 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 02:28:20.547 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 02:28:21.018 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 02:28:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 02:28:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 02:28:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 02:28:22.901 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 02:28:23.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:23.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:23.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:23.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:23.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:23.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:23.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:23.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:23.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:23.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:23.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:23.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:23.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:28:23.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:28:23.119 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:28:28.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:28:28.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:28:28.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:28.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:28.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:28.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:28.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:28.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:28:28.132 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:28.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:28:28.132 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:28:28.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:28:28.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:28:28.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:28:28.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:28.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:28.136 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:28:28.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:28:28.136 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:28:28.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:28.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:28:28.137 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:28:28.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:28:28.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:28.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:28.137 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:28:28.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:28:28.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:28:28.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:28.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:28:28.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:28:28.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:28:28.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:28.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:28.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:28:28.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:28:28.139 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:28:28.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:28:28.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:28:28.142 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:28:28.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:28.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:28:28.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:28:28.144 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:28:33.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:28:33.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:28:33.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:33.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:33.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:33.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:33.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:33.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:28:33.162 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:33.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:28:33.163 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:28:33.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:28:33.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:28:33.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:28:33.167 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:33.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:33.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:28:33.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:28:33.168 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:28:33.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:28:33.169 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:28:33.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:28:33.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:33.171 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:28:33.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:28:33.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:28:33.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:33.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:33.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:28:33.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:28:33.172 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:28:33.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:28:33.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:28:33.175 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:28:33.175 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:33.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:28:33.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:28:33.704 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:28:33.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:33.708 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:28:33.710 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:28:33.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:33.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:33.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:33.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:33.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:33.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:33.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:33.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:33.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:33.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:33.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:33.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:33.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:33.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:33.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:33.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:33.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:33.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:33.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:33.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:34.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:34.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:34.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:28:34.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:34.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:34.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:34.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:34.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:34.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:34.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:34.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:34.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:34.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:34.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:34.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.592 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:28:34.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:34.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:34.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:34.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:34.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:34.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:34.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:34.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:34.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:34.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.063 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:28:35.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:35.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:35.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:35.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:35.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:35.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:35.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:35.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:35.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:35.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:35.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:35.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:35.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:35.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:35.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:35.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:35.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:35.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:35.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:35.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:35.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:35.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:35.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:35.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:35.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:35.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:35.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:35.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:35.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:35.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:35.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:35.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:35.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:35.533 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:28:36.004 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:28:36.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:36.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:36.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:36.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:36.475 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:28:36.946 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:28:37.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:37.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:37.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:37.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:37.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:28:37.888 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:28:38.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:38.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:38.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:38.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:38.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:38.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:38.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:38.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:38.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:38.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:38.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:38.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:38.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:38.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:38.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:38.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:38.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:38.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:38.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:38.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:38.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:38.355 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:28:38.825 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:28:39.295 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:28:39.768 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:28:40.241 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:28:40.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:40.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:40.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:40.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:40.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:40.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:40.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:40.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:40.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:40.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:40.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:40.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:40.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:40.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:40.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:40.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:40.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:40.713 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:28:41.179 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:28:41.649 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:28:42.121 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:28:42.592 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:28:43.062 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:28:43.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:43.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:43.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:43.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:43.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:43.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:43.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:43.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:43.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:43.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:43.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:43.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:43.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:43.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:43.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:43.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:43.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:43.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:43.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:43.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:43.529 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:28:43.999 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:28:44.470 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:28:44.943 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:28:45.416 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:28:45.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:45.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:45.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:45.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:45.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:45.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:45.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:45.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:45.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:45.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:45.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:45.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:45.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:45.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:45.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:45.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:45.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:45.887 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:28:46.359 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:28:46.829 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:28:47.300 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:28:47.771 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:28:48.244 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:28:48.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:48.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:48.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:48.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:48.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:48.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:48.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:48.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:48.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:48.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:48.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:48.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:48.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:48.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:48.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:48.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:48.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:48.717 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:28:49.188 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:28:49.659 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:28:50.133 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:28:50.605 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:28:50.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:50.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:50.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:50.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:50.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:50.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:50.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:50.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:50.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:50.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:50.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:50.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:50.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:28:50.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:28:50.941 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:50.941 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:28:55.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:28:55.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:28:55.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:55.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:55.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:55.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:55.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:28:55.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:28:55.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:55.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:28:55.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:28:55.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:28:55.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:28:55.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:28:55.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:55.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:28:55.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:28:55.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:28:55.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:28:55.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:55.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:28:55.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:28:55.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:28:55.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:55.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:28:55.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:28:55.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:28:55.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:28:55.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:28:55.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:28:55.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:28:55.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:55.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:28:55.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:28:55.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:28:55.967 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:28:55.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:28:55.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:28:56.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:28:56.489 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:28:56.490 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:28:56.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:56.490 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:28:56.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:56.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:56.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:56.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:56.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:56.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:56.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:56.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:56.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:56.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:56.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:56.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:56.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:56.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:56.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:56.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:56.917 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:28:56.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:56.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:56.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:56.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:57.388 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:28:57.859 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:28:57.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:57.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:57.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:57.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:58.330 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:28:58.802 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:28:58.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:58.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:58.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:58.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:28:59.271 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:28:59.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:59.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:59.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:59.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:59.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:59.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:59.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:59.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:28:59.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:28:59.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:28:59.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:28:59.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:59.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:59.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:59.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:28:59.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:28:59.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:28:59.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:28:59.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:59.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:28:59.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:28:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:28:59.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:28:59.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:28:59.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:00.213 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:29:00.685 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:29:00.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:00.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:00.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:00.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:01.158 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:29:01.630 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:29:02.101 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:29:02.572 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:29:02.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:02.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:02.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:02.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:02.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:02.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:02.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:02.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:02.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:02.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:02.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:02.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:02.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:02.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:02.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:02.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:02.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:02.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:02.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:02.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:03.042 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:29:03.513 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:29:03.984 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:29:04.455 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:29:04.926 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:29:05.397 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:29:05.868 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:29:06.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:06.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:06.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:06.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:06.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:06.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:06.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:06.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:06.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:06.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:06.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:06.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:06.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:06.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:06.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:06.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:06.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:06.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:06.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:06.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:06.336 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:29:06.804 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:29:07.275 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:29:07.745 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:29:08.216 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:29:08.682 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:29:09.153 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:29:09.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:09.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:09.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:09.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:09.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:09.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:09.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:09.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:09.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:09.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:09.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:09.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:09.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:09.512 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:29:09.512 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.513 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.513 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.513 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2933 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.513 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.513 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.513 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2935 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.514 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2935 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2935 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2935 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2935 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:09.515 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2935 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:14.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:14.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:14.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:14.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:14.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:14.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:14.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:14.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:14.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:14.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:14.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:29:14.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:29:14.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:29:14.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:14.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:14.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:14.530 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:29:14.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:14.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:29:14.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:14.532 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:29:14.532 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:29:14.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:14.532 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:14.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:14.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:29:14.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:14.533 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:29:14.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:14.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:29:14.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:29:14.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:14.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:14.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:14.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:29:14.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:14.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:29:14.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:14.537 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:29:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:29:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:29:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:29:14.537 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:29:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:29:14.538 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:29:14.538 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:29:14.538 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:14.543 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:29:15.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:29:15.066 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:29:15.068 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:29:15.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:15.070 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:29:15.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:15.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:15.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:15.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:15.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:15.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:15.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:15.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:15.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:15.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:15.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:15.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:15.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:15.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:15.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:15.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:15.489 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:29:15.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:15.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:15.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:15.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:15.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:15.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:15.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:15.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:15.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:15.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:15.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:15.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:15.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:15.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:15.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:15.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:15.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:15.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:15.960 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:29:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:16.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:16.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:16.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:16.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:16.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:16.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:16.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:16.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:16.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:16.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:16.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:16.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:16.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:16.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:16.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:16.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:16.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:16.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:16.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:16.425 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:29:16.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:16.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:16.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:16.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:16.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:29:17.367 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:29:17.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:17.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:17.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:17.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:17.838 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:29:18.312 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:29:18.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:18.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:18.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:18.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:18.784 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:29:18.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:18.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:18.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:18.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:18.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:18.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:18.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:18.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:18.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:18.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:18.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:18.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:18.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:18.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:18.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:18.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:19.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:19.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:19.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:19.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:19.251 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:29:19.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:19.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:19.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:19.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:19.722 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:29:20.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:29:20.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:29:21.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:29:21.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:29:21.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:21.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:21.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:21.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:21.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:21.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:21.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:21.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:21.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:21.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:21.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:21.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:21.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:21.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:21.947 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:21.947 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:26.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:26.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:26.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:26.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:26.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:26.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:26.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:26.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:26.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:26.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:26.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:29:26.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:29:26.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:29:26.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:26.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:26.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:26.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:29:26.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:26.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:29:26.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:26.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:26.964 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:29:26.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:26.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:26.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:29:26.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:29:26.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:29:26.969 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:29:26.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:26.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:29:27.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:29:27.495 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:29:27.497 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:29:27.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:27.499 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:29:27.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:27.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:27.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:27.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:27.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:27.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:27.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:27.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:27.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:27.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:27.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:27.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:27.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:27.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:27.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:27.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:27.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:29:27.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:27.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:27.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:27.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:28.389 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:29:28.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:28.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:28.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:28.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:28.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:28.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:28.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:28.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:28.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:28.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:28.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:28.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:28.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:28.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:28.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:28.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:28.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:28.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:28.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:28.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:28.861 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:29:28.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:28.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:28.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:28.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:29.330 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:29:29.802 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:29:29.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:29.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:29.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:29.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:30.275 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:29:30.742 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:29:30.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:30.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:30.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:30.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:30.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:30.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:30.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:31.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:31.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:31.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:31.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:31.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:31.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:31.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:31.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:31.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:31.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:31.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:31.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:31.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:31.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:31.213 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:29:31.683 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:29:31.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:31.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:31.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:31.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:32.155 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:29:32.627 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:29:33.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:29:33.567 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:29:34.038 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:29:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:29:34.979 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:29:35.452 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:29:35.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:35.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:35.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:35.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:35.925 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:29:35.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:35.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:35.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:35.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:35.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:35.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:35.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:35.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:35.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:35.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:35.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:35.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:35.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:35.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:35.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:35.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:36.392 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:29:36.863 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:29:37.336 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:29:37.809 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:29:38.281 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:29:38.751 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:29:39.222 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:29:39.695 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:29:40.168 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:29:40.640 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:29:40.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:40.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:40.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:40.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:40.797 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2994 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:40.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:40.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:40.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:40.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:40.807 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:29:40.807 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:40.807 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:40.807 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:40.807 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:40.807 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:45.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:45.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:45.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:45.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:45.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:45.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:45.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:45.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:45.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:45.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:45.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:29:45.826 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:45.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:45.827 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:29:45.827 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:29:45.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:45.828 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:45.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:45.828 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:29:45.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:45.828 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:29:45.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:45.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:29:45.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:29:45.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:45.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:45.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:45.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:29:45.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:45.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:29:45.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:29:45.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:29:45.831 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:29:45.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:45.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:29:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:29:46.358 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:29:46.359 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:29:46.360 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:29:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:46.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:46.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:46.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:46.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:46.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:46.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:46.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:46.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:46.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:46.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:46.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:46.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:46.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:46.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:46.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:46.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:46.781 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:29:46.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:46.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:46.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:46.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:47.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:47.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:47.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:47.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:47.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:47.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:47.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:47.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:47.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:47.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:47.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:47.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:47.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:47.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:47.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:47.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:47.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:47.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:29:47.723 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:29:47.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:47.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:47.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:47.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:48.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:48.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:48.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:48.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:48.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:48.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:48.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:48.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:48.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:48.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:48.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:48.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:48.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:48.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:48.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:48.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:48.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:48.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:48.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:48.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:48.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:29:48.664 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:29:48.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:48.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:48.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:48.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:49.137 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:29:49.610 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:29:49.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:49.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:49.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:50.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:50.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:50.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:50.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:50.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:50.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:50.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:50.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:50.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:50.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:50.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:50.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:50.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:50.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:50.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:50.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:50.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:50.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:50.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:50.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:50.081 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:29:50.552 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:29:50.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:50.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:50.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:50.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:51.023 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:29:51.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:29:51.965 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:29:52.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:52.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:52.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:52.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:52.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:52.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:52.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:52.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:52.062 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:29:52.063 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:52.063 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:52.063 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:52.063 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:52.063 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:29:57.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:29:57.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:29:57.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:57.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:57.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:57.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:57.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:29:57.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:57.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:57.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:29:57.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:29:57.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:29:57.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:29:57.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:57.081 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:57.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:29:57.082 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:29:57.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:29:57.082 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:29:57.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:57.083 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:29:57.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:29:57.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:57.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:57.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:29:57.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:29:57.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:29:57.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:29:57.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:57.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:29:57.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:29:57.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:57.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:29:57.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:29:57.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:29:57.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:29:57.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:29:57.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:29:57.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:29:57.088 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:29:57.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:29:57.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:29:57.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:29:57.615 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:29:57.618 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:29:57.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:57.620 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:29:57.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:57.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:57.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:57.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:29:57.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:29:57.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:29:57.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:29:57.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:57.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:57.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:57.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:29:57.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:29:57.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:29:57.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:29:57.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:57.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:29:58.038 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:29:58.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:58.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:58.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:58.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:58.509 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:29:58.980 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:29:59.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:29:59.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:29:59.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:29:59.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:29:59.451 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:29:59.924 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:30:00.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:00.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:00.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:00.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:00.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:00.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:00.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:00.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:00.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:00.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:00.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:00.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:00.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:00.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:00.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:00.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:00.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:00.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:00.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:00.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:00.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:00.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:00.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:00.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:30:00.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:30:01.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:01.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:01.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:01.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:01.334 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:30:01.804 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:30:02.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:02.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:02.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:02.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:02.275 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:30:02.741 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:30:02.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:02.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:02.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:02.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:02.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:02.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:02.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:02.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:02.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:02.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:02.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:02.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:02.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:02.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:02.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:02.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:02.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:02.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:02.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:02.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:03.212 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:30:03.683 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:30:04.156 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:30:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:30:05.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:30:05.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:30:06.042 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:30:06.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:06.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:06.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:06.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:06.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:06.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:06.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:06.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:06.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:06.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:06.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:06.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:06.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:06.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:06.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:06.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:06.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:06.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:06.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:06.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:06.513 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:30:06.985 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:30:07.454 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:30:07.925 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:30:08.397 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:30:08.867 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:30:09.338 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:30:09.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:09.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:09.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:09.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:30:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:30:09.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:30:09.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:30:09.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:30:09.667 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:30:14.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:30:14.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:30:14.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:30:14.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:30:14.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:30:14.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:30:14.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:30:14.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:30:14.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:14.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:30:14.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:30:14.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:30:14.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:30:14.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:30:14.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:14.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:30:14.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:30:14.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:30:14.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:30:14.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:14.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:30:14.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:30:14.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:30:14.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:14.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:30:14.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:30:14.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:30:14.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:30:14.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:14.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:30:14.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:30:14.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:30:14.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:14.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:30:14.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:30:14.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:30:14.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:30:14.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.699 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:30:14.699 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:30:14.699 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:30:14.699 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:14.704 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:30:15.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:30:15.225 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:30:15.227 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:30:15.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:15.229 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:30:15.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:15.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:15.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:15.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:15.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:15.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:15.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:15.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:15.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:15.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:15.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:15.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:15.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:15.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:15.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:15.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:15.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:15.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:15.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:30:15.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:15.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:15.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:15.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:15.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:15.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:15.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:15.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:15.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:15.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:15.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:15.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:15.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:15.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:15.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:15.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:15.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:16.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:30:16.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:16.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:16.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:16.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:16.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:16.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:16.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:16.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:16.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:16.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:16.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:16.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:16.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:16.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:16.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:16.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:16.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:16.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:16.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:16.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:16.594 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:30:16.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:16.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:16.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:16.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:17.061 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:30:17.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:17.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:17.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:17.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:17.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:17.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:17.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:17.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:17.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:30:17.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:30:17.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:30:17.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:30:17.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:30:17.162 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:30:17.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:17.162 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:30:22.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:30:22.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:30:22.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:30:22.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:30:22.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:30:22.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:30:22.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:30:22.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:30:22.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:22.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:30:22.170 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:30:22.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:30:22.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:30:22.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:30:22.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:22.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:30:22.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:30:22.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:30:22.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:30:22.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:22.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:30:22.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:30:22.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:30:22.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:22.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:30:22.175 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:30:22.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:30:22.175 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:30:22.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:22.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:30:22.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:30:22.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:30:22.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:30:22.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:30:22.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:30:22.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:30:22.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:30:22.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:30:22.179 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:30:22.179 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:30:22.179 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:30:22.184 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:30:22.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:30:22.704 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:30:22.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:22.708 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:30:22.711 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:30:22.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:22.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:22.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:22.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:22.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:22.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:22.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:22.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:22.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:22.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:22.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:22.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:22.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:22.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:22.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:22.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:23.134 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:30:23.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:23.605 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:30:24.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:30:24.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:24.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:24.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:24.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:24.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:30:25.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:30:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:25.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:25.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:25.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:25.494 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:30:25.964 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:30:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:26.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:26.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:26.435 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:30:26.906 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:30:27.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:30:27.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:30:27.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:30:27.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:30:27.379 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:30:27.852 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:30:28.325 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:30:28.796 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:30:29.269 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:30:29.741 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:30:30.214 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:30:30.685 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:30:31.158 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:30:31.631 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:30:32.103 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:30:32.574 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:30:33.045 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:30:33.517 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:30:33.990 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:30:34.462 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:30:34.935 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:30:35.408 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:30:35.880 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:30:36.351 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:30:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:30:37.296 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:30:37.769 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:30:38.239 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:30:38.705 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:30:39.176 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:30:39.649 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:30:40.122 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:30:40.594 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:30:41.067 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:30:41.540 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:30:42.012 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:30:42.483 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:30:42.953 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:30:43.425 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:30:43.897 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:30:44.371 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:30:44.843 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:30:45.314 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:30:45.787 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:30:46.260 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:30:46.732 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:30:47.206 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:30:47.678 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:30:48.151 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:30:48.624 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:30:49.097 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:30:49.569 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:30:50.038 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:30:50.506 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:30:50.977 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:30:51.448 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:30:51.920 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:30:52.393 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:30:52.865 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:30:53.338 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:30:53.810 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:30:54.278 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:30:54.749 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:30:55.221 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:30:55.694 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:30:55.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:55.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:55.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:55.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:55.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:55.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:55.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:55.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:30:55.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:30:55.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:30:55.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:30:55.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:55.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:55.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:55.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:30:55.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:30:55.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:30:55.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:30:55.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:55.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:30:56.162 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:30:56.634 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:30:57.107 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:30:57.579 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:30:58.050 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:30:58.522 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:30:58.996 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:30:59.468 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:30:59.939 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:31:00.410 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:31:00.881 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:31:01.354 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:31:01.826 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:31:02.298 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:31:02.764 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:31:03.235 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:31:03.706 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:31:04.177 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:31:04.647 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:31:05.118 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:31:05.588 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:31:06.060 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:31:06.530 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:31:07.000 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:31:07.471 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:31:07.943 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:31:08.414 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:31:08.884 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:31:09.355 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:31:09.826 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:31:10.297 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:31:10.767 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:31:11.238 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:31:11.706 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:31:12.175 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:31:12.646 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:31:13.119 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:31:13.591 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:31:14.063 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:31:14.534 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:31:15.005 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:31:15.476 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:31:15.949 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:31:16.422 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:31:16.894 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:31:17.365 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:31:17.835 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:31:18.306 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:31:18.776 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:31:19.243 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:31:19.714 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:31:20.185 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:31:20.655 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:31:21.126 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:31:21.597 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 02:31:22.068 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 02:31:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 02:31:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 02:31:23.475 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 02:31:23.939 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 02:31:24.404 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 02:31:24.878 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 02:31:25.345 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 02:31:25.811 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 02:31:26.281 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 02:31:26.746 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 02:31:27.210 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 02:31:27.676 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 02:31:28.142 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 02:31:28.608 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 02:31:29.077 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 02:31:29.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:31:29.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:31:29.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:31:29.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:31:29.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:31:29.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:31:29.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:31:29.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:31:29.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:31:29.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:31:29.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:31:29.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:31:29.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:31:29.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:31:29.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:31:29.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:31:29.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:31:29.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:31:29.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:31:29.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:31:29.544 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 02:31:30.010 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 02:31:30.477 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 02:31:30.947 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 02:31:31.416 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 02:31:31.882 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 02:31:32.351 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 02:31:32.816 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 02:31:33.284 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 02:31:33.753 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 02:31:34.221 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 02:31:34.690 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 02:31:35.157 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 02:31:35.627 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 02:31:36.094 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 02:31:36.563 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 02:31:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 02:31:37.499 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 02:31:37.967 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 02:31:38.433 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 02:31:38.900 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 02:31:39.370 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 02:31:39.837 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 02:31:40.303 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 02:31:40.772 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 02:31:41.240 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 02:31:41.703 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 02:31:42.170 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 02:31:42.636 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 02:31:43.103 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 02:31:43.571 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 02:31:44.041 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 02:31:44.509 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 02:31:44.978 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 02:31:45.445 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 02:31:45.911 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 02:31:46.377 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 02:31:46.843 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 02:31:47.313 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 02:31:47.779 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-07 02:31:48.250 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-07 02:31:48.719 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-07 02:31:49.187 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-07 02:31:49.650 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-07 02:31:50.116 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-07 02:31:50.587 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-07 02:31:51.053 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-07 02:31:51.524 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-07 02:31:51.995 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-07 02:31:52.468 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-05-07 02:31:52.941 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-05-07 02:31:53.412 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-05-07 02:31:53.879 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-05-07 02:31:54.350 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-05-07 02:31:54.823 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-05-07 02:31:55.290 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-05-07 02:31:55.762 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-05-07 02:31:56.235 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-05-07 02:31:56.708 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-05-07 02:31:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-05-07 02:31:57.650 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-05-07 02:31:58.121 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-05-07 02:31:58.594 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-05-07 02:31:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-05-07 02:31:59.539 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-05-07 02:32:00.012 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-05-07 02:32:00.485 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-05-07 02:32:00.957 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-05-07 02:32:01.428 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-05-07 02:32:01.901 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-05-07 02:32:02.374 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-05-07 02:32:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-05-07 02:32:03.317 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-05-07 02:32:03.790 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-05-07 02:32:04.263 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-05-07 02:32:04.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:04.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:04.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:04.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:04.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:04.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:04.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:04.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:04.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:04.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:04.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:04.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:04.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:04.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:04.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:32:04.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:32:04.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:04.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:04.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:04.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:04.734 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-05-07 02:32:05.206 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-05-07 02:32:05.678 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-05-07 02:32:06.151 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-05-07 02:32:06.623 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-05-07 02:32:07.094 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-05-07 02:32:07.559 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-05-07 02:32:08.031 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-05-07 02:32:08.502 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-05-07 02:32:08.976 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-05-07 02:32:09.448 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-05-07 02:32:09.919 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-05-07 02:32:10.389 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-05-07 02:32:10.862 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-05-07 02:32:11.330 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-05-07 02:32:11.802 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-05-07 02:32:12.275 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-05-07 02:32:12.747 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-05-07 02:32:13.219 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-05-07 02:32:13.690 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-05-07 02:32:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-05-07 02:32:14.636 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-05-07 02:32:15.108 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-05-07 02:32:15.579 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-05-07 02:32:16.052 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-05-07 02:32:16.525 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-05-07 02:32:16.997 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-05-07 02:32:17.468 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-05-07 02:32:17.938 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-05-07 02:32:18.409 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-05-07 02:32:18.882 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-05-07 02:32:19.355 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-05-07 02:32:19.827 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-05-07 02:32:20.298 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-05-07 02:32:20.769 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-05-07 02:32:21.242 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-05-07 02:32:21.714 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-05-07 02:32:22.186 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-05-07 02:32:22.657 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-05-07 02:32:23.127 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-05-07 02:32:23.598 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-05-07 02:32:24.069 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-05-07 02:32:24.540 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-05-07 02:32:25.011 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-05-07 02:32:25.484 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-05-07 02:32:25.955 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-05-07 02:32:26.420 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-05-07 02:32:26.889 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-05-07 02:32:27.360 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-05-07 02:32:27.831 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-05-07 02:32:28.302 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-05-07 02:32:28.773 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-05-07 02:32:29.243 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-05-07 02:32:29.717 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-05-07 02:32:30.189 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-05-07 02:32:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-05-07 02:32:31.132 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-05-07 02:32:31.605 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-05-07 02:32:32.078 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-05-07 02:32:32.550 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-05-07 02:32:33.021 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-05-07 02:32:33.494 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-05-07 02:32:33.967 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-05-07 02:32:34.439 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-05-07 02:32:34.910 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-05-07 02:32:35.380 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-05-07 02:32:35.851 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-05-07 02:32:36.324 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-05-07 02:32:36.797 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-05-07 02:32:37.269 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-05-07 02:32:37.741 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-05-07 02:32:38.210 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-05-07 02:32:38.676 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-05-07 02:32:39.146 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-05-07 02:32:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 29784
2026-05-07 02:32:39.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:39.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:39.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:39.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:39.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:39.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:39.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:39.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:32:39.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:32:39.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:32:39.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:32:39.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:32:39.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:32:39.717 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:32:44.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:32:44.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:32:44.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:32:44.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:32:44.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:32:44.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:32:44.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:32:44.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:32:44.734 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:44.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:32:44.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:32:44.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:32:44.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:32:44.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:32:44.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:44.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:32:44.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:32:44.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:32:44.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:32:44.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:44.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:32:44.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:32:44.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:32:44.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:44.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:32:44.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:32:44.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:32:44.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:32:44.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:44.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:32:44.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:32:44.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:32:44.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:44.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:32:44.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:32:44.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:32:44.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:32:44.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:32:44.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:32:44.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:32:44.749 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:32:44.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:32:44.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:32:44.751 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:32:44.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:32:49.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:32:49.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:32:49.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:32:49.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:32:49.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:32:49.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:32:49.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:32:49.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:32:49.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:49.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:32:49.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:32:49.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:32:49.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:32:49.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:49.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:32:49.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:32:49.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:32:49.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:49.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:32:49.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:32:49.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:32:49.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:32:49.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:49.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:32:49.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:32:49.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:32:49.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:32:49.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:32:49.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:32:49.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:32:49.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:32:49.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:32:49.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:32:49.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:32:49.773 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:32:49.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:32:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:32:49.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:32:49.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:32:50.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:32:50.300 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:32:50.303 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:32:50.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:50.303 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:32:50.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:50.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:50.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:50.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:50.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:50.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:50.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:50.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:50.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:50.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:32:50.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:32:50.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:50.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:50.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:50.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:50.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:32:50.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:50.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:50.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:50.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:51.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:32:51.668 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:32:51.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:51.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:51.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:51.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:51.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:51.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:51.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:51.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:51.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:51.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:51.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:51.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:51.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:51.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:51.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:51.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:51.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:51.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:51.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:32:51.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:32:51.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:51.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:51.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:51.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:52.136 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:32:52.605 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:32:52.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:52.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:52.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:52.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:53.075 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:32:53.546 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:32:53.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:53.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:53.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:53.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:54.017 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:32:54.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:54.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:54.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:54.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:54.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:54.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:54.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:54.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:54.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:54.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:54.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:54.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:54.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:54.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:32:54.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:32:54.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:54.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:54.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:54.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:54.487 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:32:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:32:54.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:32:54.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:32:54.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:32:54.959 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:32:55.429 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:32:55.900 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:32:56.371 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:32:56.841 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:32:57.312 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:32:57.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:57.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:57.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:57.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:57.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:57.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:57.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:57.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:32:57.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:32:57.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:32:57.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:32:57.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:57.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:57.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:57.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:32:57.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:32:57.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:32:57.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:32:57.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:57.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:32:57.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:32:58.254 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:32:58.724 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:32:59.196 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:32:59.669 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:33:00.141 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:33:00.613 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:33:00.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:00.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:00.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:00.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:33:00.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:33:00.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:33:00.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:33:00.945 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:33:00.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:33:00.945 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.945 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.945 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.946 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.946 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.946 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.946 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:00.946 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2420 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:33:05.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:33:05.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:33:05.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:33:05.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:33:05.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:33:05.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:33:05.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:33:05.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:33:05.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:33:05.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:33:05.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:33:05.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:33:05.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:33:05.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:33:05.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:33:05.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:33:05.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:33:05.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:33:05.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:33:05.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:05.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:33:05.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:33:05.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:33:05.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:33:05.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:33:05.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:33:05.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:33:05.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:33:05.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:33:05.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:33:05.959 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:33:05.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:33:05.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:33:06.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:33:06.480 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:33:06.481 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:33:06.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:06.483 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:33:06.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:06.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:06.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:06.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:06.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:06.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:06.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:06.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:06.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:06.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:06.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:33:06.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:33:06.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:06.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:06.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:06.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:06.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:33:06.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:06.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:06.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:06.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:07.386 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:33:07.859 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:33:07.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:07.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:07.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:07.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:08.332 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:33:08.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:33:08.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:08.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:08.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:08.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:33:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:33:09.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:09.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:09.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:09.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:10.220 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:33:10.693 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:33:10.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:33:10.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:33:10.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:33:10.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:33:11.163 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:33:11.634 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:33:12.105 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:33:12.578 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:33:13.051 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:33:13.523 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:33:13.993 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:33:14.459 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:33:14.930 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:33:15.401 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:33:15.872 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:33:16.343 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:33:16.813 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:33:17.285 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:33:17.756 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:33:18.227 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:33:18.699 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:33:19.172 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:33:19.644 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:33:20.115 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:33:20.587 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:33:21.061 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:33:21.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:21.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:21.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:21.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:21.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:21.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:21.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:21.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:21.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:21.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:21.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:21.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:21.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:21.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:21.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:33:21.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:33:21.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:21.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:21.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:21.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:21.532 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:33:22.004 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:33:22.475 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:33:22.945 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:33:23.416 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:33:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:33:24.360 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:33:24.833 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:33:25.305 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:33:25.776 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:33:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:33:26.718 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:33:27.189 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:33:27.662 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:33:28.134 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:33:28.606 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:33:29.077 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:33:29.548 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:33:30.019 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:33:30.489 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:33:30.962 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:33:31.435 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:33:31.907 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:33:32.380 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:33:32.852 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:33:33.324 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:33:33.796 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:33:34.269 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:33:34.741 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:33:35.214 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:33:35.684 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:33:36.155 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:33:36.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:36.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:36.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:36.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:36.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:36.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:36.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:36.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:36.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:36.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:36.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:36.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:36.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:36.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:36.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:33:36.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:33:36.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:36.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:36.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:36.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:36.625 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:33:37.097 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:33:37.567 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:33:38.038 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:33:38.509 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:33:38.980 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:33:39.450 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:33:39.921 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:33:40.392 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:33:40.865 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:33:41.338 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:33:41.810 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:33:42.281 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:33:42.752 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:33:43.222 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:33:43.693 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:33:44.166 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:33:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:33:45.111 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:33:45.582 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:33:46.053 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:33:46.525 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:33:46.998 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:33:47.470 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:33:47.941 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:33:48.414 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:33:48.882 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:33:49.353 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:33:49.824 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:33:50.295 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:33:50.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:50.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:50.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:50.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:50.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:50.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:50.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:50.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:33:50.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:33:50.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:33:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:33:50.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:50.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:50.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:50.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:33:50.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:33:50.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:33:50.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:33:50.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:50.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:33:50.765 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:33:51.236 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:33:51.707 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:33:52.178 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:33:52.651 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:33:53.123 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:33:53.595 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:33:54.066 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:33:54.539 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:33:55.012 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:33:55.483 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:33:55.949 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:33:56.421 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:33:56.892 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:33:57.363 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:33:57.833 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:33:58.303 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:33:58.775 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:33:59.245 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:33:59.716 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:34:00.189 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:34:00.662 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:34:01.134 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:34:01.605 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:34:02.078 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:34:02.550 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:34:03.022 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:34:03.493 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:34:03.966 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:34:04.438 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:34:04.910 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:34:05.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:05.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:05.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:05.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:05.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:05.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:05.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:05.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:05.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:05.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:05.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:05.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:05.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:34:05.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:34:05.324 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:05.324 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=12841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:10.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:34:10.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:34:10.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:10.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:10.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:10.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:10.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:10.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:34:10.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:10.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:34:10.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:34:10.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:34:10.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:34:10.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:34:10.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:10.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:10.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:34:10.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:34:10.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:34:10.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:10.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:34:10.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:34:10.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:34:10.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:10.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:10.346 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:34:10.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:34:10.346 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:34:10.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:10.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:34:10.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:34:10.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:34:10.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:10.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:10.348 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:34:10.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:34:10.348 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:34:10.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:34:10.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:34:10.352 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:34:10.352 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:10.356 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:34:10.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:34:10.875 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:34:10.877 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:34:10.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:10.878 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:34:10.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:10.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:10.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:10.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:10.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:10.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:10.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:10.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:10.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:10.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:10.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:10.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:10.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:10.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:10.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:10.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:11.303 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:34:11.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:11.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:11.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:11.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:11.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:34:12.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:34:12.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:12.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:12.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:12.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:12.715 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:34:13.185 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:34:13.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:13.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:13.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:13.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:13.656 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:34:14.127 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:34:14.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:14.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:14.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:14.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:14.598 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:34:15.071 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:34:15.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:15.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:15.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:15.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:15.543 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:34:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:34:16.482 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:34:16.953 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:34:17.426 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:34:17.899 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:34:18.371 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:34:18.841 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:34:19.312 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:34:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:34:20.258 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:34:20.730 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:34:21.203 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:34:21.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:21.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:21.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:21.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:21.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:21.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:21.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:21.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:21.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:21.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:21.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:21.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:21.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:21.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:21.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:21.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:21.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:21.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:21.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:21.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:21.671 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:34:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:34:22.613 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:34:23.086 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:34:23.558 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:34:24.030 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:34:24.501 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:34:24.974 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:34:25.447 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:34:25.919 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:34:26.387 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:34:26.856 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:34:27.329 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:34:27.802 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:34:28.274 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:34:28.745 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:34:29.212 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:34:29.682 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:34:30.155 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:34:30.627 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:34:31.099 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:34:31.570 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:34:31.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:31.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:31.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:31.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:31.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:31.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:31.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:31.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:31.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:31.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:31.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:31.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:31.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:31.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:31.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:31.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:31.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:31.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:32.041 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:34:32.512 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:34:32.982 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:34:33.453 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:34:33.926 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:34:34.399 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:34:34.871 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:34:35.342 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:34:35.815 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:34:36.288 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:34:36.760 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:34:37.231 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:34:37.701 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:34:38.174 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:34:38.647 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:34:38.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:38.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:38.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:38.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:38.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:38.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:38.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:38.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:38.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:38.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:38.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:38.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:38.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:38.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:38.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:38.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:38.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:38.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:38.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:38.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:39.118 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:34:39.590 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:34:40.063 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:34:40.535 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:34:41.007 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:34:41.478 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:34:41.952 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:34:42.424 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:34:42.896 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:34:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:34:43.842 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:34:44.314 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:34:44.785 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:34:45.258 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:34:45.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:45.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:45.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:45.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:45.730 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:45.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:45.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:45.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:34:45.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:34:45.739 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:34:50.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:34:50.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:34:50.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:50.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:50.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:50.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:50.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:50.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:34:50.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:50.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:34:50.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:34:50.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:34:50.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:34:50.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:34:50.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:50.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:50.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:34:50.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:34:50.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:34:50.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:34:50.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:34:50.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:34:50.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:34:50.752 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:34:50.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:34:50.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:34:50.754 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:34:50.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:50.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:34:51.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:34:51.283 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:34:51.286 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:34:51.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:51.288 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:34:51.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:51.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:51.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:51.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:51.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:51.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:51.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:51.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:51.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:51.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:51.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:51.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:51.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:51.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:51.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:51.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:34:51.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:51.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:51.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:51.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:51.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:51.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:51.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:51.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:51.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:51.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:51.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:51.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:51.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:51.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:51.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:51.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:51.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:51.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:52.179 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:34:52.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:52.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:52.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:52.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:52.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:52.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:52.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:52.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:52.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:52.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:52.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:52.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:52.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:52.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:52.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:52.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:52.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:52.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:52.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:52.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:52.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:34:52.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:52.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:52.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:52.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:53.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:53.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:53.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:53.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:53.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:53.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:53.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:53.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:53.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:53.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:53.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:53.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:53.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:53.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:53.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:53.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:53.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:53.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:53.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:53.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:53.115 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:34:53.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:34:53.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:53.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:53.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:53.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:53.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:53.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:53.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:53.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:53.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:53.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:53.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:53.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:53.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:53.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:53.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:53.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:53.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:34:53.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:34:53.919 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:34:53.919 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.920 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.920 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.920 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.920 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.920 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.920 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=687 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:53.921 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=688 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:34:58.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:34:58.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:34:58.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:58.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:58.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:58.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:58.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:34:58.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:34:58.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:58.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:34:58.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:34:58.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:34:58.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:34:58.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:34:58.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:58.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:34:58.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:34:58.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:34:58.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:34:58.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:34:58.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:34:58.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:34:58.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:34:58.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:34:58.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:34:58.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:34:58.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:34:58.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:34:58.936 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:34:58.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:34:58.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:34:59.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:34:59.466 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:34:59.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:59.470 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:34:59.472 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:34:59.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:59.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:59.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:59.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:34:59.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:34:59.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:34:59.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:34:59.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:59.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:59.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:59.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:34:59.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:34:59.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:34:59.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:34:59.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:59.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:34:59.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:34:59.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:34:59.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:34:59.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:34:59.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:00.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:35:00.828 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:35:00.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:00.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:00.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:00.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:01.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:35:01.770 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:35:01.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:01.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:01.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:01.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:02.240 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:35:02.713 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:35:02.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:02.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:02.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:02.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:02.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:02.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:02.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:02.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:02.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:02.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:02.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:02.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:02.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:02.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:02.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:02.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:02.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:02.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:02.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:02.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:02.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:02.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:02.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:02.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:03.181 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:35:03.652 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:35:03.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:03.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:03.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:03.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:04.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:35:04.594 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:35:05.066 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:35:05.539 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:35:06.011 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:35:06.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:06.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:06.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:06.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:06.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:06.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:06.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:06.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:06.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:06.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:06.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:06.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:06.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:06.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:06.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:06.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:06.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:06.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:06.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:06.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:06.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:35:06.953 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:35:07.423 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:35:07.894 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:35:08.365 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:35:08.835 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:35:09.307 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:35:09.780 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:35:09.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:09.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:09.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:09.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:09.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:09.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:09.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:09.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:09.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:09.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:09.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:09.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:09.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:09.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:09.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:09.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:10.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:10.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:10.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:10.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:35:10.719 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:35:11.192 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:35:11.664 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:35:12.136 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:35:12.609 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:35:13.082 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:35:13.554 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:35:13.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:13.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:13.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:13.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:13.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:13.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:35:13.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:35:13.648 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:35:18.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:35:18.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:35:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:18.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:18.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:18.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:18.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:18.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:35:18.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:18.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:35:18.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:35:18.667 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:35:18.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:35:18.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:35:18.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:18.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:18.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:35:18.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:35:18.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:35:18.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:35:18.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:35:18.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:35:18.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:35:18.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:35:18.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:35:18.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:35:18.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:35:18.676 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:35:18.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:18.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:35:19.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:35:19.208 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:35:19.210 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:35:19.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:19.212 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:35:19.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:19.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:19.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:19.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:19.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:19.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:19.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:19.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:19.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:19.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:19.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:19.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:19.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:19.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:19.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:19.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:19.629 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:35:19.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:19.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:19.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:19.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:19.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:19.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:19.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:19.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:19.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:19.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:19.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:19.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:19.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:19.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:19.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:19.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:19.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:19.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:19.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:19.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:19.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:19.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:19.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:19.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:20.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:35:20.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:20.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:20.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:20.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:20.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:20.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:20.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:20.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:20.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:20.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:20.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:20.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:20.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:20.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:20.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:20.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:20.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:20.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:20.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:20.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:20.572 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:35:20.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:20.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:20.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:20.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:21.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:35:21.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:21.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:21.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:21.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:21.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:21.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:21.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:21.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:21.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:21.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:21.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:21.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:21.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:21.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:21.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:21.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:21.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:21.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:21.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:21.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:35:21.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:21.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:21.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:21.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:21.988 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:35:22.458 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:35:22.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:22.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:22.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:22.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:22.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:22.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:22.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:22.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:22.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:22.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:22.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:22.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:35:22.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:35:22.558 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:35:27.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:35:27.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:35:27.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:27.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:27.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:27.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:27.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:27.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:35:27.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:27.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:35:27.569 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:35:27.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:35:27.573 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:35:27.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:35:27.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:27.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:27.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:35:27.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:35:27.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:35:27.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:35:27.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:35:27.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:35:27.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:27.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:35:27.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:35:27.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:35:27.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:27.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:27.579 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:35:27.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:35:27.579 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:35:27.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:27.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:35:27.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:35:27.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:35:27.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:35:27.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:35:27.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:35:27.582 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:35:27.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:27.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:35:28.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:35:28.110 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:35:28.113 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:35:28.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:28.115 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:35:28.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:28.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:28.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:28.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:28.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:28.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:28.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:28.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:28.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:28.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:28.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:28.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:28.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:28.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:28.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:28.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:28.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:35:28.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:28.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:28.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:29.004 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:35:29.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:35:29.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:29.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:29.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:29.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:29.945 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:35:30.416 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:35:30.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:30.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:30.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:30.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:35:31.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:31.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:31.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:31.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:31.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:31.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:31.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:31.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:31.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:31.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:31.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:31.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:31.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:31.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:31.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:31.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:31.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:31.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:31.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:31.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:31.357 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:35:31.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:31.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:31.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:31.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:31.828 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:35:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:35:32.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:32.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:32.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:32.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:32.770 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:35:33.243 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:35:33.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:35:34.188 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:35:34.659 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:35:35.132 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:35:35.605 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:35:35.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:35.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:35.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:35.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:35.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:35.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:35.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:35.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:35.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:35.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:35.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:35.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:35.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:35.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:35.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:35.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:35.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:35.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:35.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:35.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:36.077 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:35:36.550 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:35:37.023 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:35:37.495 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:35:37.966 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:35:38.435 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:35:38.907 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:35:39.378 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:35:39.851 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:35:40.324 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:35:40.796 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:35:41.266 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:35:41.737 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:35:42.208 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:35:42.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:42.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:42.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:42.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:42.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:42.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:42.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:42.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:42.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:42.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:42.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:42.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:42.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:42.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:42.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:42.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:42.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:42.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:42.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:42.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:42.681 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:35:43.153 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:35:43.626 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:35:44.098 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:35:44.571 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:35:45.043 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:35:45.516 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:35:45.989 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:35:46.461 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:35:46.934 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:35:47.407 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:35:47.879 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:35:48.350 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:35:48.823 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:35:49.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:49.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:49.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:49.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:49.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:49.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:49.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:35:49.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:35:49.155 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:35:54.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:35:54.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:35:54.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:54.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:54.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:54.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:54.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:35:54.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:35:54.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:54.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:35:54.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:35:54.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:35:54.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:35:54.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:35:54.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:54.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:35:54.175 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:35:54.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:35:54.175 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:35:54.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:54.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:35:54.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:35:54.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:35:54.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:54.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:35:54.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:35:54.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:35:54.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:35:54.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:35:54.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:35:54.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:35:54.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:35:54.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:35:54.183 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:35:54.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:35:54.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:35:54.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:35:54.712 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:35:54.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:54.716 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:35:54.718 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:35:54.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:54.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:54.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:54.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:54.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:54.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:54.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:54.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:54.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:54.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:54.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:54.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:54.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:54.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:54.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:54.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:55.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:35:55.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:55.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:55.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:55.602 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:35:56.073 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:35:56.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:56.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:56.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:56.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:56.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:56.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:56.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:56.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:56.546 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:35:56.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:56.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:56.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:56.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:56.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:56.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:56.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:56.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:56.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:56.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:56.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:56.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:56.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:56.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:56.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:56.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:57.014 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:35:57.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:57.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:57.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:57.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:57.486 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:35:57.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:35:58.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:58.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:58.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:58.431 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:35:58.903 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:35:59.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:35:59.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:35:59.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:35:59.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:35:59.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:59.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:59.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:59.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:59.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:59.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:59.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:59.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:35:59.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:35:59.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:35:59.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:35:59.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:59.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:59.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:59.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:35:59.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:35:59.373 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:35:59.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:35:59.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:35:59.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:59.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:35:59.844 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:36:00.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:36:00.786 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:36:01.257 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:36:01.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:36:02.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:36:02.669 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:36:03.140 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:36:03.614 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:36:03.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:36:03.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:03.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:36:03.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:36:03.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:36:03.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:36:03.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:36:03.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:36:03.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:36:03.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:36:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:03.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:36:03.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:36:03.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:36:03.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:36:03.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:36:03.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:36:03.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:36:03.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:36:03.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:36:04.086 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:36:04.558 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:36:05.031 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:36:05.504 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:36:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:36:06.447 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:36:06.920 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:36:07.393 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:36:07.864 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:36:08.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:36:08.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:08.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:36:08.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:36:08.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:08.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:08.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:08.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:08.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:08.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:08.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:08.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:08.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:08.207 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:08.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:08.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.208 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:08.209 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3034 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:13.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:13.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:13.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:13.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:13.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:13.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:13.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:13.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:13.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:13.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:13.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:13.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:13.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:13.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:13.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:13.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:13.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:13.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:13.224 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:13.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:13.225 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:13.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:13.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:13.225 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:13.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:13.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:13.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:13.225 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:13.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:13.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:13.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:13.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:13.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:13.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:13.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:13.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:13.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:13.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:13.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:13.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:13.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:13.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:13.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:13.231 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:13.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:13.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:13.714 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:13.758 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:13.759 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:13.760 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:13.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:13.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.178 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:14.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:14.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:14.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:14.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.642 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:14.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:14.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:15.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:15.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:15.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:15.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:15.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:15.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:15.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:15.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:15.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:15.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:15.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:15.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:15.068 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.068 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:15.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:20.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:20.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:20.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:20.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:20.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:20.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:20.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:20.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:20.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:20.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:20.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:20.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:20.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:20.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:20.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:20.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:20.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:20.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:20.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:20.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:20.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:20.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:20.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:20.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:20.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:20.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:20.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:20.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:20.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:20.095 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:20.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:20.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:20.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:20.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:20.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:20.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:20.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:20.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:20.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:20.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:20.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:20.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:20.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:20.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:20.099 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:20.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:20.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:20.630 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:20.632 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:20.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.634 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:20.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:20.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.045 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:21.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:21.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:21.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:21.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:21.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.509 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:21.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:21.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:36:21.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:21.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:21.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:21.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:21.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:21.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:21.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:21.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:21.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:21.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:21.977 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:21.977 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:21.977 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:21.977 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:21.977 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:21.977 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:26.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:26.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:26.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:26.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:26.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:26.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:26.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:26.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:26.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:26.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:26.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:26.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:26.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:26.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:26.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:26.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:26.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:26.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:26.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:26.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:26.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:26.990 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:26.990 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:26.990 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:26.990 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:26.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:26.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:26.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:26.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:26.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:26.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:26.993 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:26.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:26.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:27.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:27.519 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:27.522 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:27.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.524 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:27.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:27.939 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:27.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:27.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:27.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:27.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:28.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:28.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:28.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:28.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:28.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:28.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:28.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:28.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:28.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:28.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:28.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:28.864 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:28.864 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.864 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:28.865 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:33.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:33.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:33.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:33.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:33.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:33.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:33.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:33.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:33.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:33.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:33.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:33.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:33.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:33.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:33.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:33.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:33.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:33.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:33.888 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:33.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:33.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:33.891 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:33.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:33.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:33.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:33.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:33.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:33.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:33.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:33.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:33.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:33.893 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:33.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:33.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:33.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:33.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:33.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:33.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:33.898 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:33.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:33.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:33.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:34.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:34.428 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:34.431 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:34.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.433 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:34.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:34.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:34.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:34.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:34.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:34.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:35.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:35.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:35.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:35.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:35.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:35.749 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:35.749 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:35.750 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:40.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:40.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:40.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:40.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:40.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:40.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:40.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:40.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:40.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:40.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:40.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:40.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:40.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:40.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:40.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:40.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:40.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:40.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:40.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:40.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:40.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:40.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:40.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:40.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:40.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:40.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:40.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:40.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:40.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:40.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:40.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:40.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:40.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:40.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:40.768 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:40.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:40.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:41.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:41.292 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:41.294 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:41.296 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:41.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:41.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:41.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:41.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:41.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:41.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:41.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:41.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.179 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:42.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:42.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:42.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:42.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:42.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:42.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:42.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:42.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:42.599 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:42.599 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:47.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:47.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:47.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:47.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:47.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:47.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:47.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:47.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:47.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:47.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:47.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:47.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:47.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:47.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:47.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:47.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:47.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:47.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:47.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:47.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:47.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:47.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:47.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:47.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:47.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:47.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:47.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:47.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:47.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:47.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:47.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:47.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:47.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:47.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:47.624 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:47.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:47.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:48.106 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:48.148 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:48.150 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.152 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:48.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:48.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.570 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:48.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:48.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:48.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:48.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:48.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:48.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:49.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:49.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:49.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:49.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:49.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:49.485 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:54.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:54.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:54.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:54.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:54.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:54.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:54.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:54.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:54.506 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:54.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:36:54.507 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:36:54.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:36:54.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:36:54.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:54.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:54.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:54.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:36:54.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:36:54.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:36:54.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:54.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:36:54.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:36:54.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:54.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:54.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:54.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:36:54.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:36:54.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:36:54.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:54.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:36:54.520 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:36:54.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:54.520 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:36:54.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:54.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:36:54.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:36:54.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:36:54.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:54.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:36:54.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:36:54.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:36:54.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:36:54.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:36:54.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.524 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:36:54.524 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:36:54.524 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:36:54.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:36:54.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:54.529 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:36:55.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:36:55.052 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:36:55.053 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:36:55.055 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:36:55.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:36:55.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:36:55.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:55.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:55.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:55.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:55.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:55.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:36:56.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:36:56.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:36:56.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:36:56.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:36:56.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:36:56.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:36:56.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:36:56.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:36:56.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:36:56.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:36:56.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:36:56.396 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:36:56.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:56.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:56.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:56.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:56.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:36:56.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:01.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:01.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:01.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:01.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:01.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:01.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:01.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:01.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:01.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:01.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:01.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:01.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:01.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:01.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:01.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:01.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:01.413 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:01.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:01.413 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:01.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:01.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:01.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:01.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:01.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:01.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:01.417 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:01.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:01.417 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:01.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:01.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:01.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:01.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:01.418 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:01.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:01.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:01.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:01.419 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:01.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:01.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:01.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:01.423 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:01.423 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:01.428 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:01.905 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:01.951 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:01.953 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:01.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.956 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:01.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:01.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:02.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:02.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:02.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:02.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:02.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:02.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:02.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:02.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:02.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:02.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:02.028 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:02.028 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:07.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:07.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:07.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:07.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:07.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:07.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:07.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:07.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:07.041 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:07.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:07.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:07.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:07.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:07.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:07.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:07.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:07.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:07.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:07.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:07.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:07.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:07.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:07.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:07.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:07.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:07.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:07.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:07.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:07.051 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:07.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:07.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:07.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:07.573 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:07.574 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:07.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.576 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:07.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:07.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:07.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:07.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:07.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:07.699 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:12.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:12.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:12.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:12.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:12.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:12.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:12.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:12.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:12.714 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:12.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:12.715 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:12.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:12.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:12.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:12.718 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:12.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:12.718 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:12.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:12.718 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:12.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:12.720 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:12.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:12.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:12.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:12.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:12.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:12.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:12.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:12.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:12.722 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:12.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:12.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:12.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:12.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:12.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:12.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:12.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:12.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:12.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:12.726 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:12.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:12.731 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:13.252 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:13.255 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.257 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:13.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:13.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:13.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:13.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:13.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:13.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:13.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:13.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:13.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:13.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:13.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:13.346 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:13.346 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:18.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:18.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:18.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:18.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:18.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:18.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:18.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:18.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:18.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:18.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:18.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:18.365 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:18.365 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:18.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:18.365 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:18.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:18.366 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:18.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:18.366 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:18.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:18.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:18.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:18.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:18.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:18.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:18.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:18.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:18.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:18.371 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:18.371 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:18.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:18.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:18.374 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:18.374 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:18.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:18.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:18.888 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:18.889 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:18.889 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:18.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:18.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:18.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:18.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:18.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:18.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:18.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:18.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:18.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:18.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:18.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:18.960 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:23.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:23.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:23.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:23.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:23.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:23.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:23.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:23.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:23.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:23.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:23.976 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:23.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:23.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:23.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:23.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:23.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:23.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:23.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:23.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:23.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:23.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:23.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:23.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:23.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:23.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:23.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:23.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:23.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:23.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:23.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:23.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:23.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:23.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:23.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:23.988 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:23.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:23.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:24.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:24.513 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:24.515 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:24.517 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:24.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:24.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:24.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:24.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:24.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:24.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:24.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:24.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:24.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:24.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:24.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:24.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:24.594 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:29.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:29.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:29.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:29.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:29.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:29.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:29.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:29.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:29.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:29.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:29.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:29.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:29.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:29.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:29.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:29.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:29.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:29.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:29.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:29.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:29.626 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:29.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:29.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:29.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:29.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:29.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:29.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:29.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:29.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:29.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:29.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:29.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:29.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:29.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:29.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:29.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:29.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:29.630 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:29.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:29.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:30.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:30.150 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:30.152 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:30.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.154 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:30.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:30.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:30.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:30.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:30.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:30.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:30.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:30.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:30.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:30.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:30.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:30.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:30.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:30.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:35.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:35.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:35.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:35.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:35.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:35.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:35.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:35.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:35.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:35.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:35.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:35.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:35.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:35.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:35.321 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:35.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:35.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:35.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:35.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:35.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:35.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:35.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:35.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:35.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:35.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:35.326 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:35.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:35.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:35.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:35.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:35.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:35.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:35.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:35.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:35.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:35.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:35.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:35.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:35.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:35.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.334 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:35.334 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:35.334 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:35.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.339 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:35.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:35.855 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:35.856 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:35.857 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:35.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:35.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:35.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:35.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:35.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:35.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:35.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:35.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:35.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:35.950 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:40.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:40.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:40.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:40.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:40.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:40.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:40.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:40.964 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:40.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:40.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:40.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:40.967 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:40.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:40.967 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:40.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:40.968 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:40.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:40.968 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:40.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:40.969 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:40.969 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:40.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:40.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:40.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:40.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:40.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:40.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:40.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:40.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:40.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:40.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:40.974 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:40.974 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:40.974 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:40.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:40.979 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:41.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:41.502 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:41.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:41.505 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:41.507 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:41.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:41.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:41.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:37:41.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:41.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:41.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:41.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:37:41.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:37:41.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:37:41.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:41.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:41.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:41.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:42.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:37:42.866 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:37:42.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:42.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:42.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:42.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:43.335 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:37:43.806 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:37:43.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:43.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:43.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:44.277 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:37:44.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:37:44.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:44.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:44.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:44.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:44.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:44.966 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:49.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:49.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:49.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:49.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:49.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:49.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:49.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:49.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:49.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:49.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:49.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:49.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:49.983 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:49.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:49.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:49.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:49.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:49.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:49.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:49.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:49.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:49.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:49.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:49.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:49.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:49.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:49.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:49.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:49.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:49.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:49.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:49.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:49.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:49.989 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:49.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:49.994 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:50.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:50.512 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:50.512 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:50.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:50.513 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:50.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:50.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:50.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:37:50.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:50.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:50.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:50.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:37:50.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:37:50.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:37:50.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:50.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:50.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:50.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:50.938 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:37:50.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:50.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:50.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:50.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:51.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:51.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:51.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:51.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:37:51.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:51.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:51.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:51.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:37:51.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:37:51.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:51.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:51.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:51.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:51.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:51.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:51.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:51.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:51.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:51.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:51.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:51.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:51.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:51.092 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:51.092 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:37:56.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:37:56.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:37:56.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:56.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:56.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:56.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:56.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:37:56.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:56.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:56.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:37:56.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:37:56.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:37:56.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:37:56.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:56.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:37:56.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:37:56.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:37:56.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:37:56.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:56.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:37:56.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:37:56.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:56.110 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:56.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:37:56.110 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:37:56.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:37:56.110 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:37:56.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:56.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:37:56.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:37:56.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:56.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:37:56.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:37:56.115 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:37:56.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:37:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:37:56.120 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:37:56.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:37:56.643 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:37:56.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:56.645 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:37:56.646 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:37:56.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:56.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:56.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:37:56.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:56.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:56.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:56.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:37:56.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:37:56.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:37:56.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:56.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:56.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:56.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:56.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:37:56.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:56.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:37:56.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:37:56.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:37:56.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:37:56.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:37:56.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:37:56.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:37:56.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:37:57.066 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:37:57.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:57.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:57.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:57.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:57.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:37:58.012 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:37:58.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:58.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:58.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:58.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:58.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:37:58.957 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:37:59.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:37:59.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:37:59.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:37:59.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:37:59.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:37:59.902 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:38:00.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:00.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:00.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:00.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:00.373 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:38:00.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:38:01.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:01.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:01.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:01.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:01.314 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:38:01.785 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:38:02.256 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:38:02.729 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:38:03.202 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:38:03.674 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:38:04.145 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:38:04.616 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:38:05.088 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:38:05.561 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:38:06.033 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:38:06.505 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:38:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:38:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:38:07.922 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:38:08.393 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:38:08.864 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:38:09.337 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:38:09.810 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:38:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:38:10.755 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:38:11.228 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:38:11.700 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:38:11.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:11.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:11.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:11.995 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=3432 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:38:11.995 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=3432 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:38:11.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:38:12.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:12.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:12.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:12.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:38:12.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:38:12.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:38:12.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:12.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:12.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:12.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:12.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:12.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:12.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:12.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:12.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:12.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:12.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:12.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:12.034 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:38:17.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:17.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:17.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:17.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:17.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:17.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:17.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:17.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:17.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:17.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:17.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:38:17.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:38:17.046 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:38:17.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:17.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:17.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:17.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:38:17.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:17.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:38:17.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:17.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:38:17.049 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:38:17.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:17.049 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:17.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:17.049 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:38:17.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:17.049 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:38:17.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:17.051 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:17.051 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:38:17.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:38:17.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:38:17.055 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:38:17.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:17.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:17.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:17.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:17.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:38:17.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:38:17.577 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:38:17.577 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:38:17.578 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:38:17.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:38:17.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:17.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:17.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:38:17.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:17.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:17.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:17.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:38:17.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:38:17.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:38:17.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:17.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:17.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:17.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:17.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:38:17.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:38:17.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:17.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:17.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:17.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:38:17.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:17.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:17.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:17.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:38:17.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:38:17.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:38:17.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:17.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:17.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:17.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:17.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:17.968 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:38:17.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:22.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:22.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:22.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:22.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:22.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:22.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:22.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:22.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:22.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:22.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:22.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:38:22.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:38:22.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:38:22.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:22.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:22.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:22.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:38:22.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:22.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:38:22.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:22.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:38:22.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:38:22.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:22.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:22.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:22.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:38:22.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:22.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:38:22.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:22.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:38:22.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:38:22.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:22.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:22.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:22.992 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:38:22.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:22.992 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:38:22.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:38:22.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:38:22.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:38:22.995 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:38:22.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:23.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:38:23.475 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:38:23.524 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:38:23.526 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:38:23.527 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:38:23.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:38:23.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:23.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:23.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:38:23.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:23.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:23.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:23.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:38:23.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:38:23.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:38:23.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:23.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:23.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:23.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:23.942 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:38:23.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:23.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:23.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:24.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:24.413 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:38:24.884 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:38:24.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:24.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:25.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:25.355 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:38:25.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:25.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:25.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:25.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:38:25.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:38:25.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:38:25.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:38:25.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:38:25.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:38:25.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:38:25.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:38:25.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:25.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:25.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:25.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:25.647 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:38:30.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:30.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:30.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:30.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:30.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:30.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:30.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:30.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:30.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:30.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:30.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:30.654 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:30.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:38:30.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:30.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:30.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:38:30.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:30.656 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:30.656 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:38:30.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:38:30.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:38:30.657 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:38:30.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:30.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:30.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:30.658 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:38:35.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:35.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:35.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:35.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:35.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:35.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:35.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:35.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:35.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:35.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:38:35.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:35.665 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:38:35.665 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:38:35.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:35.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:38:35.666 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:35.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:38:35.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:38:35.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:38:35.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:38:35.668 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:35.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:35.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:35.669 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:38:40.674 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.188.20:5700'
2026-05-07 02:38:40.675 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.188.20:5802)
2026-05-07 02:38:40.675 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.188.20:5801)
2026-05-07 02:38:40.675 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.188.22:6700'
2026-05-07 02:38:40.675 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.188.22:6802)
2026-05-07 02:38:40.675 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.188.22:6801)
2026-05-07 02:38:40.675 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.188.20:5700/1'
2026-05-07 02:38:40.675 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.188.20:5804)
2026-05-07 02:38:40.675 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.188.20:5803)
2026-05-07 02:38:40.675 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.188.20:5700/2'
2026-05-07 02:38:40.675 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.188.20:5806)
2026-05-07 02:38:40.675 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.188.20:5805)
2026-05-07 02:38:40.675 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.188.20:5700/3'
2026-05-07 02:38:40.675 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.188.20:5808)
2026-05-07 02:38:40.675 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.188.20:5807)
2026-05-07 02:38:40.675 [INFO] fake_trx.py:429 Init complete
2026-05-07 02:38:40.675 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-07 02:38:42.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:42.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:42.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:42.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:42.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:42.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:53.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:53.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:53.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:53.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:58.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:38:58.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:38:58.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:58.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:38:58.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:58.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:58.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:38:58.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:38:58.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:38:58.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:03.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:03.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:03.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:03.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:03.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:03.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:03.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:03.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:03.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:03.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:08.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:08.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:08.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:08.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:08.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:08.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:08.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:08.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:08.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:08.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:13.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:13.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:13.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:13.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:13.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:13.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:13.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:13.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:13.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:13.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:18.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:18.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:18.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:18.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:18.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:18.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:18.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:18.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:18.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:18.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:23.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:23.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:23.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:23.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:23.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:23.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:23.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:23.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:23.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:23.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:28.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:28.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:28.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:28.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:28.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:28.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:28.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:28.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:28.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:28.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:33.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:33.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:33.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:33.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:33.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:33.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:33.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:33.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:33.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:33.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:38.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:38.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:38.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:38.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:38.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:38.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:38.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:43.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:43.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:43.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:43.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:43.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 0 -> 1
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 0 -> 1
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 0 -> 1
2026-05-07 02:39:43.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:39:43.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 0 -> 1
2026-05-07 02:39:43.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:39:43.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:43.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:43.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:43.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:48.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:48.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:48.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:48.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:48.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:48.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:48.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:48.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:48.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:53.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:53.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:53.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:53.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:53.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:39:53.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:39:53.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:39:53.729 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:39:53.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:53.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:53.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:53.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:58.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:39:58.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:39:58.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:58.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:58.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:39:58.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:58.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:39:58.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:39:58.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:39:58.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:03.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:03.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:03.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:03.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:03.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:03.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:03.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:03.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:03.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:03.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:08.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:08.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:08.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:08.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:08.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:08.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:08.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:08.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:08.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:08.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:13.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:13.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:13.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:13.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:13.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:13.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:13.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:13.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:13.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:13.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:20.161 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.188.20:5700'
2026-05-07 02:40:20.161 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.188.20:5802)
2026-05-07 02:40:20.161 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.188.20:5801)
2026-05-07 02:40:20.161 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.188.22:6700'
2026-05-07 02:40:20.161 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.188.22:6802)
2026-05-07 02:40:20.162 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.188.22:6801)
2026-05-07 02:40:20.162 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.188.20:5700/1'
2026-05-07 02:40:20.162 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.188.20:5804)
2026-05-07 02:40:20.162 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.188.20:5803)
2026-05-07 02:40:20.162 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.188.20:5700/2'
2026-05-07 02:40:20.162 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.188.20:5806)
2026-05-07 02:40:20.162 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.188.20:5805)
2026-05-07 02:40:20.162 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.188.20:5700/3'
2026-05-07 02:40:20.162 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.188.20:5808)
2026-05-07 02:40:20.162 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.188.20:5807)
2026-05-07 02:40:20.162 [INFO] fake_trx.py:429 Init complete
2026-05-07 02:40:20.162 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-07 02:40:21.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:21.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:21.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:21.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:21.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:21.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:24.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:24.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:24.697 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:24.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:24.698 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 0 -> 1
2026-05-07 02:40:24.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:40:24.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:40:24.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:24.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:24.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:24.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:40:24.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:24.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 0 -> 1
2026-05-07 02:40:24.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:24.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:40:24.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:40:24.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:24.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:24.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:24.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:40:24.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:24.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 0 -> 1
2026-05-07 02:40:24.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:24.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:24.708 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 0 -> 1
2026-05-07 02:40:24.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:24.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:40:24.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:40:24.711 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:40:24.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:24.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:24.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:40:25.194 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:40:25.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:25.252 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:40:25.255 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:40:25.256 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:40:25.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:25.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:25.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:25.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:25.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:25.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:25.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:25.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:25.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:25.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:25.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:25.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:25.666 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:40:25.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:25.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:25.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:25.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:25.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:25.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:25.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:25.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:25.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:25.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:25.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:25.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:25.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:25.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:25.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:25.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:25.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:25.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:25.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:25.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:25.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:26.137 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:40:26.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:26.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:26.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:26.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:26.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:26.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:26.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:26.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:26.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:26.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:26.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:26.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:26.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:26.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:40:26.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:26.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:26.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:26.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:27.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:27.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:27.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:27.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:27.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:27.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:27.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:27.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:27.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:27.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:27.082 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:40:27.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:27.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:27.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:27.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:27.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:27.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:27.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:27.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:27.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:27.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:27.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:27.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:27.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:27.554 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:40:27.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:27.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:27.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:27.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:27.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:27.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:27.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:27.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:27.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:28.026 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:40:28.499 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:40:28.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:28.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:28.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:28.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:28.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:28.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:28.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:28.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:28.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:28.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:28.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:28.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:28.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:28.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:28.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:28.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:28.767 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:28.767 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:40:28.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:28.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:28.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:40:29.433 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:40:29.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:29.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:29.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:29.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:29.578 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:29.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:29.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:29.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:29.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:29.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:29.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:29.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:29.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:29.704 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:29.704 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:40:29.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:29.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:40:30.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:30.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:30.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:30.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:30.117 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:30.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:30.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:30.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:30.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:30.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:30.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:30.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:30.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:30.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:30.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:30.374 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:40:30.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:30.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:30.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:30.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:30.845 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:40:31.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:31.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:31.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:31.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:31.137 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1391 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:31.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:31.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:31.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:31.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:31.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:31.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:31.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:31.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:31.316 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:40:31.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:31.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:31.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:31.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:31.789 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:40:32.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:32.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:32.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:32.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:32.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:32.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:32.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:32.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:32.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:32.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:32.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:32.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:32.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:32.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:32.262 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:40:32.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:32.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:32.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:32.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:32.734 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:40:33.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:33.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:33.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:33.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:33.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:33.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:33.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:33.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:33.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:33.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:33.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:33.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:33.207 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:40:33.240 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:33.240 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:40:33.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:33.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:33.680 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:40:34.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:34.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:34.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:34.028 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:34.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:34.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:34.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:34.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:34.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:34.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:34.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:34.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:34.149 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:40:34.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:34.182 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:40:34.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:34.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:34.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:34.564 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:34.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:34.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:34.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:34.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:34.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:34.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:34.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:34.613 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:40:34.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:34.675 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:34.675 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:34.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:34.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:34.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:34.773 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:34.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:34.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:34.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:34.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:34.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:34.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:34.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:34.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:34.911 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:34.912 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:34.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:34.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.084 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:40:35.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:35.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:35.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:35.261 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:35.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:35.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:35.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:35.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:35.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:35.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:35.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:35.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:35.382 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:35.382 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:35.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.557 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:40:35.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:35.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:35.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:35.750 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:35.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:35.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:35.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:35.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:35.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:35.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:35.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:35.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:35.853 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:35.853 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:35.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:35.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.030 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:40:36.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:36.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:36.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:36.244 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:36.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:36.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:36.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:36.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:36.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:36.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:36.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:36.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:36.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:36.329 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:36.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:36.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:36.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:36.425 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:36.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:36.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:36.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:36.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:36.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:36.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:36.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:36.501 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:40:36.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:36.566 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:36.566 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:36.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:36.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:36.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:36.914 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:36.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:36.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:36.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:36.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:36.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:36.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:36.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:36.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:36.972 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:40:36.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:37.035 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:37.035 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:37.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:37.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:37.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:37.403 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:37.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:37.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:37.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:37.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:40:37.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:40:37.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:40:37.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:40:37.443 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:40:37.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:37.506 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:40:37.506 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:40:37.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:40:37.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:37.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:37.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:37.893 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:37.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:37.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:37.902 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:40:42.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:42.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:42.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:42.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:42.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:42.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:42.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:42.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:42.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:42.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:42.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:40:42.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:40:42.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:40:42.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:42.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:42.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:42.923 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:40:42.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:42.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:40:42.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:42.925 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:40:42.925 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:40:42.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:42.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:42.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:42.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:40:42.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:42.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:40:42.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:42.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:40:42.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:40:42.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:42.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:42.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:42.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:40:42.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:42.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:40:42.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:42.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:40:42.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:40:42.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:40:42.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:40:42.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:40:42.931 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:40:42.931 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:40:42.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:42.936 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:40:43.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:40:43.457 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:40:43.459 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:40:43.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.461 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:40:43.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:43.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:43.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:43.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:40:43.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:43.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:43.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:43.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:43.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:43.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.347 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:40:44.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.812 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:40:44.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:44.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:44.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:44.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:44.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:44.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:40:45.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:45.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:45.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:45.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:45.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:45.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:45.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:45.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:45.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:45.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:45.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:45.466 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:40:45.466 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=552 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=552 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=552 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:45.467 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:50.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:50.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:50.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:50.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:50.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:50.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:50.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:50.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:50.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:50.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:50.486 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:40:50.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:40:50.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:40:50.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:50.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:50.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:50.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:40:50.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:50.488 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:40:50.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:50.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:40:50.489 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:40:50.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:50.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:50.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:50.490 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:40:50.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:50.490 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:40:50.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:50.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:50.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:40:50.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:40:50.493 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:40:50.493 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:40:50.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:50.498 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:40:50.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:40:51.017 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:40:51.018 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:40:51.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:51.021 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:40:51.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:51.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:51.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:51.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:51.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:51.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:51.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:51.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:51.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:51.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:51.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:51.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:51.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:51.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:51.070 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:40:51.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:51.072 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:56.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:56.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:56.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:56.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:56.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:56.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:56.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:56.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:56.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:40:56.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:40:56.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:40:56.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:40:56.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:56.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:56.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:56.089 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:40:56.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:40:56.089 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:40:56.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:56.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:40:56.090 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:40:56.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:56.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:56.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:56.091 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:40:56.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:40:56.091 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:40:56.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:56.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:40:56.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:40:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:56.095 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:40:56.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:40:56.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:40:56.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:40:56.095 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:40:56.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:40:56.096 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:40:56.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:40:56.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:40:56.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:40:56.620 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:40:56.623 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:40:56.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:40:56.625 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:40:56.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:40:56.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:40:56.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:40:56.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:40:56.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:40:56.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:40:56.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:40:56.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:40:56.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:40:56.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:40:56.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:40:56.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:40:56.661 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:40:56.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:40:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:41:01.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:41:01.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:41:01.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:41:01.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:41:01.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:41:01.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:41:01.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:41:01.671 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:41:01.671 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:01.671 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:41:01.671 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:41:01.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:41:01.672 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:41:01.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:01.673 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:41:01.673 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:41:01.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:41:01.673 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:01.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:41:01.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:41:01.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:41:01.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:41:01.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:01.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:41:01.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:41:01.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:41:01.675 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:01.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:41:01.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:41:01.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:41:01.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:41:01.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:41:01.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:41:01.678 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:41:01.679 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:01.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:01.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:41:02.162 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:41:02.207 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:41:02.210 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:41:02.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:02.212 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:41:02.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:02.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:02.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:41:02.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:41:02.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:41:02.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:41:02.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:41:02.340 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:41:07.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:41:07.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:41:07.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:41:07.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:41:07.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:41:07.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:41:07.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:41:07.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:41:07.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:07.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:41:07.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:41:07.364 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:41:07.364 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:41:07.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:41:07.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:07.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:41:07.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:41:07.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:41:07.366 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:41:07.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:07.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:41:07.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:41:07.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:41:07.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:07.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:41:07.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:41:07.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:41:07.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:41:07.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:07.372 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:41:07.372 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:41:07.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:41:07.372 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:41:07.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:41:07.373 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:41:07.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:41:07.373 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:41:07.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:07.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:41:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:41:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:41:07.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:41:07.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:41:07.377 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:41:07.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:07.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:41:07.859 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:41:07.904 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:41:07.905 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:41:07.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:07.907 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:41:07.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:07.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:07.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:07.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:07.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:07.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:07.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:07.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:07.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:07.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:07.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:07.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:07.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:08.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:08.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:41:08.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:08.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:08.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:08.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:08.803 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:41:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:41:09.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:09.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:09.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:09.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:41:10.220 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:41:10.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:10.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:10.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:10.694 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:41:11.166 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:41:11.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:11.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:11.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:11.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:11.638 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:41:12.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:12.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:12.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:12.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:12.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:12.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:12.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:12.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:12.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:12.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:12.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:12.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:12.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:12.109 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:41:12.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:12.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:12.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:12.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:12.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:41:12.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:41:12.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:41:12.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:41:12.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:41:13.055 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:41:13.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:41:14.000 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:41:14.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:41:14.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:41:15.418 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:41:15.891 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:41:16.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:16.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:16.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:16.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:16.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:16.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:16.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:16.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:16.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:16.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:16.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:16.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:16.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:16.362 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:41:16.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:16.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:16.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:16.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:16.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:16.833 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:41:17.304 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:41:17.777 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:41:18.250 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:41:18.722 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:41:19.193 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:41:19.666 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:41:20.139 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:41:20.611 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:41:20.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:20.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:20.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:20.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:20.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:20.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:20.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:20.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:20.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:20.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:20.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:20.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:20.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:20.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:20.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:20.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:20.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:21.082 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:41:21.553 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:41:22.026 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:41:22.498 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:41:22.971 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:41:23.443 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:41:23.912 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:41:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:41:24.856 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:41:25.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:25.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:25.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:25.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:25.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:25.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:25.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:25.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:25.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:25.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:25.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:25.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:25.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:25.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:25.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:25.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:25.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:41:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:25.801 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:41:26.275 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:41:26.747 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:41:27.220 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:41:27.693 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:41:28.165 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:41:28.638 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:41:29.109 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:41:29.582 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:41:29.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:29.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:29.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:29.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:29.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:29.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:29.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:29.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:29.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:29.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:29.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:29.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:29.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:41:29.722 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:41:29.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:29.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:30.055 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:41:30.527 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:41:30.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:31.000 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:41:31.473 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:41:31.946 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:41:32.417 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:41:32.891 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:41:33.363 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:41:33.836 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:41:34.309 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:41:34.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:34.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:34.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:34.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:34.554 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:41:34.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:34.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:34.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:34.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:34.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:34.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:34.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:34.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:34.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:34.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:41:34.595 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:41:34.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:34.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:34.777 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:41:35.242 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:41:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:35.713 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:41:36.185 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:41:36.659 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:41:37.131 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:41:37.603 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:41:38.077 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:41:38.546 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:41:39.011 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:41:39.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:39.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:39.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:39.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:39.422 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:41:39.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:39.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:39.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:39.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:39.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:39.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:39.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:39.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:39.476 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:41:39.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:39.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:39.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:39.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:39.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:39.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:39.947 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:41:40.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:40.418 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:41:40.889 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:41:41.359 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:41:41.830 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:41:42.303 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:41:42.776 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:41:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:41:43.721 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:41:44.194 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:41:44.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:44.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:44.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:44.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:44.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:44.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:44.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:44.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:44.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:44.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:44.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:44.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:44.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:44.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:44.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:44.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:41:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:41:45.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:41:46.082 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:41:46.555 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:41:47.028 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:41:47.500 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:41:47.972 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:41:48.443 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:41:48.914 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:41:49.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:49.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:49.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:49.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:49.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:49.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:49.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:49.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:49.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:49.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:49.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:49.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:49.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:41:49.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:49.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:49.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:49.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:49.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:49.385 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:41:49.856 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:41:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:50.329 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:41:50.802 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:41:51.274 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:41:51.747 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:41:52.220 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:41:52.692 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:41:53.165 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:41:53.638 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:41:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:53.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:53.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:53.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:53.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:53.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:53.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:53.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:53.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:53.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:53.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:53.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:53.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:53.976 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:41:53.977 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:41:53.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:53.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:54.110 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:41:54.583 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:41:54.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:55.056 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:41:55.528 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:41:56.001 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:41:56.474 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:41:56.938 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:41:57.402 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:41:57.867 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:41:58.335 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:41:58.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:58.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:58.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:58.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:58.718 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:41:58.719 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=11101 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:41:58.719 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=11101 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:41:58.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:41:58.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:41:58.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:41:58.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:58.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:41:58.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:41:58.740 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:41:58.740 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:41:58.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:58.754 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:41:58.754 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:41:58.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:58.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:41:58.808 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:41:59.281 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:41:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:41:59.752 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:42:00.225 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:42:00.698 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:42:01.170 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:42:01.643 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:42:02.116 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:42:02.588 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:42:03.060 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:42:03.534 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:42:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:03.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:03.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:03.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:03.571 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:03.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:03.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:03.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:03.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:03.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:03.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:03.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:03.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:03.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:03.635 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:03.635 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:03.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:03.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:03.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:03.999 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:42:04.467 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:42:04.938 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:42:05.411 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:42:05.884 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:42:06.355 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:42:06.827 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 02:42:07.300 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 02:42:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:07.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:07.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:07.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:07.694 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:07.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:07.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:07.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:07.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:07.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:07.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:07.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:07.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:07.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:07.772 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 02:42:07.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:07.777 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:07.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:07.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:07.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:08.243 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 02:42:08.709 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 02:42:09.176 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 02:42:09.649 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 02:42:10.122 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 02:42:10.594 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 02:42:11.067 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 02:42:11.540 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 02:42:11.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:11.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:11.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:11.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:11.950 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:11.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:11.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:11.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:11.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:11.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:11.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:11.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:11.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:12.011 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 02:42:12.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:12.020 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:12.020 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:12.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:12.477 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 02:42:12.944 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 02:42:13.410 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 02:42:13.874 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 02:42:14.338 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 02:42:14.802 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 02:42:15.270 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 02:42:15.742 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 02:42:16.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:16.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:16.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:16.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:16.208 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:16.214 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 02:42:16.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:16.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:16.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:16.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:16.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:16.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:16.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:16.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:16.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:16.264 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:16.264 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:16.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:16.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:16.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:16.687 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 02:42:17.159 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 02:42:17.632 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 02:42:18.104 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 02:42:18.577 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 02:42:19.049 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 02:42:19.522 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 02:42:19.993 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 02:42:20.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:20.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:20.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:20.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:20.426 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:20.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:20.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:20.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:20.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:20.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:20.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:20.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:20.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:20.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:20.465 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 02:42:20.467 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:20.467 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:20.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:20.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:20.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:20.938 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 02:42:21.411 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 02:42:21.882 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 02:42:22.354 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 02:42:22.827 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 02:42:23.299 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 02:42:23.772 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 02:42:24.245 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 02:42:24.717 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 02:42:24.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:24.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:24.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:24.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:24.860 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:24.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:24.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:24.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:24.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:24.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:24.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:24.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:24.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:24.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:24.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:24.904 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:24.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:24.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:25.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:25.189 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 02:42:25.661 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 02:42:26.134 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 02:42:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 02:42:27.078 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 02:42:27.551 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 02:42:28.023 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 02:42:28.495 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 02:42:28.969 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 02:42:29.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:29.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:29.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:29.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:29.131 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:29.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:29.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:29.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:29.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:29.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:29.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:29.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:29.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:29.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:29.206 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:29.206 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:29.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:29.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:29.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:29.436 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 02:42:29.907 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 02:42:30.379 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 02:42:30.849 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 02:42:31.323 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 02:42:31.795 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 02:42:32.266 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 02:42:32.738 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 02:42:33.211 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-07 02:42:33.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:33.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:33.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:33.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:33.398 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:33.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:33.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:33.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:33.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:33.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:33.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:33.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:33.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:33.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:33.452 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:33.452 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:33.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:33.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:33.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:33.683 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-07 02:42:34.156 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-07 02:42:34.629 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-07 02:42:35.102 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-07 02:42:35.573 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-07 02:42:36.045 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-07 02:42:36.519 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-07 02:42:36.990 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-07 02:42:37.462 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-07 02:42:37.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:37.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:37.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:37.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:37.659 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:37.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:37.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:37.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:37.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:37.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:37.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:37.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:37.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:37.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:42:37.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:42:37.676 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:42:42.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:42:42.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:42:42.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:42.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:42.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:42.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:42.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:42.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:42:42.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:42.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:42:42.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:42:42.696 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:42:42.696 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:42:42.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:42:42.697 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:42.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:42.697 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:42:42.697 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:42:42.697 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:42:42.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:42.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:42:42.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:42:42.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:42:42.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:42.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:42.699 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:42:42.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:42:42.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:42:42.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:42:42.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:42:42.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:42:42.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:42:42.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:42:42.702 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:42:42.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:42.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:42.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:42:42.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:42:42.704 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:42:47.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:42:47.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:42:47.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:47.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:47.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:47.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:47.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:47.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:42:47.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:47.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:42:47.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:42:47.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:42:47.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:42:47.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:42:47.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:47.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:47.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:42:47.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:42:47.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:42:47.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:47.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:42:47.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:42:47.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:42:47.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:47.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:42:47.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:47.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:42:47.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:42:47.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:47.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:42:47.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:42:47.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:42:47.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:42:47.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:42:47.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:47.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:42:47.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:42:47.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:42:47.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:42:47.733 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:42:47.733 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:42:48.215 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:42:48.256 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:42:48.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:48.260 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:42:48.263 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:42:48.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:48.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:48.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:48.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:48.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:48.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:48.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:48.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:48.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:48.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:48.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:48.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:48.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:48.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:48.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:48.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:48.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:48.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:48.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:48.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:48.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:48.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:48.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:48.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.682 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:42:48.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:48.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:48.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:48.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:48.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:48.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:48.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:48.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:48.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:48.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:48.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:48.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:48.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:48.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:48.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:48.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:48.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:48.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:48.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:49.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:49.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:49.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:49.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:49.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:49.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:49.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:49.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:49.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:49.153 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:42:49.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:49.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:49.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:49.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:49.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:49.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:42:49.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:49.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:49.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:49.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:49.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:49.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:49.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:49.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:49.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:49.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:49.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:49.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:49.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:49.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:49.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:50.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:42:50.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:50.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:50.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:50.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:50.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:50.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:50.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:50.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:50.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:50.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:50.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:50.204 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:50.204 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:42:50.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:42:50.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:50.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:50.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:50.674 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:50.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:50.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:50.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:50.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:50.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:50.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:50.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:50.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:50.733 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:50.733 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:42:50.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:50.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:50.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:51.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:42:51.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:51.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:51.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:51.218 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:51.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:51.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:51.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:51.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:51.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:51.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:51.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:51.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:51.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:51.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:51.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.513 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:42:51.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:51.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:51.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:51.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:51.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:51.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:51.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:51.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:51.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:51.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:51.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:51.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:51.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:51.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:51.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:51.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:51.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:51.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:51.984 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:42:52.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:52.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:52.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:52.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:52.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:52.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:52.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:52.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:52.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:52.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:52.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:52.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:52.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:42:52.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:52.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:52.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:52.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:52.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:52.455 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:42:52.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:52.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:52.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:52.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:52.926 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:42:53.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:53.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:53.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:53.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:53.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:53.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:53.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:53.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:53.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:53.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:53.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:53.268 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:53.269 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:42:53.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.398 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:42:53.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:53.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:53.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:53.679 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:53.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:53.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:53.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:53.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:53.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:53.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:53.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:53.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:53.744 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:53.744 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:42:53.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:53.870 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:42:54.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:54.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:54.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:54.219 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:54.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:54.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:54.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:54.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:54.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:54.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:54.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:54.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:54.285 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:54.285 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:54.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.335 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:42:54.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:54.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:54.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:54.491 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:54.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:54.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:54.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:54.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:54.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:54.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:54.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:54.560 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:54.560 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:54.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.799 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:42:54.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:54.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:54.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:54.976 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:54.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:54.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:54.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:54.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:54.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:54.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:54.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:54.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:55.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:55.044 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:55.044 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:55.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.263 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:42:55.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:55.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:55.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:55.457 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:55.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:55.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:55.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:55.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:55.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:55.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:55.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:55.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:55.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:55.528 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:55.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:42:55.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:55.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:55.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:55.940 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:55.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:55.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:55.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:55.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:55.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:55.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:55.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:55.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:55.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:56.000 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:56.000 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:56.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:56.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:56.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:56.120 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:56.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:56.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:56.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:56.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:56.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:56.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:56.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:56.191 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:42:56.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:56.216 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:56.217 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:56.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:56.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:56.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:56.601 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:56.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:56.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:56.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:56.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:56.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:56.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:56.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:56.655 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:42:56.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:56.665 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:56.665 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:56.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:56.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:57.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:57.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:57.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:57.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:57.084 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:57.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:57.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:57.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:42:57.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:57.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:42:57.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:42:57.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:42:57.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:42:57.125 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:42:57.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:57.149 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:42:57.149 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:42:57.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:57.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:42:57.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:42:57.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:42:57.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:42:57.574 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:42:57.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:42:57.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:42:57.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:42:57.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:42:57.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:42:57.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:42:57.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:42:57.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:42:57.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:42:57.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:42:57.588 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:42:57.588 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:42:57.588 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:42:57.588 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:42:57.588 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:42:57.588 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:02.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:43:02.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:43:02.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:43:02.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:43:02.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:43:02.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:43:02.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:43:02.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:43:02.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:02.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:43:02.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:43:02.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:43:02.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:43:02.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:43:02.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:02.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:43:02.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:43:02.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:43:02.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:43:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:02.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:43:02.609 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:43:02.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:43:02.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:02.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:43:02.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:43:02.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:43:02.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:43:02.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:43:02.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:43:02.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:43:02.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:43:02.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:43:02.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:43:02.616 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:43:02.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:43:02.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:02.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:43:03.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:43:03.146 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:43:03.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:03.150 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:43:03.153 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:43:03.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:03.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:03.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:03.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:03.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:03.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:03.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:03.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:03.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:03.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:03.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:03.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:03.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:43:03.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:03.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:03.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:03.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:03.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:04.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:43:04.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:04.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:04.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:04.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:04.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:04.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:04.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:04.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:04.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:04.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:04.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:04.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:04.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:04.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:04.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:04.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:04.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:04.510 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:43:04.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:04.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:04.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:04.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:04.983 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:43:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:05.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:05.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:43:05.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:05.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:05.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:05.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:05.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:05.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:05.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:05.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:05.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:05.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:05.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:05.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:05.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:05.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:05.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:05.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:05.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:05.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:05.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:05.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:05.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:05.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:43:06.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:06.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:06.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:43:06.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:06.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:06.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:06.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:06.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:06.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:06.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:06.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:06.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:06.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:06.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:06.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:06.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:06.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:06.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:06.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:06.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:43:06.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:06.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:06.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:06.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:06.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:07.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:43:07.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:07.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:07.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:07.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:07.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:07.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:07.814 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:43:08.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:08.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:08.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:08.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:08.285 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:43:08.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:08.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:08.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:08.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:08.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:08.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:08.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:08.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:08.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:08.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:08.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:08.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:08.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:43:09.229 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:43:09.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:09.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:09.702 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:43:09.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:09.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:09.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:09.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:09.833 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1560 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:09.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:09.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:09.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:09.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:09.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:09.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:09.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:09.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:09.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:09.900 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:09.900 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:43:09.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:09.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:10.173 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:43:10.645 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:43:10.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:11.118 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:43:11.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:11.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:11.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:11.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:11.332 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:11.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:11.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:11.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:11.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:11.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:11.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:11.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:11.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:11.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:11.404 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:11.405 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:43:11.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:11.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:11.590 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:43:12.062 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:43:12.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:12.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:12.535 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:43:12.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:12.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:12.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:12.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:12.839 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:12.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:12.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:12.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:12.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:12.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:12.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:12.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:12.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:12.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:12.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:12.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:12.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:12.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:12.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:13.007 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:43:13.479 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:43:13.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:13.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:43:14.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:14.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:14.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:14.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:14.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:14.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:14.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:14.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:14.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:14.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:14.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:14.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:14.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:14.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:14.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:14.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:14.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:14.421 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:43:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:43:15.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:15.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:15.366 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:43:15.839 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:43:15.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:15.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:15.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:15.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:15.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:15.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:15.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:15.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:15.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:15.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:15.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:15.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:15.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:15.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:15.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:15.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:15.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:15.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:16.311 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:43:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:43:17.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:17.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:17.255 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:43:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:17.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:17.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:17.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:17.727 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:43:17.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:17.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:17.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:17.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:17.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:17.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:17.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:17.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:17.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:17.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:17.783 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:43:17.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:17.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:18.199 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:43:18.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:18.673 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:43:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:19.146 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:43:19.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:19.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:19.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:19.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:19.163 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:19.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:19.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:19.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:19.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:19.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:19.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:19.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:19.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:19.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:19.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:19.232 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:43:19.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:19.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:19.611 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:43:20.076 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:43:20.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:20.542 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:43:20.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:20.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:20.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:20.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:20.643 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:20.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:20.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:20.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:20.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:20.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:20.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:20.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:20.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:20.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:20.716 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:20.716 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:20.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:20.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:21.006 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:43:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:43:21.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:21.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:21.934 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:43:22.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:22.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:22.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:22.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:22.093 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:22.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:22.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:22.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:22.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:22.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:22.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:22.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:22.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:22.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:22.169 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:22.169 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:22.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:22.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:22.406 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:43:22.879 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:43:23.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:23.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:23.351 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:43:23.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:23.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:23.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:23.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:23.527 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:23.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:23.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:23.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:23.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:23.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:23.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:23.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:23.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:23.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:23.594 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:23.594 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:23.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:23.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:23.818 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:43:24.282 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:43:24.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:24.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:24.746 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:43:24.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:24.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:24.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:24.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:24.941 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:24.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:24.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:24.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:24.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:24.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:24.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:24.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:24.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:24.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:25.006 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:25.006 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:25.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:25.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:43:25.675 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:43:25.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:25.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:26.139 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:43:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:26.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:26.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:26.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:26.352 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:26.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:26.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:26.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:26.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:26.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:26.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:26.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:26.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:26.423 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:26.423 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:26.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:26.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:43:26.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:27.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:27.071 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:43:27.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:27.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:27.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:27.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:27.460 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:27.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:27.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:27.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:27.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:27.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:27.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:27.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:27.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:27.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:27.522 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:27.522 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:27.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:27.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:27.538 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:43:28.009 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:43:28.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:28.483 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:43:28.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:28.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:28.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:28.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:28.892 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:28.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:28.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:28.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:28.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:28.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:28.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:28.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:28.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:28.954 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:43:28.960 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:28.960 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:28.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:28.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:29.421 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:43:29.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:29.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:29.893 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:43:30.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:30.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:30.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:30.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:30.323 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:30.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:30.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:30.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:30.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:30.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:30.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:30.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:30.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:30.366 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:43:30.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:30.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:30.396 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:43:30.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:30.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:30.838 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:43:31.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:31.310 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:43:31.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:31.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:31.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:31.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:31.760 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:43:31.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:43:31.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:43:31.767 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:31.768 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:43:36.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:43:36.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:43:36.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:43:36.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:43:36.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:43:36.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:43:36.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:43:36.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:43:36.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:36.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:43:36.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:43:36.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:43:36.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:43:36.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:43:36.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:36.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:43:36.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:43:36.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:43:36.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:43:36.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:43:36.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:43:36.784 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:43:36.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:43:36.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:43:36.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:43:36.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:43:36.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:43:36.790 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:43:36.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:43:36.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:43:36.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:43:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:43:36.794 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:43:37.272 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:43:37.321 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:43:37.324 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:43:37.325 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:43:37.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:37.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:37.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:37.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:37.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:37.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:37.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:37.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:37.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:37.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:37.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:37.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:37.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:37.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:37.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:43:37.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:37.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:37.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:37.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:38.210 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:43:38.681 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:43:38.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:38.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:38.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:38.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:39.154 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:43:39.627 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:43:39.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:39.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:39.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:39.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:40.099 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:43:40.572 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:43:40.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:40.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:40.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:40.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:41.045 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:43:41.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:41.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:41.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:41.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:41.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:41.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:41.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:41.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:41.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:41.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:41.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:41.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:41.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:41.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:41.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:41.517 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:43:41.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:43:41.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:43:41.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:43:41.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:43:41.987 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:43:42.461 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:43:42.933 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:43:43.405 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:43:43.879 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:43:44.351 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:43:44.823 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:43:45.294 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:43:45.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:45.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:45.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:45.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:45.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:45.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:45.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:45.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:45.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:45.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:45.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:45.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:45.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:45.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:45.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:45.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:45.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:45.767 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:43:46.240 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:43:46.712 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:43:47.183 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:43:47.656 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:43:48.129 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:43:48.600 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:43:49.071 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:43:49.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:49.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:49.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:49.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:49.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:49.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:49.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:49.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:49.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:49.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:49.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:49.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:49.544 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:43:49.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:49.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:49.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:49.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:49.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:50.013 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:43:50.484 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:43:50.954 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:43:51.428 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:43:51.900 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:43:52.372 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:43:52.846 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:43:53.318 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:43:53.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:53.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:53.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:53.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:53.790 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:43:53.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:53.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:53.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:53.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:53.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:53.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:53.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:53.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:53.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:53.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:53.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:53.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:53.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:54.261 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:43:54.732 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:43:55.206 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:43:55.678 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:43:56.151 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:43:56.624 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:43:57.097 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:43:57.569 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:43:58.042 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:43:58.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:58.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:58.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:58.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:58.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:43:58.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:43:58.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:43:58.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:58.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:43:58.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:43:58.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:43:58.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:43:58.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:43:58.514 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:43:58.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:43:58.519 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:43:58.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:58.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:43:58.981 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:43:59.453 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:43:59.926 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:44:00.399 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:44:00.871 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:44:01.344 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:44:01.817 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:44:02.290 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:44:02.763 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:44:02.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:02.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:02.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:02.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:02.839 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:02.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:02.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:02.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:02.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:02.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:02.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:02.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:02.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:02.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:02.909 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:02.909 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:44:02.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:02.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:03.231 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:44:03.704 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:44:04.177 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:44:04.649 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:44:05.122 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:44:05.595 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:44:06.067 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:44:06.540 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:44:07.013 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:07.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:07.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:07.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:07.236 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:07.236 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=6578 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:44:07.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:07.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:07.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:07.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:07.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:07.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:07.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:07.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:44:07.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:07.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:07.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:07.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:07.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:07.485 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:44:07.956 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:44:08.426 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:44:08.897 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:44:09.368 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:44:09.839 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:44:10.309 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:44:10.780 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:44:11.251 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:44:11.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:11.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:11.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:11.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:11.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:11.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:11.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:11.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:11.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:11.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:11.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:11.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:11.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:11.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:11.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:11.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:11.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:11.724 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:44:12.197 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:44:12.669 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:44:13.140 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:44:13.611 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:44:14.082 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:44:14.553 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:44:15.026 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:44:15.498 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:44:15.965 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:44:16.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:16.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:16.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:16.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:16.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:16.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:16.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:16.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:16.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:16.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:16.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:16.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:16.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:44:16.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:16.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:16.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:16.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:16.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:16.437 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:44:16.910 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:44:17.383 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:44:17.854 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:44:18.326 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:44:18.799 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:44:19.271 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:44:19.743 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:44:20.214 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:44:20.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:20.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:20.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:20.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:20.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:20.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:20.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:20.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:20.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:20.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:20.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:20.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:20.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:20.340 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:20.340 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:44:20.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:20.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:20.680 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:44:21.146 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:44:21.618 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:44:22.091 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:44:22.563 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:44:23.036 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:44:23.509 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:44:23.981 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:44:24.454 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:44:24.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:24.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:24.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:24.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:24.596 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:24.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:24.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:24.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:24.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:24.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:24.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:24.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:24.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:24.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:24.668 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:24.668 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:44:24.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:24.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:24.922 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:44:25.386 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:44:25.850 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:44:26.322 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:44:26.790 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:44:27.258 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:44:27.730 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:44:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:44:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:44:28.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:28.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:28.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:28.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:28.964 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:28.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:28.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:28.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:28.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:28.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:28.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:28.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:28.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:29.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:29.037 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:29.037 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:29.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:29.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:29.149 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:44:29.622 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:44:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:44:30.567 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:44:31.039 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:44:31.512 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:44:31.985 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:44:32.457 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:44:32.926 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:44:33.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:33.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:33.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:33.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:33.082 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:33.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:33.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:33.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:33.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:33.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:33.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:33.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:33.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:33.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:33.166 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:33.166 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:33.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:33.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:44:33.861 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:44:34.333 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:44:34.806 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:44:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:44:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:44:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 02:44:36.697 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 02:44:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 02:44:37.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:37.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:37.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:37.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:37.345 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:37.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:37.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:37.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:37.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:37.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:37.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:37.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:37.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:37.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:37.441 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:37.441 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:37.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:37.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:37.642 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 02:44:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 02:44:38.586 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 02:44:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 02:44:39.531 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 02:44:40.003 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 02:44:40.476 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 02:44:40.950 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 02:44:41.422 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 02:44:41.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:41.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:41.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:41.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:41.619 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:41.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:41.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:41.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:41.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:41.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:41.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:41.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:41.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:41.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:41.692 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:41.692 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:41.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:41.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:41.894 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 02:44:42.363 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 02:44:42.836 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 02:44:43.309 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 02:44:43.781 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 02:44:44.254 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 02:44:44.727 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 02:44:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 02:44:45.671 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 02:44:45.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:45.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:45.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:45.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:45.884 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:45.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:45.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:45.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:45.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:45.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:45.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:45.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:45.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:45.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:45.958 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:45.958 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:45.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:45.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:46.139 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 02:44:46.611 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 02:44:47.082 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 02:44:47.554 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 02:44:48.027 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 02:44:48.500 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 02:44:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 02:44:49.443 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 02:44:49.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:49.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:49.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:49.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:49.836 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:49.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:49.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:49.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:49.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:49.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:49.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:49.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:49.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:49.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:49.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:49.915 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:49.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:49.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:49.915 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 02:44:50.384 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 02:44:50.857 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 02:44:51.330 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 02:44:51.803 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 02:44:52.276 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 02:44:52.748 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 02:44:53.222 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 02:44:53.694 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 02:44:54.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:54.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:54.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:54.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:54.107 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:54.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:54.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:54.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:54.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:54.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:54.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:54.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:54.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:54.165 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 02:44:54.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:54.176 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:54.176 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:54.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:54.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:54.637 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 02:44:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 02:44:55.583 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 02:44:56.055 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 02:44:56.526 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 02:44:56.999 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 02:44:57.472 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 02:44:57.943 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 02:44:58.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:58.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:58.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:58.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:58.374 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:44:58.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:44:58.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:44:58.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:44:58.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:58.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:44:58.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:44:58.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:44:58.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:44:58.415 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 02:44:58.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:44:58.445 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:44:58.445 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:44:58.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:58.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:44:58.886 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 02:44:59.360 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 02:44:59.832 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 02:45:00.303 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 02:45:00.777 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 02:45:01.249 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 02:45:01.721 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 02:45:02.195 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 02:45:02.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:02.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:02.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:02.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:02.646 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:45:02.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:02.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:45:02.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:45:02.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:45:02.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:45:02.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:45:02.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:45:02.663 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:02.663 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:07.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:45:07.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:45:07.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:45:07.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:45:07.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:45:07.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:45:07.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:45:07.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:45:07.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:07.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:45:07.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:45:07.677 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:45:07.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:45:07.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:45:07.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:07.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:45:07.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:45:07.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:45:07.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:45:07.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:07.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:45:07.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:45:07.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:45:07.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:07.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:45:07.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:45:07.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:45:07.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:45:07.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:07.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:45:07.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:45:07.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:45:07.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:07.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:45:07.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:45:07.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:45:07.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:45:07.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:45:07.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:45:07.689 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:45:07.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:45:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:45:07.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:45:07.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:45:07.691 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:45:12.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:45:12.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:45:12.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:45:12.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:45:12.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:45:12.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:45:12.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:45:12.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:45:12.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:12.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:45:12.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:45:12.713 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:45:12.714 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:45:12.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:45:12.714 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:12.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:45:12.715 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:45:12.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:45:12.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:45:12.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:12.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:45:12.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:45:12.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:45:12.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:12.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:45:12.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:45:12.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:45:12.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:45:12.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:12.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:45:12.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:45:12.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:45:12.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:45:12.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:45:12.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:45:12.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:45:12.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:45:12.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:12.723 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:45:12.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:45:12.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:45:12.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:45:12.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:45:12.724 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:45:12.724 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:45:12.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:45:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:45:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:12.729 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:45:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:45:13.246 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:45:13.247 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:45:13.248 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:45:13.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:13.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:13.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:13.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:13.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:13.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:13.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:13.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:13.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:13.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:13.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:13.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:13.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:13.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:13.673 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:45:13.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:13.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:13.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:13.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:14.144 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:45:14.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:45:14.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:14.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:14.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:14.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:15.090 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:45:15.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:45:15.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:15.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:15.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:15.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:45:16.506 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:45:16.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:16.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:16.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:16.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:16.979 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:45:17.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:17.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:17.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:17.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:17.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:17.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:17.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:17.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:17.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:17.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:17.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:17.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:17.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:17.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:17.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:17.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:17.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:17.451 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:45:17.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:45:17.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:45:17.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:45:17.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:45:17.922 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:45:18.395 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:45:18.867 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:45:19.339 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:45:19.812 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:45:20.285 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:45:20.757 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:45:21.230 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:45:21.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:21.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:21.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:21.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:21.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:21.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:21.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:21.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:21.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:21.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:21.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:21.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:21.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:21.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:21.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:21.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:21.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:21.703 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:45:22.175 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:45:22.646 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:45:23.119 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:45:23.591 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:45:24.063 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:45:24.534 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:45:25.007 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:45:25.479 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:45:25.951 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:45:26.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:26.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:26.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:26.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:26.086 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2887 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:26.086 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2887 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:26.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:26.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:26.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:26.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:26.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:26.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:26.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:26.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:26.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:26.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:26.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:26.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:26.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:26.422 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:45:26.895 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:45:27.368 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:45:27.840 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:45:28.311 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:45:28.784 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:45:29.257 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:45:29.729 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:45:30.202 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:45:30.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:30.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:30.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:30.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:30.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:30.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:30.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:30.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:30.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:30.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:30.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:30.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:30.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:30.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:30.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:30.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:30.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:30.675 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:45:31.148 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:45:31.621 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:45:32.094 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:45:32.566 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:45:33.039 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:45:33.512 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:45:33.984 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:45:34.457 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:45:34.930 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:45:34.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:34.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:34.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:34.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:34.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:34.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:34.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:34.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:34.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:34.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:34.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:34.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:35.045 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:45:35.045 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:45:35.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:35.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:35.402 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:45:35.876 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:45:36.348 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:45:36.821 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:45:37.295 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:45:37.767 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:45:38.241 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:45:38.713 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:45:39.186 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:45:39.659 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:45:39.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:39.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:39.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:39.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:39.864 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:45:39.864 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=5861 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:45:39.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:39.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:39.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:39.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:39.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:39.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:39.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:39.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:39.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:39.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:45:39.938 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:45:39.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:39.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:40.131 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:45:40.603 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:45:41.077 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:45:41.549 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:45:42.021 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:45:42.492 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:45:42.966 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:45:43.438 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:45:43.910 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:45:44.383 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:45:44.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:44.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:44.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:44.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:44.746 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:45:44.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:44.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:44.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:44.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:44.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:44.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:44.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:44.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:44.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:44.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:44.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:44.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:44.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:44.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:44.856 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:45:45.328 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:45:45.799 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:45:46.269 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:45:46.743 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:45:47.215 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:45:47.687 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:45:48.161 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:45:48.633 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:45:49.106 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:45:49.579 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:45:49.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:49.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:49.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:49.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:49.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:49.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:49.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:49.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:49.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:49.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:49.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:49.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:49.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:49.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:49.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:49.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:49.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:50.052 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:45:50.523 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:45:50.995 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:45:51.468 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:45:51.940 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:45:52.413 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:45:52.886 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:45:53.358 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:45:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:45:54.301 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:45:54.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:54.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:54.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:54.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:54.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:54.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:54.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:54.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:54.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:54.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:54.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:54.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:54.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:45:54.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:54.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:54.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:54.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:54.771 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:45:55.245 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:45:55.718 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:45:56.190 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:45:56.663 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:45:57.136 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:45:57.608 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:45:58.082 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:45:58.554 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:45:59.026 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:45:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:59.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:59.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:59.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:59.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:45:59.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:45:59.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:45:59.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:59.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:45:59.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:45:59.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:45:59.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:45:59.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:45:59.320 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:45:59.320 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:45:59.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:59.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:45:59.494 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:45:59.968 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:46:00.432 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:46:00.897 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:46:01.361 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:46:01.825 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:46:02.290 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:46:02.754 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:46:03.218 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:46:03.685 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:46:04.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:04.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:04.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:04.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:04.051 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:04.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:04.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:04.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:04.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:04.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:04.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:04.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:04.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:04.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:04.121 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:04.121 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:46:04.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:04.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:04.156 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:46:04.621 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:46:05.093 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:46:05.566 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:46:06.039 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:46:06.512 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:46:06.986 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:46:07.459 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:46:07.932 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:46:08.404 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:46:08.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:08.868 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:46:08.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:08.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:08.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:08.870 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:08.870 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=12139 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:08.870 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=12139 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:08.870 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=12139 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:08.871 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=12139 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:08.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:08.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:08.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:08.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:08.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:08.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:08.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:08.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:08.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:08.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:08.944 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:09.338 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:46:09.809 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:46:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:46:10.754 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:46:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:46:11.700 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:46:12.173 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 02:46:12.645 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 02:46:12.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:12.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:12.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:12.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:12.968 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:12.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:12.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:12.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:12.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:12.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:12.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:12.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:12.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:13.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:13.037 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:13.037 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:13.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:13.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:13.118 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 02:46:13.591 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 02:46:14.065 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 02:46:14.538 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 02:46:15.010 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 02:46:15.484 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 02:46:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 02:46:16.428 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 02:46:16.900 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 02:46:17.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:17.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:17.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:17.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:17.240 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:17.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:17.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:17.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:17.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:17.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:17.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:17.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:17.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:17.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:17.312 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:17.312 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:17.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:17.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:17.371 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 02:46:17.835 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 02:46:18.302 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 02:46:18.775 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 02:46:19.248 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 02:46:19.720 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 02:46:20.193 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 02:46:20.666 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 02:46:21.138 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 02:46:21.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:21.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:21.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:21.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:21.499 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:21.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:21.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:21.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:21.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:21.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:21.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:21.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:21.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:21.558 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:21.558 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:21.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:21.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:21.610 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 02:46:22.083 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 02:46:22.555 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 02:46:23.029 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 02:46:23.501 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 02:46:23.972 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 02:46:24.446 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 02:46:24.919 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 02:46:25.391 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 02:46:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:25.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:25.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:25.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:25.769 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:25.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:25.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:25.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:25.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:25.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:25.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:25.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:25.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:25.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:25.836 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:25.836 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:25.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:25.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:25.864 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 02:46:26.337 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 02:46:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 02:46:27.282 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 02:46:27.755 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 02:46:28.228 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 02:46:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 02:46:29.173 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 02:46:29.645 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 02:46:30.119 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 02:46:30.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:30.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:30.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:30.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:30.199 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:30.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:30.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:30.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:30.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:30.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:30.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:30.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:30.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:30.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:30.266 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:30.266 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:30.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:30.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:30.585 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 02:46:31.052 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 02:46:31.523 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 02:46:31.997 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 02:46:32.469 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 02:46:32.942 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 02:46:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 02:46:33.887 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 02:46:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 02:46:34.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:34.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:34.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:34.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:34.466 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:34.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:34.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:34.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:34.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:34.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:34.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:34.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:34.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:34.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:34.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:34.538 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:34.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:34.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:34.833 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 02:46:35.306 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 02:46:35.777 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 02:46:36.249 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 02:46:36.723 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 02:46:37.195 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 02:46:37.668 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 02:46:38.141 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 02:46:38.613 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-07 02:46:38.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:38.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:38.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:38.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:38.738 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:38.738 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=18593 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:38.738 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=18593 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:38.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:38.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:38.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:38.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:38.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:38.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:38.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:38.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:38.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:38.813 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:46:38.813 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:46:38.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:38.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:39.086 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-07 02:46:39.559 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-07 02:46:40.031 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-07 02:46:40.504 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-07 02:46:40.977 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-07 02:46:41.449 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-07 02:46:41.920 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-07 02:46:42.394 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-07 02:46:42.866 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-07 02:46:43.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:43.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:43.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:43.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:43.011 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:46:43.011 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=19515 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:43.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:43.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:43.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:43.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:46:43.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:46:43.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:46:43.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:46:43.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:46:43.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:46:43.027 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:43.027 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=19518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:46:48.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:46:48.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:46:48.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:46:48.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:46:48.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:46:48.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:46:48.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:46:48.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:46:48.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:48.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:46:48.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:46:48.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:46:48.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:46:48.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:46:48.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:48.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:46:48.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:46:48.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:46:48.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:46:48.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:46:48.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:46:48.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:46:48.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:48.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:46:48.052 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:46:48.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:46:48.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:48.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:46:48.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:46:48.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:46:48.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:46:48.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:46:48.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:46:48.055 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:46:48.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:46:48.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:46:48.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:46:48.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:46:48.057 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:46:53.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:46:53.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:46:53.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:46:53.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:46:53.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:46:53.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:46:53.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:46:53.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:46:53.073 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:53.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:46:53.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:46:53.075 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:46:53.075 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:46:53.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:46:53.075 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:53.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:46:53.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:46:53.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:46:53.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:46:53.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:53.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:46:53.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:46:53.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:46:53.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:53.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:46:53.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:46:53.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:46:53.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:46:53.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:46:53.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:46:53.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:46:53.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:53.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:46:53.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:46:53.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:46:53.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:46:53.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:46:53.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:46:53.082 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:46:53.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:46:53.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:46:53.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:46:53.608 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:46:53.611 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:46:53.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:53.613 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:46:53.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:53.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:53.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:53.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:53.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:53.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:53.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:53.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:53.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:53.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:53.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:53.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:53.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:54.030 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:46:54.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:54.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:54.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:54.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:54.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:46:54.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:54.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:54.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:54.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:54.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:54.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:54.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:54.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:54.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:54.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:54.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:54.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:54.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:54.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:54.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:54.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:54.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:54.972 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:46:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:55.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:55.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:55.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:46:55.916 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:46:56.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:56.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:56.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:56.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:56.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:56.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:56.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:56.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:56.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:56.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:56.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:56.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:56.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:56.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:56.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:56.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:56.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:56.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:56.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:56.389 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:46:56.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:46:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:57.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:57.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:57.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:57.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:57.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:57.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:57.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:57.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:57.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:57.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:57.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:57.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:57.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:57.323 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:46:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:57.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:57.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:57.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:57.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:57.787 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:46:58.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:46:58.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:46:58.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:46:58.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:46:58.258 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:46:58.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:58.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:58.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:58.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:58.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:46:58.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:46:58.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:46:58.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:58.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:58.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:58.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:46:58.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:46:58.726 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:46:58.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:46:58.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:46:58.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:46:58.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:58.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:46:59.188 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:46:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:47:00.114 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:47:00.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:00.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:00.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:00.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:00.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:00.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:00.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:00.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:00.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:00.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:00.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:00.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:00.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:00.301 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:00.301 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:47:00.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:00.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:00.579 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:47:01.042 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:47:01.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:01.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:01.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:01.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:01.246 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:01.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:01.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:01.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:01.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:01.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:01.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:01.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:01.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:01.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:01.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:01.303 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:47:01.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:01.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:01.506 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:47:01.970 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:47:02.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:02.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:02.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:02.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:02.253 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:02.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:02.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:02.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:02.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:02.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:02.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:02.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:02.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:02.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:02.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:02.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:02.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:02.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:02.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:02.434 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:47:02.898 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:47:03.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:03.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:03.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:03.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:03.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:03.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:03.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:03.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:03.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:03.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:03.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:03.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:03.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:03.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:03.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:03.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:03.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:03.362 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:47:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:47:04.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:04.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:04.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:04.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:04.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:04.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:04.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:04.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:04.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:04.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:04.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:04.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:04.290 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:47:04.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:04.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:04.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:04.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:04.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:04.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:04.755 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:47:05.220 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:47:05.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:05.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:05.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:05.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:05.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:05.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:05.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:05.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:05.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:05.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:05.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:05.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:05.684 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:47:05.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:05.688 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:05.689 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:47:05.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:05.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:06.148 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:47:06.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:06.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:06.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:06.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:06.573 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:06.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:06.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:06.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:06.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:06.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:06.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:06.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:06.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:06.612 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:47:06.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:06.631 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:06.631 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:47:06.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:06.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:07.076 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:47:07.540 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:47:07.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:07.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:07.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:07.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:07.570 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:07.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:07.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:07.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:07.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:07.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:07.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:07.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:07.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:07.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:07.627 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:07.627 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:07.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:07.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:08.003 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:47:08.467 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:47:08.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:08.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:08.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:08.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:08.618 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:08.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:08.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:08.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:08.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:08.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:08.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:08.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:08.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:08.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:08.675 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:08.675 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:08.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:08.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:08.930 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:47:09.394 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:47:09.858 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:47:10.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:10.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:10.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:10.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:10.030 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:10.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:10.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:10.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:10.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:10.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:10.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:10.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:10.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:10.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:10.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:10.091 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:10.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:10.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:47:10.784 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:47:11.247 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:47:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:11.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:11.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:11.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:11.438 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:11.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:11.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:11.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:11.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:11.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:11.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:11.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:11.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:11.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:11.491 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:11.491 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:11.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:11.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:11.711 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:47:12.175 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:47:12.641 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:47:12.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:12.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:12.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:12.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:12.854 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:12.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:12.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:12.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:12.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:12.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:12.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:12.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:12.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:12.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:12.915 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:12.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:12.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:13.109 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:47:13.573 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:47:13.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:13.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:13.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:13.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:13.963 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:13.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:13.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:13.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:13.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:13.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:13.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:13.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:13.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:14.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:14.023 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:14.024 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:14.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:14.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:14.037 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:47:14.501 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:47:14.965 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:47:15.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:15.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:15.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:15.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:15.369 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:15.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:15.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:15.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:15.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:15.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:15.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:15.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:15.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:15.429 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:47:15.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:15.436 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:15.436 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:15.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:15.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:15.895 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:47:16.361 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:47:16.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:16.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:16.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:16.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:16.790 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:47:16.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:16.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:16.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:16.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:16.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:16.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:16.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:16.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:16.988 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:16.988 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:16.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:16.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:17.289 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:47:18.111 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:47:18.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:18.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:18.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:18.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:18.555 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:18.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:18.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:18.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:18.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:18.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:18.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:18.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:18.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:18.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:47:18.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:47:18.558 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:47:23.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:47:23.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:47:23.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:23.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:23.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:23.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:23.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:23.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:47:23.577 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:23.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:47:23.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:47:23.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:47:23.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:47:23.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:47:23.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:23.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:23.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:47:23.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:47:23.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:47:23.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:23.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:47:23.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:47:23.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:47:23.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:23.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:23.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:47:23.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:47:23.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:47:23.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:47:23.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:47:23.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:47:23.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:23.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:47:23.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:47:23.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:47:23.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:47:23.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:47:23.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:47:23.585 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:47:23.585 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:23.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:47:23.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:47:23.586 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:47:28.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:47:28.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:47:28.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:28.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:28.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:28.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:28.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:28.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:47:28.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:28.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:47:28.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:47:28.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:47:28.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:47:28.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:47:28.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:28.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:28.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:47:28.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:47:28.602 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:47:28.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:28.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:47:28.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:47:28.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:47:28.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:28.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:47:28.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:47:28.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:47:28.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:28.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:47:28.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:47:28.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:47:28.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:47:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:28.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:47:28.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:47:28.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:47:28.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:47:28.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:47:28.608 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:47:28.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:47:29.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:47:29.138 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:47:29.140 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:47:29.141 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:47:29.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:29.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:29.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:29.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:29.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:29.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:29.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:29.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:29.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:29.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:29.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:29.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:29.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:29.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:29.550 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:47:29.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:29.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:29.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:29.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:30.014 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:47:30.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:47:30.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:30.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:30.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:30.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:30.943 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:47:31.410 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:47:31.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:31.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:31.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:31.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:47:32.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:32.338 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:47:32.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:32.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:32.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:32.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:32.802 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:47:32.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:32.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:32.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:32.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:32.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:32.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:32.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:32.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:32.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:32.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:32.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:32.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:32.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:32.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:32.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:33.267 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:47:33.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:33.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:33.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:33.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:33.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:47:34.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:47:34.656 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:47:35.119 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:47:35.585 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:47:35.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:36.053 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:47:36.516 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:47:36.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:36.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:36.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:36.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:36.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:36.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:36.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:36.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:36.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:36.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:36.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:36.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:36.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:36.720 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:36.720 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:47:36.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:36.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:36.981 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:47:37.445 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:47:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:47:38.373 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:47:38.837 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:47:39.301 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:47:39.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:39.767 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:47:40.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:40.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:40.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:40.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:40.223 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:40.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:40.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:40.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:40.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:40.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:40.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:47:40.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:40.240 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:40.240 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:47:40.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:40.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:40.699 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:47:41.165 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:47:41.633 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:47:42.100 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:47:42.569 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:47:43.034 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:47:43.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:43.499 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:47:43.966 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:47:44.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:44.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:44.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:44.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:44.018 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:44.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:44.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:44.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:44.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:44.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:44.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:44.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:44.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:44.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:44.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:44.433 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:47:44.900 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:47:45.367 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:47:46.755 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:47:47.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:47.227 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:47:47.695 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:47:48.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:48.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:48.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:48.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:48.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:48.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:48.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:48.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:48.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:48.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:48.161 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:47:48.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:48.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:48.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:48.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:48.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:48.646 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:47:49.112 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:47:49.588 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:47:50.055 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:47:50.521 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:47:50.992 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:47:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:51.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:51.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:51.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:51.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:51.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:51.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:51.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:51.461 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:47:51.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:51.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:51.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:51.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:51.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:51.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:51.539 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:51.539 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:51.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:51.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:51.952 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:47:52.417 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:47:52.882 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:47:53.379 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:47:53.860 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:47:54.325 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:47:54.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:54.790 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:47:55.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:55.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:55.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:55.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:55.180 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:55.180 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=5595 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:55.180 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=5595 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:55.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:47:55.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:55.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:47:55.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:47:55.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:47:55.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:47:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:47:55.204 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:47:55.204 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:47:55.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:55.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:55.255 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:47:55.720 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:47:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:47:56.662 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:47:57.128 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:47:57.593 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:47:58.058 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:47:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:58.543 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:47:58.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:47:58.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:47:58.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:47:58.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:47:58.938 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:47:58.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:47:58.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:47:58.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:47:58.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:47:58.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:47:58.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:47:58.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:47:58.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:47:58.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:47:58.954 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:47:58.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:47:58.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.954 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:47:58.955 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:03.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:48:03.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:48:03.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:48:03.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:48:03.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:48:03.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:48:03.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:48:03.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:48:03.966 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:03.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:48:03.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:48:03.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:48:03.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:48:03.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:48:03.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:03.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:48:03.971 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:48:03.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:48:03.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:48:03.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:03.972 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:48:03.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:48:03.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:48:03.973 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:03.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:48:03.973 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:48:03.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:48:03.973 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:48:03.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:03.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:48:03.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:48:03.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:48:03.976 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:03.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:48:03.976 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:48:03.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:48:03.976 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:48:03.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:03.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:48:03.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:48:03.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:48:03.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:48:03.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:48:03.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:48:03.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:48:03.979 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:48:03.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:03.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:48:04.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:48:04.507 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:48:04.509 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:48:04.511 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:48:04.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:04.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:04.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:04.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:04.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:04.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:04.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:04.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:04.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:04.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:04.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:04.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:04.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:04.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:04.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:48:04.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:04.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:04.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:04.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:05.384 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:48:05.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:48:05.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:05.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:05.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:06.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:48:06.797 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:48:06.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:06.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:06.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:07.263 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:48:07.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:07.733 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:48:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:07.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:07.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:08.200 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:48:08.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:08.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:08.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:08.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:08.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:08.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:08.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:08.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:08.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:08.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:08.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:08.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:08.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:08.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:08.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:08.666 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:48:08.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:08.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:08.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:08.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:09.132 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:48:09.598 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:48:10.065 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:48:10.535 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:48:11.001 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:48:11.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:11.465 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:48:11.931 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:48:12.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:12.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:12.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:12.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:12.076 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1768 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:12.077 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1768 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:12.077 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=1768 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:12.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:12.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:12.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:12.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:12.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:12.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:12.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:12.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:12.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:12.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:12.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:12.395 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:48:12.859 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:48:13.324 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:48:13.794 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:48:14.259 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:48:14.726 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:48:15.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:15.196 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:48:15.663 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:48:15.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:15.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:15.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:15.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:15.885 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2600 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:15.885 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2600 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:15.885 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2600 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:15.885 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:15.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:15.885 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:15.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:15.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:15.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:15.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:15.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:15.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:15.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:15.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:15.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:15.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:16.131 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:48:16.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:16.595 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:48:16.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:16.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:16.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:16.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:16.836 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2808 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:16.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:16.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:16.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:16.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:16.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:16.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:16.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:16.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:16.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:16.906 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:16.906 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:48:16.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:16.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:17.064 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:48:17.532 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:48:17.998 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:48:18.463 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:48:18.930 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:48:19.396 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:48:19.863 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:48:19.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:20.328 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:48:20.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:20.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:20.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:20.399 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:20.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:20.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:20.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:20.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:20.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:20.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:20.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:20.417 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:20.417 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:48:20.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:20.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:20.792 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:48:21.257 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:48:21.722 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:48:22.189 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:48:22.656 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:48:23.121 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:48:23.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:23.587 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:48:24.055 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:48:24.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:24.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:24.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:24.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:24.202 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:24.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:24.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:24.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:24.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:24.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:24.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:24.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:24.240 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:24.240 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:48:24.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:24.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:24.520 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:48:24.986 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:48:25.452 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:48:25.918 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:48:26.387 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:48:26.852 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:48:27.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:27.317 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:48:27.780 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:48:27.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:28.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:28.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:28.003 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:28.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:28.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:28.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:28.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:28.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:28.024 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:28.024 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:48:28.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.245 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:48:28.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:28.710 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:48:28.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:28.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:28.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:28.953 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:28.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:28.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:28.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:28.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:28.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:28.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:28.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:28.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:28.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:28.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:28.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:28.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:29.175 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:48:29.642 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:48:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:48:30.575 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:48:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:48:31.509 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:48:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:48:32.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:32.440 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:48:32.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:32.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:32.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:32.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:32.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:32.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:32.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:32.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:32.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:32.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:32.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:32.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:32.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:32.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:32.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:32.904 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:48:33.370 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:48:33.836 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:48:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:48:34.764 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:48:35.229 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:48:35.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:35.694 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:48:36.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:36.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:36.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:36.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:36.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:36.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:36.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:36.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:36.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:36.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:36.159 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:48:36.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:36.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:36.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:36.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:36.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:36.624 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:48:37.090 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:48:37.555 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:48:38.019 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:48:38.483 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:48:38.948 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:48:39.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:39.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:39.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:39.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:39.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:39.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:39.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:39.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:39.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:39.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:39.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:39.413 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:48:39.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:39.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:39.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:39.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:39.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:39.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:39.881 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:48:40.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:40.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:40.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:40.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:40.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:40.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:40.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:40.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:40.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:40.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:40.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:40.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:40.350 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:48:40.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:40.386 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:40.386 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:48:40.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:40.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:40.814 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:48:41.282 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:48:41.748 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:48:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:48:42.677 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:48:43.141 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:48:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:43.605 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:48:43.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:43.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:43.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:43.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:43.999 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:43.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:44.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:44.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:44.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:44.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:44.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:44.026 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:44.026 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:48:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:44.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:44.073 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:48:44.537 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:48:45.003 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:48:45.469 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:48:45.933 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:48:46.397 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:48:46.861 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:48:47.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:47.325 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:48:47.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:47.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:47.713 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:47.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:47.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:47.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:47.740 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:47.740 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:48:47.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:47.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:47.792 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:48:48.257 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:48:48.721 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:48:49.185 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:48:49.648 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:48:50.113 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:48:50.577 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:48:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:48:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:51.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:51.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:51.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:51.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:51.433 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:51.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:51.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:51.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:51.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:51.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:51.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:51.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:48:51.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:48:51.462 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:48:51.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:51.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:51.510 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:48:51.974 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:48:52.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:52.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:52.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:52.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:52.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:52.360 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:48:52.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:48:52.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:48:52.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:48:52.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:48:52.364 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:52.364 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10593 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:48:57.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:48:57.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:48:57.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:48:57.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:48:57.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:48:57.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:48:57.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:48:57.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:48:57.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:57.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:48:57.384 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:48:57.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:48:57.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:48:57.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:48:57.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:57.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:48:57.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:48:57.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:48:57.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:48:57.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:48:57.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:48:57.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:48:57.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:57.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:48:57.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:48:57.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:48:57.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:48:57.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:48:57.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:48:57.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:48:57.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:48:57.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:48:57.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:48:57.390 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:48:57.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:48:57.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:48:57.922 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:48:57.924 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:48:57.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:48:57.926 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:48:57.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:48:57.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:48:57.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:48:57.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:48:57.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:48:57.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:48:57.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:48:57.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:48:58.325 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:48:58.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:58.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:58.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:58.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:58.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:48:59.255 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:48:59.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:48:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:48:59.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:48:59.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:48:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:49:00.187 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:49:00.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:00.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:00.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:00.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:00.650 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:49:01.142 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:49:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:01.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:01.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:01.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:01.607 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:49:02.073 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:49:02.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:02.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:02.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:02.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:02.539 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:49:03.004 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:49:03.469 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:49:03.934 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:49:04.434 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:49:04.900 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:49:05.365 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:49:05.829 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:49:06.293 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:49:06.758 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:49:07.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:07.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:07.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:07.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:07.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:07.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:07.107 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:07.107 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:12.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:12.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:12.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:12.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:12.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:12.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:12.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:12.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:49:12.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:12.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:49:12.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:49:12.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:49:12.131 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:49:12.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:49:12.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:12.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:12.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:49:12.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:49:12.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:49:12.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:12.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:49:12.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:49:12.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:49:12.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:12.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:12.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:49:12.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:49:12.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:49:12.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:12.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:49:12.133 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:49:12.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:49:12.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:12.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:12.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:49:12.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:49:12.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:49:12.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.135 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:49:12.135 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:49:12.135 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:49:12.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:12.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:49:12.604 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:49:12.647 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:12.648 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:49:12.648 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:49:12.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:49:12.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:12.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:12.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:49:12.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:49:12.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:49:12.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:49:12.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:49:12.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:49:13.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:49:13.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:13.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:13.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:13.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:13.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:49:13.997 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:49:14.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:14.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:14.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:14.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:14.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:49:14.926 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:49:15.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:15.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:15.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:15.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:15.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:49:15.855 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:49:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:16.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:16.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:16.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:16.320 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:49:16.786 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:49:17.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:17.254 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:49:17.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:17.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:17.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:17.774 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:49:18.240 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:49:18.706 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:49:19.174 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:49:19.640 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:49:20.106 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:49:20.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:49:21.034 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:49:21.499 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:49:21.966 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:49:22.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:22.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:22.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:22.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:22.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:22.112 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:49:27.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:27.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:27.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:27.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:27.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:27.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:27.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:27.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:49:27.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:27.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:49:27.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:49:27.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:49:27.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:49:27.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:49:27.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:27.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:27.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:49:27.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:49:27.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:49:27.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:27.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:49:27.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:49:27.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:49:27.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:27.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:27.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:49:27.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:49:27.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:49:27.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:49:27.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:49:27.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:49:27.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:27.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:49:27.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:49:27.153 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:49:27.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:27.158 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:49:27.624 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:49:27.669 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:27.669 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:49:27.670 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:49:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:49:27.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:27.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:27.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:49:28.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:49:28.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:28.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:28.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:28.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:28.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:49:28.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:49:28.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:49:28.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:49:28.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:49:28.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:49:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:49:29.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:29.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:29.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:29.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:29.479 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:49:29.942 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:49:30.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:30.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:30.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:30.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:30.406 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:49:30.869 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:49:31.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:31.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:31.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:31.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:31.332 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:49:31.795 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:49:32.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:32.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:32.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:32.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:32.258 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:49:32.721 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:49:33.185 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:49:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:49:34.115 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:49:34.579 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:49:35.043 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:49:35.506 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:49:35.970 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:49:36.434 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:49:36.897 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:49:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:49:37.823 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:49:38.287 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:49:38.750 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:49:39.213 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:49:39.676 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:49:40.140 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:49:40.602 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:49:40.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:40.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:40.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:40.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:40.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:40.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:40.942 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:49:45.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:45.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:45.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:45.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:45.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:45.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:45.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:45.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:49:45.952 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:45.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:49:45.952 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:49:45.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:49:45.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:49:45.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:49:45.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:49:45.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:49:45.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:49:45.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:49:45.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:49:45.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:49:45.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:49:45.957 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:49:45.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:49:45.961 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:49:46.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:49:46.475 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:46.475 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:49:46.475 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:49:46.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:46.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:46.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:49:46.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:49:46.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:49:46.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:49:46.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:49:46.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:49:46.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:49:46.889 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:49:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:46.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:46.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:46.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:47.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:49:47.515 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:47.819 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:49:47.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:47.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:47.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:47.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:48.021 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:48.285 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:49:48.528 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:48.751 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:49:48.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:48.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:48.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:48.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:49.215 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:49:49.679 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:49:49.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:49.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:49.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:49.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:50.143 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:49:50.539 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:50.606 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:49:50.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:50.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:50.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:50.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:51.043 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:51.071 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:49:51.534 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:49:51.546 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:51.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:49:52.054 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:52.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:49:52.925 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:49:53.390 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:49:53.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:49:54.061 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:49:54.317 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:49:54.780 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:49:55.245 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:49:55.709 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:49:56.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:49:56.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:49:56.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:49:56.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:49:56.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:49:56.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:49:56.071 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:49:56.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2222 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:56.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2222 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:56.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2222 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:56.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2222 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:49:56.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2222 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:01.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:01.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:01.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:01.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:01.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:01.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:01.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:01.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:01.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:01.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:01.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:01.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:01.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:01.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:01.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:01.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:01.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:01.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:01.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:01.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:01.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:01.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:01.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:01.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:01.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:01.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:01.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:01.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:01.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:01.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:01.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:01.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:01.092 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:01.092 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:01.092 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:01.097 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:50:01.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:50:01.620 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:50:01.622 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:50:01.623 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:50:01.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:01.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:01.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:01.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:01.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:01.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:01.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:01.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:01.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:01.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:01.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:01.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:01.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:01.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:01.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:01.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:01.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:01.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:01.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:01.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:01.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:01.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:01.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:01.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:01.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:01.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:01.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:01.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:01.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:01.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:01.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:01.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:50:02.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:02.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:02.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:02.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:02.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.358 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:02.358 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:50:02.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.360 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:02.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.404 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:02.404 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:50:02.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.420 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:02.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:02.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.497 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:50:02.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:02.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.572 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.572 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.592 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:02.592 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:50:02.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.598 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:02.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.638 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:02.638 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:50:02.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.644 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:02.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.682 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:02.682 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:02.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:02.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.801 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:02.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:02.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:02.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:02.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:02.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:02.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:02.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:02.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:02.827 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:02.827 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:02.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:02.963 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:50:03.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:03.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:03.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:03.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:03.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:03.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:03.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:03.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:03.281 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:03.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:03.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:03.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:03.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:03.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:03.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:03.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:03.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:03.339 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:03.339 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:03.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.430 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:50:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:03.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:03.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:03.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:03.540 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:03.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:03.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:03.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:03.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:03.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:03.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:03.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:03.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:03.570 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:03.570 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:03.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:03.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:03.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:03.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:03.784 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:03.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:03.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:03.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:03.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:03.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:03.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:03.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:03.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:03.850 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:03.850 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:03.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:03.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:50:04.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.034 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:04.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:04.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:04.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:04.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:04.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:04.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:04.083 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:04.083 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:04.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:04.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:04.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:04.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:04.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.288 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:04.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:04.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:04.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:04.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:04.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:04.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:04.319 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:04.319 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:04.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.363 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:50:04.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.546 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:04.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:04.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:04.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:04.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:04.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:04.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:04.600 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:50:04.600 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:50:04.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:04.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:04.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:04.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:04.791 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:04.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:04.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:04.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:04.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:04.797 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:50:04.797 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=810 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:04.797 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=810 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:04.797 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=810 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:04.797 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=810 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:09.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:09.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:09.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:09.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:09.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:09.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:09.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:09.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:09.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:09.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:09.804 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:09.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:09.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:09.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:09.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:09.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:09.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:09.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:09.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:09.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:09.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:09.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:09.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:09.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:09.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:09.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:09.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:09.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:09.815 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:09.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:09.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:50:10.286 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:50:10.344 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:50:10.345 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:50:10.346 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:50:10.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:10.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:10.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:10.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:10.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:10.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:10.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:10.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:10.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 02:50:10.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:10.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:10.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:10.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:10.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:10.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:50:10.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:10.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:10.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:10.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:11.220 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:50:11.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:50:11.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:11.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:11.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:11.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:50:12.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:12.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:12.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:12.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:12.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:12.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:12.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:12.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:12.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:12.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:12.433 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:50:12.433 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=572 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:12.433 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:12.433 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:12.433 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:50:17.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:17.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:17.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:17.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:17.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:17.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:17.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:17.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:17.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:17.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:17.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:17.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:17.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:17.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:17.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:17.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:17.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:17.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:17.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:17.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:17.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:17.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:17.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:17.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:17.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:17.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:17.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:17.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:17.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:17.451 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:17.451 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:17.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:17.451 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:17.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:17.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:17.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:17.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:17.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:17.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:17.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:17.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:17.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:17.455 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:17.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:17.456 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:17.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:17.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:17.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:17.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:17.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:17.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:17.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:17.460 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:50:22.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:22.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:22.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:22.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:22.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:22.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:22.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:22.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:22.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:22.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:22.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:22.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:22.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:22.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:22.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:22.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:22.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:22.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:22.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:22.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:22.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:22.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:22.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:22.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:22.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:22.482 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:22.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:22.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:22.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:22.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:22.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:22.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:22.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:22.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:22.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:22.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:22.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:22.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:22.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:22.491 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:22.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:22.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:22.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:22.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:50:22.965 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:50:23.025 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:50:23.026 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:50:23.027 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:50:23.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:50:23.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:23.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:23.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:23.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:23.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:50:24.371 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:50:24.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:24.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:24.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:24.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:24.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:50:25.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:25.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:25.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:25.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:25.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:50:26.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:50:26.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:26.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:26.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:26.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:26.842 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:50:27.308 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:50:27.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:27.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:27.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:27.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:27.775 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:50:28.242 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:28.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:28.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:28.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:28.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:28.506 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:50:33.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:33.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:33.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:33.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:33.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:33.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:33.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:33.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:33.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:33.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:33.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:33.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:33.520 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:33.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:33.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:33.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:33.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:33.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:33.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:33.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:33.522 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:33.522 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:33.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:33.524 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:33.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:33.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:33.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:33.527 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:33.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:33.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:33.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:50:34.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:50:34.062 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:50:34.064 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:50:34.065 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:50:34.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:34.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:50:34.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:34.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:34.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:34.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:34.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:50:35.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:50:35.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:35.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:35.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:35.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:35.873 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:50:36.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:50:36.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:36.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:36.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:36.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:36.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:50:37.275 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:50:37.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:37.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:37.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:37.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:37.742 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:50:38.208 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:50:38.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:38.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:38.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:38.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:38.675 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:50:39.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:39.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:39.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:39.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:39.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:39.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:39.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:39.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:39.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:39.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:39.071 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:50:44.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:44.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:44.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:44.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:44.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:44.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:44.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:44.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:44.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:44.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:44.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:44.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:44.082 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:44.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:44.084 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:44.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:44.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:44.086 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:44.086 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:44.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:44.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:44.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:44.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:44.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:44.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:44.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:44.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:44.090 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:44.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:44.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:44.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:44.092 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:50:49.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:50:49.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:50:49.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:49.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:49.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:49.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:49.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:50:49.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:49.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:49.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:50:49.102 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:50:49.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:50:49.103 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:50:49.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:49.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:49.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:50:49.104 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:50:49.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:50:49.104 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:50:49.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:49.105 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:50:49.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:50:49.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:49.106 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:49.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:50:49.106 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:50:49.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:50:49.106 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:50:49.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:49.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:50:49.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:50:49.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:49.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:50:49.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:50:49.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:50:49.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:50:49.108 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:50:49.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:49.110 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:50:49.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:50:49.111 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:50:49.111 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:50:49.111 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:50:49.116 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:50:49.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:50:49.637 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:50:49.639 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:50:49.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:50:49.640 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:50:49.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:50:49.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:50:49.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:50:50.049 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:50:50.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:50.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:50.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:50.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:50.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:50:50.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:50:50.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:50:50.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:50:50.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:50:50.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:50:50.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:50:51.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:51.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:51.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:51.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:51.454 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:50:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:50:52.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:52.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:52.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:52.380 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:50:52.844 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:50:53.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:53.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:53.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:53.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:53.308 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:50:53.773 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:50:54.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:50:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:50:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:50:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:50:54.237 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:50:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:50:55.170 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:50:55.635 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:50:56.100 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:50:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:50:57.035 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:50:57.503 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:50:57.973 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:50:58.440 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:50:58.906 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:50:59.372 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:50:59.837 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:51:00.304 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:51:00.770 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:51:01.239 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:51:01.707 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:51:02.178 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:51:02.649 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:51:03.120 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:51:03.590 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:51:04.061 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:51:04.532 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:51:04.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:04.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:04.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:04.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:04.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:04.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:04.771 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:51:09.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:09.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:09.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:09.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:09.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:09.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:09.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:09.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:09.781 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:09.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:09.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:09.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:09.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:51:09.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:09.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:09.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:51:09.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:09.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:51:09.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:51:09.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:09.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:09.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:09.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:51:09.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:09.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:51:09.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:51:09.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:51:09.791 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:51:09.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:09.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:51:10.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:51:10.319 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:10.320 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:10.321 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:51:10.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:10.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:10.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:10.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:51:10.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:10.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:10.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:10.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:51:10.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:51:10.352 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:10.355 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:10.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:10.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:10.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:10.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:10.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:51:10.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:10.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:10.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:10.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:11.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:51:11.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:51:11.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:11.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:11.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:11.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:12.127 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:51:12.594 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:51:12.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:12.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:12.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:12.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:13.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:51:13.529 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:51:13.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:13.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:13.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:13.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:13.996 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:51:14.462 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:51:14.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:14.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:14.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:14.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:14.928 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:51:15.394 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:51:15.860 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:51:16.369 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:51:16.836 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:51:17.303 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:51:17.769 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:51:18.237 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:51:18.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:18.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:18.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:18.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:18.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:18.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:18.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:18.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:18.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:18.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:18.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:18.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:18.377 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:51:18.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:18.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:18.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:18.377 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:23.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:23.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:23.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:23.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:23.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:23.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:23.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:23.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:23.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:23.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:23.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:51:23.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:51:23.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:51:23.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:23.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:23.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:23.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:51:23.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:23.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:51:23.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:23.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:51:23.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:51:23.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:23.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:23.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:23.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:51:23.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:23.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:51:23.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:23.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:23.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:51:23.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:51:23.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:51:23.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:51:23.401 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:51:23.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:23.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:51:23.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:51:23.931 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:23.933 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:23.934 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:51:23.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:23.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:23.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:51:23.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:23.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:23.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:23.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:51:23.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:51:23.963 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:23.965 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:23.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:23.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:23.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:23.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:23.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:24.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:51:24.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:24.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:24.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:24.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:24.805 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:51:25.271 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:51:25.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:25.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:25.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:25.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:25.737 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:51:26.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:51:26.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:26.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:26.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:26.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:26.669 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:51:27.136 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:51:27.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:27.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:27.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:27.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:27.602 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:51:28.068 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:51:28.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:28.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:28.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:28.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:28.534 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:51:29.000 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:51:29.467 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:51:29.934 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:51:30.401 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:51:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:51:31.333 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:51:31.799 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:51:31.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:31.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:31.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:31.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:31.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:31.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:31.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:31.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:31.988 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:51:31.988 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:31.988 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:31.989 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:31.989 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:51:36.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:36.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:36.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:36.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:36.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:36.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:36.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:36.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:36.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:36.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:36.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:37.001 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:37.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:51:37.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:37.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:51:37.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:51:37.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:37.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:37.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:37.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:51:37.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:37.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:51:37.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:37.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:37.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:51:37.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:51:37.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:51:37.010 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:51:37.010 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:51:37.010 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:37.015 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:51:37.480 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:51:37.536 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:37.538 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:37.538 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:51:37.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:37.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:37.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:37.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:51:37.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:37.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:37.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:37.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:51:37.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:51:37.571 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:37.574 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:37.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:37.585 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:51:37.585 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:51:37.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:37.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:37.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:51:38.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:38.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:38.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:38.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:38.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:38.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:38.132 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:51:38.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:38.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:38.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:38.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:38.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:38.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:38.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:38.135 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:51:43.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:43.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:43.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:43.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:43.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:43.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:43.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:43.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:43.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:43.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:43.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:43.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:43.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:51:43.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:43.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:51:43.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:51:43.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:43.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:43.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:43.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:51:43.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:43.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:51:43.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:43.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:43.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:51:43.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:51:43.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:51:43.155 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:51:43.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:43.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:51:43.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:51:43.684 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:43.685 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:43.686 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:51:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:43.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:43.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:43.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:51:43.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:43.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:43.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:43.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:51:43.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:51:43.717 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:43.719 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:43.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:43.729 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:51:43.729 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:51:43.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:43.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:44.092 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:51:44.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:44.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:44.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:44.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:44.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:44.277 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:51:44.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:44.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:44.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:44.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:44.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:44.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:44.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:44.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:44.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:44.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:44.280 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:51:49.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:49.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:49.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:49.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:49.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:49.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:49.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:49.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:49.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:49.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:49.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:51:49.287 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:51:49.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:51:49.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:49.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:49.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:49.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:51:49.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:49.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:51:49.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:49.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:49.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:51:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:49.291 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:49.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:51:49.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:51:49.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:51:49.293 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:51:49.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:49.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:49.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:51:49.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:51:49.826 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:49.827 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:49.828 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:51:49.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:49.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:49.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:49.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:51:49.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:49.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:49.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:49.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:51:49.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:51:49.855 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:49.858 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:49.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:49.869 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:51:49.869 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:51:49.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:49.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:50.230 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:51:50.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:50.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:50.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:50.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:50.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:50.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:50.417 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:50.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:50.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:50.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:50.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:50.419 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:51:55.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:51:55.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:51:55.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:55.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:55.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:55.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:55.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:51:55.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:55.430 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:55.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:51:55.431 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:51:55.432 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:51:55.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:51:55.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:55.432 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:55.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:51:55.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:51:55.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:51:55.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:51:55.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:55.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:51:55.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:51:55.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:55.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:55.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:51:55.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:51:55.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:51:55.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:51:55.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:55.437 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:51:55.437 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:51:55.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.441 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:51:55.441 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:51:55.442 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:51:55.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:51:55.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:51:55.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:51:55.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:51:55.974 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:55.974 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:55.975 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:51:55.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:55.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:51:55.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:51:55.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:51:56.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:56.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:56.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:56.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:51:56.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:51:56.005 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:51:56.007 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:51:56.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:51:56.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:51:56.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:51:56.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:56.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:51:56.381 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:51:56.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:56.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:56.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:56.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:56.851 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:51:57.321 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:51:57.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:57.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:57.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:57.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:57.792 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:51:58.262 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:51:58.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:58.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:58.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:58.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:58.730 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:51:59.199 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:51:59.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:51:59.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:51:59.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:51:59.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:51:59.666 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:52:00.134 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:52:00.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:00.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:00.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:00.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:00.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:52:01.071 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:52:01.539 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:52:02.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:52:02.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:52:02.940 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:52:03.407 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:52:03.875 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:52:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:04.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:04.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:04.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:04.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:04.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:04.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:04.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:04.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:04.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:04.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:04.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:04.059 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:04.061 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:04.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:04.274 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:52:04.275 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:52:04.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:04.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:04.343 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:52:04.810 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:52:05.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:05.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:05.043 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:52:05.044 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2093 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:05.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:05.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:05.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:05.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:05.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:05.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:05.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:05.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:05.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:05.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:05.047 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:52:10.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:10.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:10.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:10.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:10.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:10.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:10.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:10.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:10.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:10.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:10.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:10.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:10.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:52:10.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:10.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:52:10.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:52:10.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:10.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:10.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:10.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:52:10.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:10.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:52:10.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:10.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:10.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:52:10.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:52:10.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:52:10.068 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:52:10.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:10.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:52:10.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:52:10.601 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:10.602 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:10.603 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:52:10.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:10.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:10.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:10.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:10.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:10.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:10.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:10.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:10.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:10.650 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:10.652 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:10.662 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:52:10.663 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:52:10.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:10.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:11.026 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:52:11.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:11.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:11.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:11.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:11.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:11.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:11.215 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:11.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:11.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:11.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:11.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:11.218 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:52:16.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:16.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:16.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:16.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:16.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:16.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:16.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:16.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:16.230 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:16.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:16.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:52:16.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:52:16.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:52:16.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:16.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:16.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:16.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:52:16.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:16.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:52:16.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:16.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:16.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:52:16.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:16.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:16.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:52:16.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:52:16.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:52:16.240 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:52:16.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:16.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:16.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:52:16.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:52:16.769 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:16.770 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:16.772 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:52:16.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:16.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:16.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:16.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:16.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:16.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:16.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:16.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:16.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:16.803 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:16.805 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:16.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:16.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:16.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:16.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:16.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:17.178 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:52:17.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:17.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:17.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:17.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:17.645 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:52:18.114 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:52:18.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:18.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:18.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:18.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:52:19.050 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:52:19.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:19.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:19.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:19.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:19.516 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:52:19.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:52:20.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:20.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:20.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:20.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:20.451 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:52:20.918 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:52:21.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:21.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:21.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:21.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:21.385 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:52:21.852 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:52:22.319 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:52:22.787 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:52:23.254 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:52:23.720 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:52:24.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:52:24.653 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:52:24.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:24.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:24.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:24.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:24.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:24.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:24.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:24.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:24.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:24.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:24.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:24.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:24.884 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:24.886 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:24.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:24.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:24.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:24.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:24.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:25.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:52:25.584 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:52:26.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:52:26.518 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:52:26.984 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:52:27.451 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:52:27.918 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:52:28.384 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:52:28.851 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:52:29.317 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:52:29.784 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:52:30.249 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:52:30.715 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:52:31.182 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:52:31.648 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:52:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:52:32.581 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:52:32.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:32.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:32.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:32.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:32.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:32.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:32.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:32.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:32.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:32.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:32.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:32.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:32.952 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:32.954 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:32.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:32.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:32.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:32.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:33.047 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:52:33.513 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:52:33.979 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:52:34.445 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:52:34.911 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:52:35.378 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:52:35.846 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:52:36.313 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:52:36.780 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:52:37.248 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:52:37.715 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:52:38.182 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:52:38.649 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:52:39.117 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:52:39.584 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:52:40.051 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:52:40.518 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:52:40.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:40.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:40.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:40.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:40.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:40.985 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:52:40.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:40.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:40.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:40.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:40.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:40.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:40.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:41.029 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:41.031 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:41.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:41.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:41.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:41.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:41.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:41.452 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:52:41.918 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:52:42.383 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:52:42.849 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:52:43.314 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:52:43.779 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:52:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:52:44.708 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:52:45.173 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:52:45.637 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:52:46.102 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:52:46.566 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:52:47.697 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:52:47.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:47.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:47.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:47.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:47.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:47.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:47.753 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:47.753 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6746 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:52:52.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:52.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:52.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:52.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:52.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:52.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:52.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:52.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:52.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:52.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:52.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:52:52.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:52:52.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:52:52.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:52.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:52.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:52.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:52:52.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:52.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:52:52.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:52.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:52:52.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:52:52.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:52.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:52.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:52.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:52:52.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:52.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:52:52.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:52.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:52:52.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:52:52.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:52.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:52.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:52.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:52:52.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:52.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:52:52.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:52.768 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:52:52.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:52:52.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:52:52.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:52:52.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:52:52.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:52:52.769 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:52.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:52:53.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:52:53.293 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:53.294 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:53.294 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:52:53.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:53.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:53.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:53.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:52:53.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:53.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:52:53.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:52:53.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:52:53.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:52:53.329 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:52:53.330 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:52:53.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:52:53.337 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:52:53.337 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:52:53.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:53.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:52:53.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:52:53.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:53.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:53.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:53.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:54.168 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:52:54.632 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:52:54.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:54.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:54.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:54.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:54.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:52:54.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:52:54.854 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:52:54.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:54.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:54.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:54.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:54.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:54.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:54.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:54.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:54.857 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:52:59.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:52:59.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:52:59.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:59.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:59.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:59.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:59.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:52:59.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:59.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:59.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:52:59.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:52:59.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:52:59.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:52:59.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:59.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:59.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:52:59.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:52:59.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:52:59.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:52:59.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:59.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:52:59.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:52:59.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:59.866 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:52:59.866 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:52:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:52:59.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:52:59.868 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:52:59.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:52:59.873 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:53:00.338 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:53:00.391 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:00.392 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:00.393 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:53:00.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:00.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:00.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:00.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:53:00.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:00.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:00.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:00.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:53:00.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:53:00.427 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:00.428 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:00.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:00.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:53:00.434 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:53:00.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:00.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:00.802 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:53:00.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:00.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:00.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:00.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:00.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:00.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:00.988 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:53:00.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:00.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:00.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:00.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:00.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:00.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:00.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:00.989 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:53:00.989 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:00.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:00.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:00.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:00.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:00.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:00.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=247 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:05.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:05.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:05.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:05.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:05.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:05.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:05.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:05.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:05.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:05.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:05.994 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:53:05.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:53:05.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:53:05.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:05.995 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:05.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:05.995 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:53:05.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:05.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:53:05.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:05.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:05.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:53:05.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:05.998 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:05.998 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:53:05.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:06.000 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:53:06.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:53:06.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:53:06.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:53:06.001 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:53:06.001 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:53:06.001 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:06.006 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:53:06.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:53:06.518 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:06.519 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:06.520 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:53:06.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:06.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:06.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:53:06.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:06.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:06.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:06.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:53:06.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:53:06.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:06.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:06.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:06.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:06.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:06.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:53:07.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:07.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:07.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:07.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:07.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:53:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:53:08.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:08.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:08.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:08.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:08.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:08.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:08.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:08.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:08.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:08.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:08.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:08.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:08.112 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:08.112 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:53:13.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:13.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:13.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:13.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:13.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:13.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:13.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:13.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:13.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:13.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:13.118 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:53:13.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:13.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:13.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:13.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:13.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:13.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:13.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:53:13.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:53:13.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:13.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:13.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:13.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:53:13.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:13.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:53:13.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:53:13.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:53:13.122 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:53:13.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:13.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:53:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:53:13.647 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:13.647 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:13.648 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:53:13.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:13.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:13.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:53:13.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:13.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:13.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:13.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:53:13.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:53:13.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:13.686 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:53:13.686 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:53:13.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:13.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:14.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:53:14.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:14.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:14.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:14.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:14.518 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:53:14.982 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:53:15.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:15.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:15.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:15.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:15.446 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:53:15.910 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:53:16.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:16.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:16.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:16.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:53:16.836 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:53:17.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:17.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:17.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:17.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:17.299 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:53:17.763 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:53:18.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:18.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:18.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:18.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:18.226 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:53:18.689 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:53:19.152 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:53:19.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:53:20.078 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:53:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:53:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:53:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:53:21.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:21.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:21.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:21.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:21.688 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:21.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:21.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:21.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:21.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:21.695 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:53:26.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:26.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:26.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:26.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:26.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:26.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:26.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:26.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:26.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:26.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:26.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:26.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:26.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:53:26.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:26.703 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:53:26.703 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:53:26.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:26.703 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:26.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:26.703 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:53:26.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:26.703 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:53:26.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:26.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:53:26.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:53:26.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:26.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:26.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:53:26.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:26.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:26.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:53:26.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:26.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:53:26.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:53:26.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:53:26.707 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:53:26.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:53:26.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:53:26.708 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:53:26.708 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:26.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:26.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:53:27.176 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:53:27.229 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:27.229 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:27.230 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:53:27.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:27.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:27.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:53:27.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:27.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:27.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:27.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:53:27.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:53:27.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:53:27.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:27.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:27.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:27.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:28.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:53:28.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:53:28.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:28.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:28.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:28.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:29.028 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:53:29.491 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:53:29.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:29.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:29.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:29.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:29.954 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:53:30.418 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:53:30.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:30.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:30.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:30.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:30.881 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:53:31.344 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:53:31.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:31.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:31.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:31.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:31.807 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:53:32.271 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:53:32.733 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:53:33.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:53:33.660 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:53:33.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:33.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:33.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:33.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:33.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:33.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:33.825 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:53:38.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:38.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:38.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:38.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:38.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:38.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:38.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:38.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:38.831 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:38.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:38.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:38.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:38.832 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:53:38.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:38.833 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:38.833 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:53:38.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:38.834 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:38.834 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:53:38.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:53:38.836 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:53:38.836 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:53:38.836 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:38.840 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:53:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:53:39.352 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:39.352 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:39.353 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:53:39.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:39.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:39.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:39.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:53:39.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:39.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:39.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:39.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:53:39.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:53:39.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:53:39.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:39.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:39.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:39.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:53:40.776 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:53:40.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:40.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:40.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:40.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:41.239 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:53:41.701 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:53:41.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:41.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:41.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:41.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:42.165 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:53:42.629 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:53:42.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:42.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:42.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:42.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:43.092 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:53:43.555 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:53:43.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:43.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:43.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:43.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:44.019 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:44.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:44.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:44.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:44.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:44.482 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:53:44.946 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:53:45.411 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:53:45.876 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:53:46.340 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:53:46.804 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:53:47.270 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:53:47.735 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:53:48.200 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:53:48.663 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:53:49.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:49.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:49.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:49.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:49.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:49.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:49.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:49.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:49.041 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:53:49.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:49.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:49.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:49.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:49.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:53:49.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:53:49.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:53:49.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:49.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:49.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:49.045 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:53:49.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:49.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:53:49.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:49.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:49.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:53:49.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:49.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:49.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:53:49.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:53:49.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:53:49.050 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:53:49.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:53:49.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:49.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:49.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:49.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:49.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:49.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:49.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:49.052 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:53:54.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:53:54.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:53:54.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:54.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:54.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:54.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:54.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:53:54.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:54.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:54.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:53:54.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:53:54.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:53:54.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:53:54.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:54.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:54.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:53:54.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:53:54.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:53:54.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:53:54.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:54.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:53:54.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:53:54.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:54.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:54.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:53:54.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:53:54.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:53:54.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:53:54.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:54.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:53:54.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:53:54.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:54.065 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:53:54.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:53:54.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:53:54.066 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:53:54.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:53:54.071 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:53:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:53:54.582 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:53:54.583 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:53:54.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:53:54.584 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:53:54.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:53:54.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:53:54.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:53:54.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:53:54.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:53:54.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:53:54.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:53:54.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:53:54.999 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:53:55.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:55.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:55.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:55.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:55.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:53:55.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:53:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:56.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:56.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:56.390 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:53:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:53:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:57.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:57.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:57.319 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:53:57.782 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:53:58.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:58.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:58.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:58.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:58.245 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:53:58.710 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:53:59.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:53:59.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:53:59.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:53:59.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:53:59.174 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:53:59.638 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:54:00.102 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:54:00.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:00.565 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:54:01.028 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:54:01.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:01.492 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:54:02.125 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:54:02.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:02.588 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:54:03.051 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:54:03.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:03.514 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:54:03.977 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:54:04.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:04.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:04.770 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:54:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:54:05.697 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:54:06.161 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:54:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:54:07.089 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:54:07.553 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:54:08.018 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:54:08.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:08.482 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:54:08.946 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:54:09.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:09.409 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:54:09.873 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:54:10.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:10.336 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:54:10.799 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:54:11.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:11.262 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:54:11.725 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:54:12.188 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:54:12.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:12.651 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:54:13.114 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:54:13.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:13.577 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:54:14.040 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:54:14.503 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:54:14.966 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:54:15.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:15.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:15.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:15.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:54:15.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:54:15.365 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:54:15.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:20.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:54:20.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:54:20.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:20.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:20.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:20.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:20.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:20.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:54:20.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:20.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:54:20.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:54:20.373 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:54:20.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:54:20.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:54:20.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:54:20.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:54:20.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:54:20.375 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:54:20.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:54:20.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:54:20.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:54:20.377 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:54:20.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:20.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:54:20.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:54:20.894 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:54:20.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:54:20.895 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:54:20.896 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:54:20.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:20.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:20.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:54:20.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:20.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:20.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:20.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:54:20.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:54:20.942 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:54:20.943 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:54:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:54:20.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:20.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:20.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:20.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:21.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:54:21.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:21.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:21.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:21.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:54:22.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:54:22.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:22.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:22.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:22.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:22.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:22.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:54:22.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:54:22.215 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:54:22.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:54:22.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:54:22.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:54:22.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:54:27.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:54:27.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:54:27.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:27.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:27.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:27.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:27.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:27.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:54:27.223 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:27.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:54:27.223 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:54:27.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:54:27.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:54:27.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:54:27.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:27.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:27.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:54:27.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:54:27.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:54:27.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:54:27.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:54:27.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:54:27.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:54:27.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:54:27.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:54:27.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:54:27.229 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:54:27.229 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:54:27.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:54:27.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:54:27.746 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:54:27.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:54:27.747 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:54:27.748 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:54:27.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:27.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:27.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:54:27.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:27.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:27.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:27.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:54:27.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:54:27.796 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:54:27.797 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:54:27.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:54:27.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:27.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:27.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:27.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:28.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:54:28.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:28.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:28.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:28.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:28.622 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:54:29.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 02:54:29.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:29.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:29.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:29.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:29.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:29.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:54:29.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:54:29.060 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:54:34.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:54:34.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:54:34.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:34.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:34.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:34.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:34.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:54:34.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:54:34.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:34.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:54:34.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:54:34.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:54:34.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:54:34.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:54:34.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:34.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:54:34.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:54:34.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:54:34.067 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:54:34.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:54:34.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:54:34.068 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:54:34.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:54:34.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:54:34.070 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:54:34.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:54:34.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:54:34.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:54:34.585 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:54:34.585 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:54:34.586 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:54:34.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:54:34.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:34.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:34.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:54:34.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:34.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:34.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:34.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:54:34.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:54:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:54:34.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:34.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:34.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:34.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:35.002 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:54:35.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:35.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:35.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:35.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:35.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:54:35.929 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:54:36.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:36.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:36.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:36.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:36.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:54:36.855 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:54:37.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:37.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:37.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:37.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:37.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:54:37.784 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:54:38.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:38.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:38.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:38.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:38.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:54:38.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:54:39.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:54:39.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:54:39.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:54:39.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:54:39.171 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:54:39.634 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:54:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:54:40.559 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:54:41.021 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:54:41.484 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:54:41.946 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:54:42.409 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:54:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:54:43.335 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:54:43.800 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:54:44.263 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:54:44.728 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:54:45.190 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:54:45.653 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:54:46.117 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:54:46.580 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:54:47.043 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:54:47.508 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:54:47.973 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:54:48.437 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:54:48.901 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:54:49.365 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:54:49.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:54:49.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:49.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:49.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:49.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:54:49.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:54:49.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:54:49.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:49.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:54:49.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:54:49.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:54:49.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:54:49.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:54:49.691 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:54:49.691 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 02:54:49.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:49.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:54:49.828 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:54:50.292 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:54:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:54:51.259 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:54:51.723 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:54:52.187 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:54:52.650 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:54:53.114 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:54:53.579 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:54:54.042 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:54:54.505 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:54:54.968 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:54:55.433 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:54:55.896 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:54:56.360 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:54:56.824 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:54:57.288 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:54:57.752 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:54:58.215 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:54:58.678 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:54:59.142 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 02:54:59.606 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 02:55:00.069 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 02:55:00.533 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 02:55:00.997 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 02:55:01.459 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 02:55:01.923 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 02:55:02.386 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 02:55:02.850 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 02:55:03.314 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 02:55:03.777 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 02:55:04.241 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 02:55:04.704 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 02:55:05.168 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 02:55:05.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:05.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:05.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:05.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:05.353 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:55:05.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:05.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:05.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:55:05.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:05.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:55:05.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:55:05.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:55:05.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:55:05.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:05.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:55:05.400 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 02:55:05.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:05.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:05.631 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 02:55:06.094 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 02:55:06.557 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 02:55:07.020 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 02:55:07.484 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 02:55:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 02:55:08.413 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 02:55:08.878 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 02:55:09.340 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 02:55:09.803 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 02:55:10.267 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 02:55:10.730 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 02:55:11.193 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 02:55:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 02:55:12.120 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 02:55:12.583 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 02:55:13.047 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 02:55:13.511 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 02:55:13.975 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 02:55:14.440 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 02:55:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 02:55:15.368 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 02:55:15.832 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 02:55:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 02:55:16.759 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 02:55:17.224 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 02:55:17.690 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 02:55:18.155 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 02:55:18.618 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 02:55:19.084 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 02:55:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 02:55:20.051 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 02:55:20.729 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 02:55:21.193 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 02:55:21.657 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 02:55:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:21.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:21.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:21.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:21.747 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:55:21.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:21.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:21.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:55:21.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:21.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:55:21.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:55:21.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:55:21.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:55:21.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:21.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:21.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:55:21.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:55:21.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:21.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:22.123 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 02:55:22.585 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 02:55:23.048 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 02:55:23.512 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 02:55:23.975 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 02:55:24.439 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 02:55:24.904 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 02:55:25.368 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 02:55:25.831 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 02:55:26.293 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 02:55:26.756 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 02:55:27.218 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 02:55:27.681 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 02:55:28.144 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 02:55:28.607 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 02:55:29.069 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 02:55:29.532 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 02:55:29.994 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 02:55:30.457 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 02:55:30.920 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 02:55:31.383 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 02:55:31.847 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 02:55:32.309 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 02:55:32.772 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 02:55:33.234 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 02:55:33.697 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 02:55:34.160 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 02:55:34.626 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 02:55:35.089 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 02:55:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 02:55:36.015 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 02:55:36.478 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 02:55:36.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:36.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:36.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:36.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:36.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:36.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:36.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:55:36.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:55:36.928 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:55:41.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:55:41.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:55:41.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:41.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:41.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:41.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:41.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:41.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:55:41.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:41.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:55:41.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:55:41.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:55:41.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:55:41.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:55:41.937 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:55:41.937 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:55:41.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:41.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:55:41.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:55:41.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:55:41.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:41.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:41.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:55:41.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:55:41.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:55:41.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:55:41.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:55:41.941 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:55:41.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:55:41.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:55:41.942 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:55:41.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:46.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:55:46.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:55:46.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:46.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:46.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:46.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:46.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:46.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:55:46.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:46.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:55:46.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:55:46.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:55:46.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:55:46.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:55:46.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:55:46.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:55:46.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:55:46.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:55:46.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:55:46.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:46.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:55:46.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:55:46.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:55:46.954 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:55:46.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:55:46.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:55:47.423 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:55:47.470 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:55:47.471 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:55:47.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:47.471 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:55:47.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:47.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:47.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:55:47.485 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:55:47.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:47.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:55:47.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:55:47.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:55:47.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:55:47.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:47.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:55:47.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:55:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:47.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:55:47.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:47.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:47.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:47.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:48.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:55:48.815 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:55:48.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:48.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:48.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:48.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:49.279 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:55:49.743 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:55:49.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:49.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:49.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:49.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:50.207 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:55:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:55:50.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:50.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:50.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:50.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:51.134 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:55:51.598 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:55:51.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:51.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:51.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:51.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:52.061 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:55:52.525 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:55:52.990 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:55:53.453 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:55:53.918 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:55:54.381 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:55:54.844 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:55:55.306 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:55:55.769 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:55:56.231 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:55:56.694 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:55:57.157 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:55:57.622 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:55:57.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:55:57.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:55:57.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:55:57.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:55:57.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:55:57.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:55:57.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:55:57.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:55:57.896 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:55:57.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:56:02.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:02.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:02.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:02.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:02.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:02.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:02.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:02.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:02.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:02.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:02.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:56:02.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:02.902 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:02.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:56:02.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:02.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:56:02.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:02.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:56:02.904 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:56:02.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:02.904 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:02.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:02.904 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:56:02.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:02.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:56:02.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:56:02.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:56:02.906 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:56:02.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:02.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:56:03.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:56:03.419 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:56:03.420 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:56:03.420 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:56:03.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:03.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:56:03.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:56:03.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:56:03.431 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:56:03.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:03.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:56:03.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:56:03.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:56:03.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:56:03.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:03.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:56:03.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:56:03.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:03.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:03.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:56:03.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:03.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:03.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:03.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:04.303 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:56:04.766 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:56:04.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:04.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:04.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:04.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:05.229 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:56:05.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:56:05.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:05.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:05.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:05.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:06.156 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:56:06.620 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:56:06.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:06.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:06.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:06.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:07.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:56:07.546 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:56:07.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:07.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:07.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:07.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:08.010 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:56:08.473 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:56:08.935 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:56:09.398 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:56:09.862 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:56:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:56:10.790 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:56:11.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:56:11.715 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:56:12.179 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:56:12.641 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:56:13.104 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:56:13.567 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:56:13.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:13.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:13.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:56:13.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:56:13.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:13.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:13.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:13.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:13.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:13.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:13.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:13.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:13.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:13.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:13.849 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:56:18.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:18.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:18.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:18.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:18.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:18.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:18.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:18.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:18.859 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:18.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:18.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:56:18.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:56:18.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:56:18.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:18.860 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:18.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:56:18.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:18.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:18.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:56:18.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:18.862 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:18.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:56:18.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:18.864 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:18.864 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:56:18.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:56:18.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:56:18.867 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:56:18.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.867 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:18.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:56:19.335 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:56:19.382 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:56:19.382 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:56:19.383 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:56:19.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:19.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:56:19.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:56:19.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:56:19.392 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:56:19.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:19.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:56:19.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:56:19.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:56:19.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:56:19.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:19.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:56:19.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:56:19.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:19.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:19.798 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:56:19.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:19.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:19.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:19.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:20.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:56:20.273 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:20.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:56:20.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:20.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:20.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:20.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:56:21.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:56:21.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:21.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:21.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:21.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:22.113 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:56:22.844 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:56:22.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:22.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:22.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:22.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:23.307 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:56:23.771 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:56:23.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:23.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:23.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:23.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:24.234 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:56:24.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:56:25.161 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:56:25.624 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:56:26.087 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:56:26.550 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:56:27.012 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:56:27.475 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:56:27.938 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:56:28.401 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:56:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:56:29.328 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:56:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:56:30.254 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:56:30.717 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:56:31.181 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:56:31.648 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:56:32.112 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:56:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:56:33.039 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:56:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:56:33.965 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:56:34.428 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:56:34.891 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:56:35.354 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:56:35.818 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:56:36.281 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:56:36.744 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:56:37.207 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:56:37.671 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:56:38.135 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:56:38.600 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:56:39.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:39.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:39.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:56:39.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:39.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:39.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:39.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:39.009 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:56:44.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:44.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:44.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:44.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:44.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:44.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:44.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:44.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:44.018 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:44.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:44.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:56:44.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:56:44.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:56:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:44.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:44.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:44.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:56:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:44.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:56:44.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:44.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:56:44.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:56:44.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:44.022 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:44.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:44.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:56:44.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:44.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:56:44.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:44.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:44.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:56:44.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:56:44.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:56:44.027 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:44.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:44.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:56:44.498 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:56:44.550 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:56:44.551 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:56:44.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:44.552 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:56:44.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:56:44.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:56:44.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:56:44.569 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:56:44.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:44.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:56:44.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:56:44.572 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:56:44.572 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:56:44.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:44.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:56:44.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:56:44.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:44.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:44.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:56:45.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:45.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:45.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:45.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:45.428 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:56:45.440 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:45.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:56:46.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:46.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:46.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:46.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:46.357 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:56:46.386 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:46.821 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:56:47.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:47.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:47.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:47.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:47.285 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:56:47.332 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:47.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:56:48.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:48.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:48.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:48.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:48.212 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:56:48.279 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:48.677 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:56:49.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:49.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:49.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:49.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:49.141 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:56:49.229 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:49.633 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:56:50.097 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:56:50.202 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:50.560 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:56:51.024 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:56:51.148 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:51.489 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:56:51.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:56:52.094 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:52.418 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:56:52.881 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:56:53.040 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:53.344 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:56:53.807 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:56:53.986 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:54.271 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:56:54.734 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:56:54.932 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:56:54.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:56:54.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:56:54.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:56:54.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:56:54.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:54.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:54.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:54.977 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:56:59.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:56:59.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:56:59.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:59.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:59.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:59.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:59.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:56:59.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:59.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:59.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:56:59.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:59.985 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:56:59.985 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:56:59.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:56:59.986 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:59.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:56:59.987 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:56:59.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:56:59.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:56:59.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:59.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:56:59.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:56:59.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:56:59.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:56:59.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:56:59.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:56:59.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:56:59.989 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:56:59.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:56:59.994 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:57:00.459 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:57:00.504 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:57:00.504 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:00.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:00.505 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:57:00.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:00.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:00.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:00.516 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:57:00.516 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:00.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:00.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:00.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:00.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:00.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:00.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:00.552 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:00.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:00.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:00.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:00.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:57:00.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:00.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:00.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:00.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:01.387 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:57:01.401 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:57:01.850 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:57:01.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:01.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:01.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:01.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:02.313 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:57:02.776 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:57:02.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:02.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:02.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:02.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:03.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:57:03.703 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:57:03.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:03.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:03.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:03.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:04.166 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:57:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:57:04.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:04.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:04.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:04.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:05.093 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:57:05.556 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:57:06.020 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:57:06.482 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:57:06.946 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:57:07.408 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:57:07.871 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:57:08.335 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:57:08.798 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:57:09.261 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:57:09.725 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:57:10.188 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:57:10.652 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:57:10.849 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:11.115 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:57:11.584 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:57:12.252 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:57:12.718 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:57:13.182 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:57:13.658 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:57:14.125 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:57:14.592 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:57:15.085 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:57:15.550 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:57:16.014 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:57:16.478 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:57:16.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:16.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:16.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:16.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:16.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:16.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:16.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:16.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:16.791 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:57:21.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:21.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:21.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:21.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:21.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:21.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:21.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:21.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:21.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:21.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:21.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:21.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:21.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:57:21.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:21.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:57:21.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:57:21.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:21.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:21.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:21.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:57:21.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:21.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:57:21.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:21.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:21.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:57:21.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:21.803 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:57:21.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:57:21.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:57:21.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:57:21.803 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:57:21.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:57:21.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:57:21.804 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:57:21.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:21.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:57:22.272 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:57:22.317 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:57:22.317 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:22.317 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:57:22.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:22.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:22.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:22.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:22.327 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:22.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:22.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:22.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:22.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:22.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:22.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:22.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:22.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:22.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:22.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:22.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:57:22.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:22.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:22.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:22.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:23.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:57:23.210 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:57:23.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:57:23.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:23.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:23.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:23.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:24.124 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:57:24.586 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:57:24.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:24.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:24.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:24.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:25.049 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:57:25.512 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:57:25.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:25.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:25.975 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:57:26.439 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:57:26.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:26.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:26.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:26.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:26.902 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:57:27.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:57:27.828 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:57:28.291 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:57:28.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:57:29.217 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:57:29.680 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:57:30.143 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:57:30.606 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:57:31.069 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:57:31.532 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:57:31.995 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:57:32.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:32.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:32.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:32.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:32.366 [WARNING] transceiver.py:257 (MS@172.18.188.22:6700) RX TRXD message (fn=2327 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:32.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:32.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:32.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:32.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:32.371 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:32.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2328 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:37.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:37.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:37.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:37.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:37.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:37.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:37.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:37.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:37.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:37.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:57:37.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:37.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:37.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:57:37.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:37.379 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:37.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:57:37.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:57:37.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:57:37.381 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:57:37.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:37.386 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:57:37.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:57:37.896 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:57:37.896 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:37.896 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:57:37.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:37.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:37.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:37.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:37.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:37.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:37.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:37.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:37.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:37.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:37.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:37.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:37.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:38.311 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:57:38.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:38.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:38.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:38.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:38.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:38.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:38.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:38.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:38.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:38.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:38.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:38.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:38.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:38.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:57:38.357 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:57:38.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:38.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:38.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:38.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:38.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:38.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:38.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:57:39.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:39.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:39.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:39.028 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:57:39.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:39.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:39.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:39.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:39.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:39.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:39.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:39.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:39.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:39.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:39.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:39.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:39.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:39.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:39.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:39.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:39.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:39.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:39.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:39.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:39.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:39.240 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:57:39.241 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:57:39.241 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:57:39.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:39.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:39.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:39.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:39.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:39.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:39.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:39.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:39.627 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:57:39.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:39.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:39.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:39.630 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:39.631 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:44.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:44.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:44.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:44.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:44.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:44.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:44.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:44.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:44.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:44.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:44.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:44.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:44.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:57:44.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:44.638 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:44.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:57:44.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:44.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:44.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:57:44.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:57:44.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:57:44.641 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:57:44.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:44.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:57:45.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:57:45.153 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:57:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:45.154 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:45.155 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:57:45.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:45.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:45.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:45.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:45.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:45.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:45.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:45.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:45.199 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:57:45.200 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 02:57:45.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:45.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:45.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:45.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:45.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:57:45.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:45.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:45.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:45.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:45.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:45.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:45.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:45.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:45.581 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:45.582 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:57:50.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:57:50.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:57:50.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:50.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:50.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:50.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:50.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:57:50.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:50.587 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:50.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:57:50.587 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:50.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:57:50.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:57:50.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:50.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:57:50.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:57:50.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:50.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:50.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:57:50.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:57:50.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:57:50.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:57:50.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:50.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:57:50.591 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:57:50.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.593 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:57:50.593 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:57:50.593 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:57:50.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:57:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:57:50.598 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:57:51.061 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:57:51.225 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:57:51.225 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:57:51.226 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:57:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:51.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:51.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:51.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:51.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:51.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:51.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:51.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:51.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:51.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:51.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:51.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:51.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:51.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:51.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:51.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:51.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:51.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:51.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:51.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:57:52.119 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:57:52.582 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:57:52.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:52.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:52.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:52.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:53.046 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:57:53.509 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:57:53.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:53.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:53.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:53.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:53.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:57:54.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:54.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:54.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:54.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:54.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:54.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:54.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:54.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:54.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:54.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:54.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:54.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:54.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:54.389 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:57:54.389 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 02:57:54.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:54.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:54.436 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:57:54.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:54.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:54.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:54.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:54.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:54.898 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:57:55.361 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:57:55.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:57:55.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:57:55.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:57:55.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:57:55.824 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:57:56.287 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:57:56.750 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:57:57.213 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:57:57.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:57.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:57.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:57.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:57.518 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:57:57.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:57:57.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:57:57.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:57:57.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:57.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:57.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:57.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:57:57.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:57:57.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:57.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:57:57.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:57:57.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:57:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:57:57.677 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:57:58.140 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:57:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:57:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:57:59.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:57:59.994 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:58:00.457 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:58:00.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:00.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:00.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:00.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:00.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:00.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:00.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:58:00.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:00.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:58:00.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:58:00.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:58:00.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:58:00.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:00.688 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:58:00.688 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:58:00.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:00.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:00.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:00.920 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:58:01.383 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:58:01.846 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:58:02.309 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:58:02.772 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:58:03.235 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:58:03.699 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:58:03.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:03.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:03.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:03.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:03.840 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:03.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:03.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:03.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:58:03.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:58:03.844 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:58:08.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:58:08.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:58:08.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:08.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:08.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:08.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:08.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:08.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:58:08.850 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:08.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:58:08.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:58:08.851 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:58:08.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:58:08.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:58:08.852 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:58:08.852 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:58:08.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:58:08.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:58:08.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:58:08.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:58:08.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:58:08.854 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:58:08.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:08.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:58:09.321 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:58:09.365 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:58:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:09.366 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:58:09.367 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:58:09.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:09.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:09.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:58:09.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:09.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:58:09.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:58:09.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:58:09.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:58:09.784 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:58:09.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:09.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:09.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:09.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:10.246 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:58:10.708 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:58:10.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:10.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:10.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:10.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:11.171 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:58:11.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:58:11.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:11.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:11.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:12.097 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:58:12.560 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:58:12.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:12.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:12.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:12.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:13.024 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:58:13.489 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:58:13.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:58:14.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:14.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:14.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:14.755 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:58:15.223 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:58:15.690 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:58:16.153 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:58:16.616 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:58:17.079 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:58:17.542 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:58:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:58:18.470 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:58:18.932 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:58:19.395 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:58:19.858 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:58:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:58:20.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:20.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:20.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:20.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:20.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:58:20.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:58:20.547 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:58:20.547 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:58:25.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:58:25.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:58:25.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:25.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:25.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:25.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:25.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:25.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:58:25.557 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:25.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:58:25.557 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:58:25.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:58:25.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:58:25.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:58:25.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:58:25.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:58:25.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:58:25.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:58:25.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:58:25.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:58:25.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:58:25.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:58:25.562 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:58:25.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:25.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:58:26.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:58:26.077 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:58:26.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:26.078 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:58:26.078 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:58:26.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:26.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:26.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:58:26.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:26.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:58:26.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:58:26.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:58:26.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:58:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:26.122 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 02:58:26.122 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 02:58:26.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:26.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:26.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:58:26.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:26.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:26.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:26.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:26.956 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:58:27.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:58:27.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:27.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:27.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:27.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:27.881 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:58:28.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:28.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:28.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:28.122 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 02:58:28.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:58:28.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:28.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:58:28.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:58:28.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:58:28.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:58:28.344 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:58:28.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:28.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:28.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:28.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:28.807 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:58:29.269 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:58:29.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:29.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:29.732 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:58:30.194 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:58:30.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:30.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:30.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:30.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:30.657 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:58:31.120 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:58:31.582 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:58:32.046 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:58:32.509 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:58:32.972 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:58:33.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:58:33.897 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:58:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:58:34.822 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:58:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:58:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:58:36.212 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:58:36.675 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:58:37.138 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:58:37.601 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:58:38.065 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:58:38.528 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:58:38.991 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:58:39.454 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:58:39.918 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:58:40.381 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:58:40.843 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:58:41.305 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:58:41.948 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:58:42.411 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:58:42.874 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:58:43.337 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:58:43.799 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:58:44.261 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:58:44.723 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:58:45.186 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:58:45.648 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:58:46.110 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:58:46.573 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:58:47.035 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:58:47.497 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:58:47.960 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 02:58:48.424 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 02:58:48.887 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 02:58:49.350 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 02:58:49.812 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 02:58:50.274 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 02:58:50.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:50.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:50.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:50.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:50.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:50.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:58:50.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:58:50.540 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:58:55.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:58:55.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:58:55.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:55.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:55.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:55.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:55.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:58:55.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:58:55.545 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:55.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:58:55.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:58:55.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:58:55.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:58:55.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:58:55.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:58:55.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:58:55.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:58:55.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:58:55.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:58:55.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:58:55.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:58:55.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:58:55.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:58:55.550 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:58:55.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:58:55.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:58:56.019 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:58:56.064 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:58:56.064 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:58:56.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:58:56.065 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:58:56.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:58:56.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:58:56.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:58:56.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:58:56.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:58:56.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:58:56.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:58:56.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:58:56.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:58:56.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:56.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:56.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:56.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:56.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:58:57.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:58:57.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:57.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:57.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:57.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:57.869 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:58:58.332 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:58:58.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:58.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:58.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:58.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:58:59.258 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:58:59.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:58:59.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:58:59.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:58:59.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:58:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:59:00.184 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:59:00.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:00.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:00.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:00.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:00.647 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:59:01.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:59:01.575 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:59:02.038 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:59:02.502 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:59:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:59:03.428 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:59:03.892 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:59:04.356 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:59:04.819 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:59:05.282 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:59:05.745 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:59:06.208 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:59:06.671 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:59:07.134 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:59:07.597 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:59:08.060 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:59:08.523 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:59:08.987 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:59:09.449 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:59:09.912 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:59:10.375 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:59:10.838 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:59:11.301 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:59:11.765 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:59:12.230 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:59:12.731 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:59:13.195 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:59:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:59:14.123 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:59:14.585 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:59:15.048 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:59:15.510 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:59:15.973 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:59:16.435 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:59:16.898 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:59:17.361 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:59:17.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:59:17.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:59:17.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:59:17.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:59:17.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:59:17.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:59:17.564 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:17.564 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:22.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:59:22.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:59:22.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:59:22.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:59:22.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:59:22.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:59:22.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:59:22.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:59:22.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:22.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:59:22.569 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:59:22.570 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:59:22.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:59:22.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:59:22.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:59:22.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:59:22.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:59:22.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:59:22.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:59:22.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:22.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:59:22.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:59:22.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:59:22.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:59:22.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:59:22.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:59:22.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:59:22.574 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:59:22.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:22.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:22.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:59:23.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:59:23.086 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:59:23.087 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:59:23.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:59:23.087 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:59:23.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:59:23.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:59:23.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:59:23.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:59:23.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:59:23.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:59:23.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:59:23.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:59:23.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:59:23.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:23.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:23.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:23.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:23.968 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:59:24.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:59:24.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:24.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:24.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:24.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:24.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:59:25.358 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:59:25.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:25.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:25.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:25.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:25.820 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:59:26.283 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:59:26.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:26.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:26.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:26.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:26.746 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:59:27.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:59:27.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:27.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:27.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:27.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:27.671 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:59:28.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:59:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:59:29.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:59:29.521 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:59:29.983 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:59:30.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:59:30.908 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:59:31.370 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:59:31.832 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:59:32.295 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:59:32.757 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 02:59:33.220 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 02:59:33.682 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 02:59:34.146 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 02:59:34.609 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 02:59:35.072 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 02:59:35.534 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 02:59:35.997 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 02:59:36.459 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 02:59:36.922 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 02:59:37.384 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 02:59:37.847 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 02:59:38.309 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 02:59:38.771 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 02:59:39.234 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 02:59:39.697 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 02:59:40.159 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 02:59:40.622 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 02:59:41.084 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 02:59:41.549 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 02:59:42.011 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 02:59:42.474 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 02:59:42.936 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 02:59:43.400 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 02:59:43.863 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 02:59:44.327 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 02:59:44.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:59:44.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:59:44.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:59:44.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:59:44.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:59:44.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:59:44.589 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 02:59:44.589 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:44.589 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:44.589 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:44.589 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 02:59:49.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 02:59:49.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 02:59:49.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:59:49.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:59:49.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:59:49.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:59:49.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 02:59:49.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:59:49.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:49.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 02:59:49.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:59:49.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 02:59:49.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 02:59:49.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:49.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 02:59:49.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 02:59:49.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:59:49.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:49.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 02:59:49.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 02:59:49.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 02:59:49.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 02:59:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:49.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 02:59:49.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 02:59:49.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:59:49.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 02:59:49.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 02:59:49.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 02:59:49.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 02:59:49.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 02:59:49.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 02:59:49.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 02:59:49.608 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 02:59:49.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 02:59:49.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 02:59:50.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 02:59:50.125 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 02:59:50.125 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 02:59:50.126 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 02:59:50.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 02:59:50.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 02:59:50.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 02:59:50.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 02:59:50.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 02:59:50.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 02:59:50.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 02:59:50.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 02:59:50.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 02:59:50.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 02:59:50.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:50.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:50.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:50.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:51.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 02:59:51.468 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 02:59:51.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:51.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:51.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:51.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:51.931 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 02:59:52.394 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 02:59:52.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:52.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:52.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:52.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:52.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 02:59:53.320 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 02:59:53.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:53.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:53.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:53.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:53.783 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 02:59:54.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 02:59:54.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 02:59:54.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 02:59:54.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 02:59:54.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 02:59:54.710 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 02:59:55.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 02:59:55.637 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 02:59:56.100 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 02:59:56.563 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 02:59:57.027 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 02:59:57.491 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 02:59:57.956 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 02:59:58.421 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 02:59:58.884 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 02:59:59.349 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 02:59:59.813 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:00:00.276 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:00:00.740 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:00:01.318 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:00:01.781 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:00:02.246 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:00:02.708 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:00:03.171 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:00:03.633 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:00:04.096 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:00:04.558 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:00:05.021 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:00:05.485 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:00:05.948 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:00:06.411 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:00:06.873 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:00:07.336 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:00:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:00:08.261 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:00:08.724 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:00:09.192 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:00:09.656 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:00:10.120 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:00:10.583 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:00:11.047 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:00:11.510 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:00:11.973 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:00:12.437 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:00:12.900 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:00:13.364 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:00:13.827 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:00:14.290 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:00:14.753 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:00:15.216 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:00:15.679 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:00:16.142 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:00:16.605 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:00:17.074 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:00:17.538 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:00:18.001 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:00:18.464 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:00:18.927 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:00:19.390 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:00:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:00:20.315 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:00:20.778 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:00:21.241 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:00:21.703 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:00:22.166 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:00:22.631 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:00:23.094 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:00:23.556 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:00:23.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:00:23.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:00:23.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:00:23.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:00:23.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:00:23.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:00:23.629 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:00:28.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:00:28.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:00:28.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:00:28.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:00:28.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:00:28.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:00:28.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:00:28.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:00:28.637 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:00:28.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:00:28.637 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:00:28.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:00:28.639 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:00:28.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:00:28.639 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:00:28.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:00:28.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:00:28.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:00:28.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:00:28.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:00:28.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:00:28.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:00:28.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:28.641 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:00:28.641 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:00:28.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:00:28.641 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:00:28.641 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:00:28.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:00:28.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:00:28.641 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:00:28.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:28.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:00:28.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:00:28.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:00:28.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:00:28.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:00:28.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:00:28.644 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:00:28.644 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:00:28.644 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:00:28.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:00:28.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:00:29.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:00:29.566 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:00:29.567 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:00:29.567 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:00:29.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:00:29.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:00:29.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:00:29.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:00:29.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:00:29.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:00:29.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:00:29.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:00:29.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:00:29.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:00:29.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:29.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:29.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:29.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:30.050 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:00:30.512 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:00:30.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:30.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:30.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:30.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:30.974 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:00:31.436 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:00:31.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:31.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:31.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:31.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:00:32.361 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:00:32.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:32.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:32.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:32.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:32.823 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:00:33.285 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:00:33.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:33.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:33.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:33.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:33.750 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:00:34.213 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:00:34.675 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:00:35.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:00:35.600 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:00:36.063 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:00:36.525 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:00:36.988 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:00:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:00:37.914 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:00:38.377 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:00:38.840 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:00:39.303 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:00:39.766 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:00:40.229 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:00:40.693 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:00:41.156 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:00:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:00:42.082 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:00:42.545 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:00:43.007 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:00:43.470 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:00:43.934 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:00:44.396 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:00:44.859 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:00:45.322 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:00:45.786 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:00:46.248 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:00:46.710 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:00:47.173 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:00:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:00:48.098 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:00:48.561 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:00:49.025 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:00:49.488 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:00:49.951 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:00:50.414 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:00:50.876 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:00:51.339 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:00:51.801 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:00:52.264 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:00:52.727 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:00:53.190 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:00:53.653 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:00:54.116 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:00:54.579 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:00:55.042 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:00:55.505 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:00:55.968 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:00:56.431 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:00:56.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:00:56.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:00:56.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:00:56.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:00:56.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:00:56.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:00:56.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:00:56.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:00:56.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:00:56.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:00:56.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:00:56.660 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:00:56.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:00:56.661 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6172 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:01.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:01.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:01.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:01.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:01.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:01.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:01.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:01.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:01.667 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:01.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:01.667 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:01.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:01.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:01.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:01.668 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:01.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:01.669 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:01.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:01.669 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:01.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:01.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:01.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:01.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:01.671 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:01.671 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:01.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:01.674 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:01.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:01.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:01.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:02.141 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:02.192 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:02.192 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:02.193 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:02.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:02.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:02.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:02.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:02.197 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:02.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:07.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:07.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:07.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:07.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:07.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:07.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:07.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:07.203 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:07.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:07.203 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:07.204 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:07.204 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:07.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:07.205 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:07.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:07.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:07.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:07.209 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:07.209 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:07.209 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:07.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:07.214 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:07.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:07.726 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:07.727 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:07.727 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:07.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:07.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:07.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:07.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:07.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:07.732 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:12.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:12.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:12.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:12.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:12.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:12.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:12.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:12.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:12.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:12.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:12.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:12.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:12.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:12.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:12.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:12.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:12.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:12.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:12.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:12.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:12.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:12.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:12.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:12.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:12.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:12.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:12.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:12.752 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:12.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:12.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:13.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:13.278 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:13.280 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:13.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:13.281 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:13.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:13.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:13.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:13.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:13.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:13.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:13.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:13.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:13.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:13.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:13.288 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:13.288 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:18.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:18.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:18.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:18.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:18.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:18.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:18.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:18.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:18.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:18.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:18.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:18.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:18.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:18.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:18.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:18.305 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:18.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:18.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:18.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:18.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:18.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:18.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:18.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:18.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:18.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:18.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:18.310 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:18.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:18.315 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:18.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:18.834 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:18.836 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:18.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:18.837 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:18.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:18.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:18.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:01:18.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:01:18.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:01:18.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:01:18.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:01:18.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:01:19.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:01:19.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:19.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:19.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:19.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:19.711 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:01:20.177 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:01:20.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:20.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:20.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:20.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:20.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:01:21.106 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:01:21.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:21.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:21.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:21.571 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:01:22.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:01:22.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:22.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:22.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:22.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:22.499 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:01:22.964 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:01:23.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:23.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:23.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:23.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:23.427 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:01:23.892 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:01:24.358 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:01:24.824 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:01:25.289 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:01:25.822 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:01:26.288 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:01:26.753 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:01:26.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:26.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:26.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:26.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:26.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:26.893 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:01:26.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:26.894 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:31.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:31.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:31.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:31.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:31.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:31.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:31.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:31.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:31.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:31.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:31.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:31.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:31.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:31.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:31.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:31.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:31.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:31.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:31.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:31.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:31.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:31.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:31.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:31.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:31.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:31.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:31.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:31.914 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:31.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:31.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:32.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:32.437 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:32.438 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:32.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:32.439 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:32.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:32.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:32.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:01:32.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:01:32.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:01:32.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:01:32.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:01:32.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:01:32.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:01:32.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:32.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:32.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:32.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:33.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:01:33.779 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:01:33.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:33.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:33.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:33.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:34.244 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:01:34.709 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:01:34.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:34.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:34.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:34.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:01:35.639 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:01:35.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:35.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:35.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:35.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:36.104 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:01:36.567 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:01:36.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:36.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:36.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:36.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:01:37.495 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:01:37.958 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:01:38.422 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:01:38.886 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:01:39.349 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:01:39.813 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:01:40.277 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:01:40.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:40.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:40.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:40.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:40.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:40.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:40.480 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:01:40.480 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:40.480 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:40.480 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:40.481 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:40.481 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:40.481 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:40.481 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:45.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:45.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:45.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:45.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:45.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:45.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:45.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:45.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:45.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:45.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:45.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:45.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:45.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:45.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:45.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:45.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:45.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:45.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:45.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:45.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:45.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:45.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:45.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:45.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:45.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:45.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:45.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:45.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:45.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:45.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:45.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:45.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:45.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:45.501 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:45.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:45.506 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:45.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:46.026 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:46.027 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:46.028 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:46.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:46.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:46.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:46.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:01:46.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:01:46.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:01:46.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:01:46.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:01:46.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:01:46.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:01:46.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:46.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:46.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:46.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:01:47.368 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:01:47.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:47.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:47.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:47.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:47.833 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:01:48.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:01:48.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:48.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:48.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:48.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:48.763 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:01:49.229 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:01:49.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:49.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:49.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:49.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:49.694 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:01:50.158 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:01:50.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:50.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:50.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:50.624 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:01:51.089 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:01:51.555 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:01:52.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:01:52.485 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:01:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:01:53.416 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:01:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:01:54.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:54.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:54.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:54.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:54.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:54.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:54.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:54.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:54.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:54.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:54.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:54.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:54.069 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:01:54.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:54.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:54.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:54.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:54.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:54.069 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:01:59.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:01:59.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:01:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:59.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:59.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:59.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:59.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:01:59.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:59.077 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:59.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:01:59.077 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:59.078 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:01:59.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:01:59.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:59.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:01:59.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:01:59.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:01:59.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:01:59.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:01:59.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:59.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:01:59.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:01:59.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:01:59.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:01:59.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:01:59.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:01:59.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:01:59.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:01:59.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:01:59.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:01:59.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:01:59.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:01:59.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:01:59.085 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:01:59.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:01:59.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:01:59.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:01:59.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:01:59.606 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:01:59.607 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:01:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:01:59.608 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:01:59.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:01:59.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:01:59.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:01:59.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:01:59.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:01:59.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:01:59.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:01:59.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:02:00.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:02:00.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:00.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:00.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:00.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:00.485 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:02:00.950 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:02:01.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:01.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:01.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:01.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:01.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:02:01.880 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:02:02.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:02.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:02.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:02.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:02.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:02:02.811 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:02:03.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:03.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:03.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:03.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:03.276 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:02:03.741 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:02:04.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:04.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:04.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:04.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:04.206 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:02:04.672 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:02:05.138 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:02:05.604 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:02:06.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:02:06.535 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:02:07.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:02:07.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:02:07.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:02:07.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:07.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:07.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:07.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:07.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:07.651 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:02:07.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:07.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:07.652 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:07.652 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:07.652 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:07.652 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:07.652 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1879 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:02:12.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:12.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:12.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:12.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:12.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:12.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:12.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:12.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:12.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:12.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:12.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:02:12.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:02:12.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:02:12.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:12.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:12.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:02:12.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:12.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:02:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:12.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:02:12.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:02:12.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:12.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:12.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:12.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:02:12.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:12.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:02:12.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:12.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:12.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:02:12.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:02:12.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:02:12.669 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:12.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:02:13.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:02:13.191 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:02:13.192 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:02:13.193 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:02:13.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:02:13.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:02:13.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:02:13.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:02:13.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:02:13.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:02:13.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:02:13.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:02:13.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:02:13.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:02:13.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:13.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:13.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:13.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:14.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:02:14.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:02:14.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:14.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:14.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:14.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:15.004 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:02:15.471 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:02:15.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:15.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:15.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:15.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:15.936 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:02:16.401 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:02:16.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:16.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:16.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:16.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:16.865 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:02:17.328 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:02:17.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:17.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:17.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:17.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:17.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:02:18.254 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:02:18.718 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:02:19.181 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:02:19.644 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:02:20.106 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:02:20.569 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:02:21.032 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:02:21.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:02:21.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:21.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:21.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:21.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:21.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:21.235 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:02:26.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:26.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:26.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:26.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:26.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:26.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:26.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:26.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:26.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:26.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:26.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:26.243 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:26.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:02:26.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:26.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:26.244 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:02:26.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:26.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:26.245 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:02:26.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:02:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:02:26.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:02:26.247 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:02:26.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:26.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:02:26.715 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:02:26.760 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:02:26.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:02:26.761 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:02:26.762 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:02:26.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:02:26.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:02:26.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:02:26.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:02:26.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:02:26.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:02:26.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:02:26.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:02:27.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:02:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:27.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:27.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:27.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:02:28.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:02:28.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:28.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:28.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:28.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:28.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:02:29.033 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:02:29.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:29.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:29.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:29.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:02:29.960 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:02:30.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:30.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:30.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:30.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:30.424 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:02:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:02:31.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:31.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:31.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:31.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:31.351 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:02:31.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:02:32.277 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:02:32.741 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:02:33.203 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:02:33.666 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:02:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:02:34.592 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:02:35.055 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:02:35.517 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:02:35.980 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:02:36.443 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:02:36.905 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:02:37.368 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:02:37.831 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:02:38.293 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:02:38.756 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:02:39.219 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:02:39.690 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:02:40.161 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:02:40.634 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:02:41.107 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:02:41.578 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:02:42.160 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:02:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:02:42.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:02:42.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:42.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:42.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:42.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:42.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:42.810 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:02:47.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:47.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:47.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:47.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:47.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:47.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:47.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:47.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:47.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:47.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:47.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:47.938 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:47.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:02:47.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:47.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:47.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:02:47.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:47.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:47.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:02:47.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:02:47.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:02:47.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:02:47.942 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:02:47.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:47.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:47.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:47.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:47.943 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:02:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:02:52.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:02:52.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:52.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:52.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:52.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:52.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:02:52.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:52.966 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:52.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:02:52.966 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:02:52.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:02:52.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:02:52.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:52.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:52.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:02:52.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:02:52.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:02:52.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:02:52.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:52.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:02:52.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:02:52.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:52.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:52.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:02:52.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:02:52.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:02:52.971 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:02:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:52.972 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:02:52.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:02:52.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:52.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:02:52.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:02:52.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:02:52.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:02:52.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:02:52.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:52.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:02:52.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:02:52.975 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:02:52.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:02:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:02:52.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:02:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:02:53.503 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:02:53.505 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:02:53.507 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:02:53.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:02:53.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:02:53.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:02:53.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:02:53.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:02:53.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:02:53.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:02:53.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:02:53.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:02:53.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:02:53.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:53.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:53.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:53.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:54.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:02:54.837 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:02:54.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:54.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:54.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:54.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:02:55.774 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:02:55.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:55.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:55.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:55.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:56.238 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:02:56.703 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:02:56.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:56.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:56.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:56.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:57.171 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:02:57.636 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:02:57.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:02:57.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:02:57.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:02:57.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:02:58.100 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:02:58.564 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:02:59.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:02:59.493 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:02:59.958 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:03:00.423 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:03:00.889 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:03:01.352 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:03:01.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:01.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:01.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:01.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:01.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:01.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:01.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:01.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:01.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:01.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:01.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:01.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:01.574 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:01.574 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:01.575 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:01.575 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:01.575 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:01.575 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:01.575 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:01.575 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1886 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:06.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:06.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:06.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:06.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:06.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:06.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:06.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:06.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:06.574 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:06.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:06.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:06.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:06.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:06.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:06.575 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:06.575 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:06.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:06.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:06.575 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:06.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:06.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:06.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:06.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:06.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:06.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:06.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:06.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:06.581 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:06.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:06.585 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:07.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:07.093 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:07.094 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:07.094 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:07.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:07.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:07.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:07.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:07.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:03:07.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:03:07.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:03:07.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:03:07.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:03:07.515 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:03:07.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:07.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:07.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:07.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:07.979 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:03:08.442 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:03:08.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:08.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:08.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:08.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:08.906 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:03:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:03:09.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:09.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:09.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:09.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:09.849 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:03:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:03:10.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:10.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:10.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:10.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:10.790 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:03:11.262 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:03:11.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:11.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:11.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:11.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:11.734 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:03:12.205 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:03:12.676 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:03:13.147 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:03:13.619 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:03:14.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:03:14.563 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:03:15.029 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:03:15.496 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:03:15.961 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:03:16.424 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:03:16.893 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:03:17.356 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:03:17.824 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:03:18.288 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:03:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:03:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:03:19.681 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:03:20.145 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:03:20.610 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:03:21.080 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:03:21.549 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:03:22.015 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:03:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:03:22.945 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:03:23.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:23.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:23.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:23.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:23.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:23.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:23.151 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:28.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:28.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:28.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:28.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:28.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:28.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:28.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:28.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:28.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:28.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:28.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:28.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:28.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:28.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:28.160 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:28.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:28.160 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:28.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:28.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:28.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:28.162 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:28.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:28.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:28.163 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:28.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:28.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:28.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:28.166 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:28.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:28.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:28.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:28.680 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:28.680 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:28.681 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:28.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:28.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:28.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:28.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:28.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:28.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:28.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:28.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:28.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:28.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:28.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:28.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:28.694 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:28.694 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:28.695 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:28.695 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:28.695 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:28.695 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:28.695 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:33.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:33.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:33.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:33.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:33.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:33.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:33.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:33.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:33.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:33.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:33.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:33.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:33.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:33.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:33.703 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:33.703 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:33.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:33.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:33.704 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:33.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:33.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:33.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:33.706 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:33.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:33.711 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:34.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:34.227 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:34.229 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:34.230 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:34.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:34.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:34.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:34.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:34.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:34.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:34.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:34.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:34.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:34.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:34.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:34.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:34.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:34.250 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:34.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:34.251 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:39.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:39.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:39.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:39.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:39.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:39.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:39.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:39.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:39.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:39.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:39.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:39.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:39.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:39.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:39.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:39.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:39.256 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:39.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:39.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:39.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:39.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:39.258 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:39.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:39.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:39.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:39.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:39.769 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:39.769 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:39.770 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:39.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:39.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:39.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:39.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:39.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:39.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:39.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:39.783 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:44.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:44.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:44.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:44.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:44.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:44.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:44.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:44.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:44.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:44.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:44.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:44.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:44.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:44.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:44.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:44.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:44.795 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:44.795 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:44.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:44.797 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:44.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:44.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:44.798 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:44.798 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:44.798 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:44.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:45.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:45.543 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:45.544 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:45.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:45.545 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:45.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:45.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:45.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:45.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:45.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:45.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:45.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:45.560 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:50.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:50.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:50.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:50.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:50.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:50.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:50.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:50.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:50.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:50.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:50.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:50.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:50.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:50.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:50.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:50.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:50.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:50.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:50.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:50.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:50.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:50.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:50.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:50.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:50.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:50.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:50.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:50.570 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:50.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:50.575 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:51.037 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:51.084 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:51.084 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:51.085 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:51.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:51.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:51.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:51.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:51.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:51.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:51.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:51.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:51.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:51.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:51.103 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:51.103 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:03:56.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:56.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:56.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:56.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:56.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:56.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:56.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:56.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:03:56.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:03:56.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:03:56.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:03:56.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:56.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:56.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:56.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:03:56.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:03:56.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:03:56.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:56.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:03:56.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:03:56.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:56.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:03:56.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:03:56.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:56.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:03:56.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:03:56.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:03:56.125 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:03:56.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:03:56.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:03:56.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:03:56.641 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:03:56.642 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:03:56.642 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:03:56.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:03:56.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:56.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:56.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:56.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:03:56.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:03:56.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:03:56.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:03:56.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:03:56.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:03:56.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:03:56.663 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:04:01.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:04:01.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:04:01.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:01.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:01.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:01.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:01.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:01.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:04:01.668 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:01.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:04:01.668 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:04:01.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:04:01.669 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:04:01.669 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:01.669 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:04:01.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:04:01.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:04:01.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:04:01.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:04:01.671 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:01.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:01.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:04:01.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:04:01.671 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:04:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:04:01.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:04:01.672 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:04:01.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:04:01.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:01.677 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:04:02.142 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:04:02.407 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:04:02.407 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:04:02.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:04:02.407 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:04:02.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:04:02.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:04:02.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:04:02.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:04:02.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:04:02.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:04:02.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:04:02.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:04:02.604 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:04:02.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:02.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:02.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:02.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:03.208 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:04:03.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:03.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:03.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:03.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:03.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:04:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:04:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:04.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:04.799 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:04:05.261 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:04:05.724 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:04:05.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:05.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:05.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:05.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:04:06.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:04:06.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:06.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:06.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:06.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:07.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:04:07.576 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:04:08.038 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:04:08.501 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:04:08.964 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:04:09.426 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:04:09.889 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:04:10.352 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:04:10.814 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:04:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:04:11.740 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:04:12.202 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:04:12.665 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:04:13.127 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:04:13.590 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:04:14.053 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:04:14.516 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:04:14.979 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:04:15.441 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:04:15.904 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:04:16.366 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:04:16.828 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:04:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:04:17.754 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:04:18.216 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:04:18.678 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:04:19.141 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:04:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:04:20.066 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:04:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:04:20.990 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:04:21.453 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:04:21.915 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:04:22.377 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:04:22.840 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:04:23.302 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:04:23.765 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:04:24.227 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:04:24.689 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:04:25.151 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:04:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:04:26.076 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:04:26.539 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:04:27.002 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:04:27.464 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:04:27.929 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:04:28.393 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:04:28.857 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:04:29.322 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:04:29.789 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:04:30.254 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:04:30.718 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:04:31.181 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:04:31.645 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:04:32.108 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:04:32.571 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:04:33.036 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:04:33.500 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:04:33.964 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:04:34.427 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:04:35.039 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:04:35.501 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:04:35.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:04:35.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:04:35.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:35.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:04:35.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:04:35.690 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:04:35.690 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:35.690 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:35.690 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:35.691 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:35.691 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:35.691 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:35.691 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=7387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:40.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:04:40.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:04:40.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:40.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:40.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:40.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:40.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:40.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:04:40.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:40.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:04:40.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:04:40.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:04:40.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:04:40.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:40.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:04:40.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:04:40.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:04:40.703 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:40.703 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:04:40.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:40.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:04:40.703 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:04:40.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:04:40.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:04:40.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:04:40.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:04:40.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:04:40.708 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:04:40.708 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:40.712 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:04:41.176 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:04:41.239 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:04:41.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:04:41.243 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:04:41.244 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:04:41.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:04:41.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:41.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:41.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:41.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:42.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:04:42.567 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:04:42.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:42.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:42.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:42.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:43.031 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:04:43.495 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:04:43.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:43.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:43.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:43.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:43.958 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:04:44.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:44.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:44.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:44.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:04:44.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:04:44.258 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:04:49.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:04:49.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:04:49.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:49.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:49.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:49.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:49.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:49.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:04:49.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:49.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:04:49.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:04:49.265 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:04:49.265 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:04:49.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:04:49.266 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:04:49.266 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:04:49.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:04:49.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:04:49.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:04:49.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:49.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:04:49.269 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:04:49.269 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:04:49.269 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:04:49.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:04:49.741 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:04:49.797 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:04:49.799 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:04:49.799 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:04:49.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:04:50.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:04:50.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:50.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:50.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:50.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:50.668 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:04:51.132 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:04:51.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:51.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:51.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:51.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:51.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:04:52.059 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:04:52.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:52.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:52.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:52.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:52.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:04:52.986 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:04:53.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:53.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:53.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:53.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:53.450 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:04:53.913 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:04:54.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:54.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:54.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:54.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:54.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:04:54.840 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:04:55.304 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:04:55.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:04:55.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:04:55.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:04:55.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:04:55.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:04:55.811 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:04:55.811 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1439 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:04:55.812 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:00.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:00.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:00.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:00.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:00.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:00.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:00.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:00.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:00.815 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:00.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:00.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:00.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:00.815 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:00.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:00.815 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:00.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:00.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:00.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:00.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:00.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:00.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:00.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:00.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:00.817 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:00.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:00.817 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:00.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:00.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:00.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:00.818 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:00.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:00.818 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:00.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:00.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:00.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:00.818 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:00.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.819 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:00.819 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:00.819 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:00.819 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:00.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:00.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:00.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:00.821 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:05.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:05.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:05.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:05.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:05.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:05.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:05.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:05.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:05.838 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:05.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:05.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:05.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:05.840 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:05.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:05.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:05.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:05.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:05.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:05.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:05.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:05.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:05.843 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:05.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:05.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:05.845 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:05.845 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:05.845 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:05.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:05.845 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:05.845 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:05.845 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:05.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:05.847 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:05.847 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:05.847 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:05.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:05.852 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:05:06.319 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:05:06.360 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:05:06.361 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:05:06.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:06.361 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:05:06.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:05:06.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:06.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:06.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:06.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:07.245 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:05:07.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:05:07.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:07.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:07.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:07.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:08.171 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:05:08.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:05:08.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:08.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:08.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:08.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:09.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:05:09.558 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:05:09.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:09.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:09.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:09.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:10.021 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:05:10.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:05:10.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:10.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:10.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:10.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:10.947 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:05:11.409 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:05:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:05:12.333 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:12.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:12.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:12.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:12.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:12.370 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:12.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:17.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:17.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:17.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:17.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:17.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:17.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:17.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:17.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:17.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:17.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:17.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:17.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:17.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:17.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:17.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:17.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:17.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:17.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:17.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:17.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:17.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:17.380 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:17.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:17.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:05:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:05:17.894 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:05:17.894 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:05:17.894 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:05:17.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:18.309 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:05:18.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:18.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:18.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:18.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:18.772 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:05:19.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:05:19.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:19.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:19.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:19.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:19.697 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:05:20.159 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:05:20.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:20.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:20.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:20.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:20.621 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:05:21.084 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:05:21.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:21.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:21.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:21.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:21.547 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:05:22.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:05:22.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:22.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:22.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:22.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:22.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:05:22.936 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:05:23.399 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:05:23.863 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:23.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:23.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:23.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:23.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:23.898 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:23.898 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1438 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:28.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:28.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:28.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:28.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:28.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:28.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:28.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:28.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:28.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:28.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:28.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:28.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:28.904 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:28.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:28.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:28.905 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:28.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:28.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:28.906 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:28.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:28.908 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:28.908 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:28.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:05:29.376 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:05:29.422 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:05:29.422 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:05:29.423 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:05:29.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:29.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:05:29.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:29.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:29.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:29.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:30.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:05:30.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:05:30.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:31.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:31.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:31.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:31.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:05:31.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:05:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:32.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:32.425 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:05:32.888 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:05:33.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:33.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:33.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:33.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:33.351 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:05:33.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:33.813 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:05:34.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:34.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:34.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:34.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:34.276 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:05:34.738 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:05:35.201 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:05:35.664 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:05:36.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:05:36.593 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:05:37.057 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:37.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:37.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:37.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:37.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:37.430 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:42.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:42.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:42.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:42.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:42.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:42.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:42.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:42.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:42.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:42.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:42.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:42.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:42.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:42.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:42.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:42.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:42.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:42.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:42.438 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:42.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:42.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:42.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:42.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:42.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:42.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:42.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:42.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:42.440 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:42.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:42.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:42.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:05:42.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:05:42.954 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:05:42.955 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:05:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:42.955 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:05:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:05:43.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:43.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:43.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:43.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:43.831 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:05:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:05:44.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:44.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:44.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:44.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:44.756 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:05:45.218 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:05:45.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:45.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:45.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:45.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:05:46.143 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:05:46.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:46.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:46.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:46.605 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:05:46.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:46.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:46.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:46.959 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:46.960 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=997 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:51.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:51.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:51.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:51.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:51.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:51.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:51.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:51.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:51.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:51.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:51.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:51.966 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:51.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:51.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:51.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:51.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:51.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:51.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:51.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:51.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:51.972 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:51.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:51.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:51.977 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:05:52.439 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:05:52.485 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:05:52.485 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:05:52.486 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:05:52.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:52.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:52.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:52.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:52.489 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:57.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:57.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:57.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:57.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:57.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:57.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:57.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:57.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:57.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:57.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:05:57.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:57.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:05:57.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:05:57.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:57.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:05:57.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:05:57.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:57.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:05:57.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:05:57.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:57.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:05:57.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:57.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:05:57.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:05:57.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:05:57.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:05:57.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:05:57.505 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:05:57.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:05:57.509 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:05:57.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:05:58.135 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:05:58.136 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:05:58.136 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:05:58.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:58.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:05:58.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:05:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:05:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:05:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:05:58.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:05:58.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:05:58.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:05:58.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:05:58.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:05:58.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:05:58.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:05:58.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.156 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:05:58.157 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:03.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:03.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:03.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:03.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:03.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:03.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:03.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:03.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:03.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:03.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:03.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:03.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:06:03.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:03.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:03.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:06:03.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:03.159 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:03.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:06:03.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:03.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:06:03.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:06:03.161 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:06:03.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:03.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:06:03.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:06:03.681 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:06:03.682 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:06:03.682 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:06:03.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:03.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:03.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:03.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:03.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:03.686 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:03.686 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:06:08.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:08.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:08.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:08.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:08.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:08.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:08.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:08.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:08.691 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:08.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:08.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:08.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:08.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:06:08.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:08.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:08.693 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:06:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:08.694 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:08.694 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:06:08.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:08.695 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:06:08.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:06:08.696 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:06:08.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:08.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:06:09.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:06:09.210 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:06:09.211 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:06:09.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:09.211 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:06:09.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:09.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:09.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:06:09.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:09.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:06:09.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:06:09.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:06:09.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:06:09.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:06:09.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:09.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:09.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:09.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:10.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:06:10.551 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:06:10.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:10.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:10.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:10.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:11.013 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:06:11.476 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:06:11.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:11.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:11.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:11.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:11.939 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:06:12.256 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:06:12.256 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:06:12.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:12.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:12.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:12.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:12.307 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:06:12.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:12.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:12.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:12.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:12.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:12.309 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:06:17.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:17.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:17.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:17.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:17.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:17.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:17.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:17.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:17.662 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:17.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:17.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:17.664 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:17.664 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:06:17.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:17.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:06:17.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:06:17.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:17.665 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:17.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:06:17.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:17.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:17.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:06:17.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:17.667 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:17.667 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:06:17.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:17.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:06:17.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:06:17.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:06:17.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:06:17.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:06:17.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:06:17.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:06:17.670 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:06:17.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:17.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:17.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:06:18.137 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:06:18.182 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:06:18.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:18.183 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:06:18.183 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:06:18.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:18.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:06:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:18.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:06:18.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:06:18.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:06:18.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:06:18.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:06:18.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:18.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:18.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:18.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:19.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:06:19.526 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:06:19.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:19.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:19.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:19.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:19.988 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:06:20.451 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:06:20.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:20.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:20.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:20.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:20.915 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:06:21.230 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:06:21.230 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:06:21.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:21.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:21.378 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:06:21.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:21.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:21.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:21.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:21.840 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:06:21.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:21.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:21.848 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:06:21.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:21.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:21.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:21.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:21.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:21.851 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:06:26.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:26.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:26.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:26.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:26.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:26.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:26.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:26.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:26.856 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:26.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:26.856 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:26.857 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:26.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:06:26.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:26.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:26.858 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:06:26.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:26.859 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:26.859 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:06:26.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:26.860 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:06:26.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:06:26.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:06:26.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:06:26.860 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:06:26.861 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:06:26.861 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:06:26.861 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:26.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:26.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:26.866 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:06:27.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:06:27.374 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:06:27.374 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:06:27.375 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:06:27.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:27.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:27.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:27.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:06:27.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:27.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:06:27.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:06:27.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:06:27.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:06:27.790 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:06:27.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:27.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:27.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:27.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:28.253 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:06:28.715 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:06:28.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:28.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:28.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:28.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:29.178 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:06:29.640 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:06:29.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:29.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:29.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:29.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:30.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:06:30.421 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:06:30.421 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:06:30.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:30.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:30.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:06:30.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:30.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:30.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:30.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:31.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:06:31.491 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:06:31.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:31.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:31.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:31.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:31.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:06:32.416 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:06:32.895 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:06:33.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:06:33.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:06:34.284 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:06:34.747 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:06:35.209 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:06:35.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:35.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:35.422 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:06:35.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:35.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:35.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:35.426 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:06:40.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:40.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:40.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:40.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:40.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:40.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:40.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:40.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:40.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:40.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:40.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:40.433 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:40.433 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:06:40.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:40.434 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:40.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:06:40.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:40.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:40.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:06:40.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:40.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:06:40.437 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:06:40.437 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:06:40.437 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:40.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:06:40.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:06:40.950 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:06:40.951 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:06:40.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:40.951 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:06:40.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:40.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:40.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:06:40.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:40.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:06:40.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:06:40.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:06:40.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:06:41.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:06:41.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:41.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:41.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:41.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:41.829 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:06:42.291 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:06:42.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:42.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:42.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:42.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:42.754 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:06:43.216 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:06:43.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:43.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:43.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:43.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:43.679 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:06:43.996 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:06:43.996 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:06:43.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:43.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:44.141 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:06:44.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:44.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:44.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:44.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:44.604 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:06:45.066 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:06:45.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:45.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:45.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:45.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:45.529 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:06:45.991 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:06:46.454 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:06:46.916 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:06:47.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:06:47.843 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:06:48.504 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:06:48.967 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:06:48.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:48.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:48.997 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:06:48.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:49.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:49.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:49.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:49.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:49.007 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:06:54.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:06:54.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:06:54.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:54.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:54.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:54.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:54.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:06:54.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:54.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:54.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:06:54.012 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:54.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:06:54.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:06:54.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:54.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:06:54.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:06:54.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:54.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:06:54.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:06:54.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:06:54.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:06:54.018 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:06:54.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:06:54.023 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:06:54.485 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:06:54.532 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:06:54.532 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:06:54.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:06:54.533 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:06:54.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:06:54.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:06:54.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:06:54.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:54.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:06:54.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:06:54.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:06:54.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:06:54.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:06:55.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:55.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:55.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:55.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:55.411 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:06:55.874 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:06:56.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:56.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:56.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:56.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:56.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:06:56.798 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:06:57.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:57.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:57.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:57.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:57.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:06:57.578 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:06:57.578 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:06:57.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:57.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:06:57.723 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:06:58.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:58.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:58.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:58.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:58.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:06:58.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:06:59.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:06:59.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:06:59.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:06:59.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:06:59.111 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:06:59.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:07:00.036 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:07:00.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:07:00.962 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:07:01.425 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:07:01.887 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:07:02.350 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:07:02.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:02.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:02.579 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:07:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:02.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:02.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:02.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:02.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:02.584 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:07.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:07.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:07.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:07.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:07.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:07.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:07.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:07.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:07.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:07.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:07.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:07.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:07.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:07.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:07.597 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:07.597 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:07.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:07.598 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:07.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:07.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:07.598 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:07.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:07.598 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:07.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:07.598 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:07.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:07.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:07.600 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:07.601 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:07.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:08.071 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:08.113 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:08.113 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:08.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:08.114 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:08.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:08.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:08.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:08.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:08.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:08.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:08.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:08.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:08.159 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:07:08.159 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:07:08.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:08.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:08.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:07:08.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:08.997 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:07:09.460 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:07:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:09.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:09.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:07:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:07:10.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:10.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:10.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:10.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:10.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:07:11.310 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:07:11.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:11.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:11.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:11.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:11.773 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:07:12.235 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:07:12.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:12.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:12.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:12.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:12.698 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:07:13.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:13.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:13.159 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:07:13.160 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:13.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:13.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:13.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:13.163 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:13.163 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:07:18.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:18.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:18.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:18.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:18.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:18.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:18.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:18.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:18.171 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:18.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:18.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:18.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:18.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:18.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:18.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:18.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:18.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:18.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:18.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:18.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:18.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:18.177 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:18.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:18.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:18.647 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:18.689 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:18.690 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:18.690 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:18.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:18.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:18.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:18.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:18.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:18.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:18.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:18.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:18.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:19.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:07:19.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:19.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:19.572 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:07:20.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:07:20.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:20.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:20.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:20.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:20.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:07:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:07:21.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:21.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:21.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:21.424 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:07:21.740 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:07:21.740 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:07:21.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:21.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:07:22.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:22.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:22.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:22.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:22.351 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:07:22.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:07:23.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:23.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:23.279 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:07:23.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:23.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:23.741 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:07:23.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:23.743 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:23.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:23.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:23.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:23.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:23.745 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:28.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:28.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:28.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:28.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:28.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:28.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:28.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:28.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:28.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:28.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:28.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:28.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:28.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:28.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:28.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:28.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:28.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:28.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:28.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:28.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:28.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:28.758 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:28.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:28.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:29.228 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:29.271 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:29.272 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:29.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:29.273 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:29.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:29.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:29.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:29.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:29.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:29.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:29.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:29.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:29.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:07:29.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:29.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:29.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:29.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:30.155 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:07:30.620 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:07:30.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:30.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:30.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:30.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:31.083 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:07:31.545 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:07:31.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:31.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:31.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:31.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:32.009 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:07:32.472 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:07:32.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:32.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:32.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:32.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:32.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:32.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:32.504 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:37.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:37.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:37.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:37.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:37.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:37.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:37.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:37.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:37.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:37.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:37.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:37.511 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:37.511 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:37.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:37.512 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:37.512 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:37.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:37.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:37.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:37.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:37.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:37.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:37.515 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:37.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:37.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:37.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:38.028 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:38.028 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:38.029 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:38.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:38.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:38.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:38.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:38.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:38.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:38.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:38.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:38.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:38.447 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:07:38.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:38.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:38.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:38.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:38.912 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:07:39.376 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:07:39.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:39.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:39.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:39.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:39.839 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:07:40.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:07:40.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:40.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:40.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:40.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:40.766 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:07:41.230 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:07:41.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:41.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:41.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:41.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:41.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:41.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:41.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:41.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:41.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:41.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:41.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:41.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:41.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:41.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:41.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:41.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:41.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:41.545 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:46.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:46.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:46.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:46.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:46.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:46.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:46.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:46.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:46.550 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:46.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:46.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:46.551 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:46.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:46.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:46.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:46.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:46.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:46.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:46.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:46.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:46.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:46.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:46.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:46.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:46.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:46.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:46.558 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:46.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:46.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:47.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:47.089 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:47.089 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:47.089 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:47.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:47.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:47.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:47.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:47.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:47.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:47.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:47.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:47.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:47.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:47.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:47.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:47.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:47.370 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:52.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:52.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:52.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:52.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:52.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:52.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:52.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:52.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:52.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:52.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:52.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:52.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:52.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:52.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:52.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:52.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:52.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:52.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:52.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:52.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:52.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:52.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:52.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:52.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:52.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:52.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:52.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:52.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:52.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:52.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:52.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:52.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:52.380 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:52.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:52.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:52.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:52.894 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:52.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:52.895 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:52.895 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:52.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:52.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:52.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:52.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:52.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:52.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:52.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:52.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:53.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:53.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:53.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:53.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:53.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:53.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:53.120 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:07:58.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:07:58.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:07:58.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:58.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:58.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:58.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:58.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:07:58.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:58.126 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:58.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:07:58.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:07:58.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:07:58.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:07:58.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:58.127 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:58.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:07:58.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:07:58.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:07:58.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:07:58.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:58.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:07:58.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:07:58.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:58.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:07:58.130 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:07:58.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:07:58.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:07:58.133 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:07:58.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:07:58.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:07:58.137 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:07:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:07:58.653 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:07:58.654 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:07:58.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:07:58.655 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:07:58.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:07:58.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:07:58.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:07:58.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:07:58.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:07:58.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:07:58.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:07:58.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:07:59.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:07:59.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:07:59.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:07:59.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:07:59.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:07:59.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:08:00.004 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:08:00.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:00.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:00.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:00.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:00.470 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:08:00.935 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:08:01.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:01.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:01.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:01.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:01.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:08:01.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:08:02.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:02.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:02.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:02.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:08:02.824 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:08:03.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:03.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:03.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:03.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:03.287 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:08:03.750 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:08:04.213 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:08:04.676 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:08:05.140 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:08:05.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:08:06.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:08:06.532 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:08:06.995 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:08:07.544 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:08:07.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:08:07.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:08:07.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:07.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:07.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:07.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:07.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:07.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:07.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:07.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:07.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:07.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:07.762 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:08:07.762 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.762 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.762 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.762 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.762 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.762 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2088 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:07.763 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2089 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:12.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:12.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:12.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:12.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:12.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:12.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:12.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:12.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:12.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:12.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:12.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:12.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:12.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:08:12.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:12.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:12.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:08:12.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:12.766 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:12.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:08:12.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:08:12.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:08:12.768 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:08:12.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:12.772 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:08:13.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:08:13.296 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:08:13.298 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:08:13.299 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:08:13.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:13.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:08:13.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:08:13.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:08:13.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:08:13.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:08:13.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:08:13.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:08:13.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:08:13.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:08:13.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:13.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:13.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:13.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:14.175 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:08:14.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:08:14.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:15.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:15.644 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:08:16.109 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:08:16.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:16.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:16.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:16.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:16.572 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:08:17.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:08:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:17.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:17.498 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:08:17.962 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:08:18.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:18.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:18.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:18.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:18.427 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:08:18.891 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:08:19.353 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:08:19.818 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:08:20.282 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:08:20.745 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:08:21.210 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:08:21.674 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:08:22.137 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:08:22.600 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:08:22.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:08:22.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:08:22.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:22.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:22.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:22.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:22.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:22.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:22.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:22.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:22.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:22.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:22.667 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:08:27.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:27.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:27.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:27.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:27.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:27.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:27.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:27.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:27.673 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:27.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:27.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:27.674 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:27.674 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:08:27.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:27.675 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:27.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:08:27.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:27.676 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:27.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:08:27.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:08:27.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:08:27.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:08:27.678 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:08:27.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:27.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:27.682 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:08:28.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:08:28.193 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:08:28.193 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:08:28.197 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:08:28.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:28.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:08:28.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:08:28.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:08:28.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:08:28.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:08:28.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:08:28.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:08:28.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:08:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:08:28.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:28.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:28.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:28.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:29.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:08:29.540 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:08:29.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:29.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:29.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:29.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:30.003 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:08:30.466 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:08:30.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:30.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:30.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:30.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:30.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:08:31.270 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:08:31.270 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-07 03:08:31.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:08:31.270 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:08:31.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:08:31.396 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:08:31.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:31.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:31.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:31.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:31.862 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:08:32.401 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:08:32.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:33.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:33.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:33.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:33.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:08:33.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:08:33.625 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:08:33.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:33.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:33.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:33.627 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:08:38.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:38.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:38.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:38.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:38.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:38.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:38.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:38.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:38.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:38.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:38.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:38.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:38.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:08:38.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:38.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:38.635 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:38.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:08:38.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:08:38.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:38.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:38.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:38.636 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:08:38.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:38.636 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:08:38.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:08:38.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:08:38.637 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:08:38.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:38.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:08:39.107 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:08:39.164 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:08:39.166 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:08:39.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:39.168 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:08:39.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:39.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:39.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:39.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:39.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:39.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:39.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:39.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:39.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:39.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:39.215 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:39.215 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:08:44.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:44.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:44.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:44.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:44.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:44.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:44.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:44.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:44.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:44.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:44.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:08:44.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:08:44.241 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:08:44.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:44.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:44.242 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:08:44.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:44.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:44.242 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:08:44.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:44.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:08:44.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:08:44.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:44.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:44.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:44.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:08:44.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:44.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:08:44.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:44.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:08:44.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:08:44.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:44.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:44.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:44.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:08:44.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:44.253 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:08:44.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:08:44.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:08:44.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:08:44.258 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:08:44.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:08:44.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:44.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:44.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:08:44.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:08:44.775 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:08:44.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:44.775 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:08:44.776 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:08:45.193 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:08:45.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:45.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:45.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:45.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:45.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:08:46.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:08:46.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:46.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:46.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:46.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:08:47.046 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:08:47.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:47.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:47.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:47.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:47.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:08:47.971 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:08:48.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:48.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:48.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:48.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:48.434 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:08:48.898 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:08:49.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:49.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:49.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:49.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:49.361 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:08:49.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:08:50.285 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:08:50.748 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:08:51.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:08:51.673 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:08:52.135 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:08:52.597 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:08:53.060 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:08:53.522 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:08:53.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:53.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:53.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:53.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:53.794 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:08:58.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:08:58.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:08:58.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:58.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:58.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:58.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:58.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:08:58.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:58.800 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:58.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:08:58.800 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:08:58.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:58.801 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:08:58.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:08:58.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:58.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:08:58.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:08:58.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:58.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:08:58.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:08:58.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:08:58.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:08:58.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:08:58.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:08:58.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:08:58.804 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:08:58.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:08:58.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:08:59.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:08:59.316 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:08:59.317 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:08:59.317 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:08:59.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:08:59.737 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:08:59.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:08:59.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:08:59.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:08:59.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:00.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:09:00.663 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:09:00.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:00.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:00.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:01.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:09:01.588 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:09:01.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:01.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:01.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:01.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:02.052 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:09:02.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:09:02.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:02.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:02.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:02.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:02.978 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:09:03.441 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:09:03.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:03.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:03.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:03.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:03.903 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:09:04.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:09:04.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:09:05.290 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:09:05.752 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:09:06.215 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:09:06.677 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:09:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:09:07.601 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:09:08.063 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:09:08.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:08.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:08.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:08.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:08.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:08.333 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:13.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:13.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:13.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:13.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:13.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:13.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:13.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:13.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:13.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:13.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:13.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:13.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:13.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:13.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:13.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:13.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:13.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:13.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:13.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:13.341 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:13.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:13.341 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:13.341 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:13.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:13.341 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:13.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:13.341 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:13.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:13.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:13.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:13.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:13.343 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:13.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:13.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:13.348 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:09:13.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:09:13.855 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:09:13.856 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:09:13.857 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:09:13.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:09:14.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:14.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:14.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:14.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:14.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:09:15.200 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:09:15.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:15.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:15.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:15.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:15.662 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:09:16.125 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:09:16.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:16.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:16.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:16.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:16.587 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:09:16.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:16.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:16.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:16.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:16.879 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:16.880 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:21.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:21.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:21.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:21.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:21.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:21.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:21.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:21.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:21.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:21.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:21.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:21.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:21.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:21.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:21.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:21.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:21.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:21.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:21.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:21.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:21.889 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:21.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:21.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:09:22.356 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:09:22.404 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:09:22.404 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:09:22.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:22.405 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:09:22.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:09:22.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:09:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:09:22.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:09:22.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:09:22.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:09:22.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:09:22.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:09:22.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:22.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:09:22.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:09:22.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:09:22.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:09:22.819 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:09:22.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:22.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:09:22.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:09:22.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:22.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:22.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:22.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:22.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:22.827 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:22.827 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:27.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:27.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:27.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:27.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:27.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:27.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:27.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:27.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:27.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:27.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:27.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:27.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:27.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:27.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:27.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:27.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:27.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:27.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:27.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:27.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:27.835 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:27.835 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:27.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:27.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:27.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:27.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:27.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:27.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:27.837 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:27.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:27.837 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:27.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:27.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:27.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:27.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:27.838 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:27.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:27.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:27.839 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:27.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:27.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:27.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:09:28.307 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:09:28.469 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:09:28.470 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:09:28.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:28.471 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:28.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:28.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:28.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:28.475 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:28.475 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:09:33.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:33.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:33.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:33.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:33.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:33.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:33.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:33.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:33.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:33.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:33.484 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:33.485 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:33.485 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:33.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:33.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:33.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:33.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:33.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:33.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:33.487 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:33.487 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:33.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:33.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:33.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:33.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:33.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:33.488 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:33.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:33.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:33.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:33.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:33.492 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:33.492 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:33.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:09:33.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:09:34.006 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:09:34.006 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:09:34.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:34.007 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:09:34.423 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:09:34.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:34.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:34.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:34.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:34.885 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:09:35.348 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:09:35.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:35.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:35.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:35.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:35.810 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:36.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:36.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:36.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:36.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:36.013 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:41.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:42.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:42.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:42.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:42.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:42.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:42.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:42.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:42.349 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:42.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:42.349 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:42.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:42.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:42.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:42.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:42.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:42.351 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:42.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:42.351 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:42.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:42.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:42.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:42.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:42.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:42.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:42.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:42.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:42.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:42.357 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:42.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:42.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:42.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:42.360 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:42.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:42.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:42.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:42.361 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:47.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:47.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:47.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:47.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:47.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:47.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:47.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:47.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:47.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:47.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:47.369 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:47.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:47.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:47.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:47.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:47.370 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:47.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:47.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:47.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:47.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:47.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:47.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:47.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:47.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:47.373 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:47.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:47.376 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:47.376 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:47.376 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:47.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:47.380 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:09:47.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:09:47.890 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:09:47.891 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:09:47.891 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:09:47.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:09:47.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:09:47.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:09:47.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:09:47.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:09:47.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:09:47.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:09:47.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:09:47.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:09:48.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:48.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:48.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:48.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:09:49.231 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:09:49.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:49.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:49.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:49.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:49.694 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:09:50.156 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:09:50.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:50.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:50.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:50.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:50.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:09:50.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:09:50.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:50.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:50.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:50.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:50.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:50.635 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:09:55.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:55.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:55.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:55.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:55.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:55.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:55.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:55.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:55.642 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:55.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:09:55.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:55.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:09:55.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:09:55.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:55.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:09:55.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:09:55.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:55.644 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:55.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:55.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:09:55.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:09:55.644 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:55.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:09:55.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:09:55.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:09:55.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:09:55.647 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:09:55.647 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:09:55.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:09:55.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:09:55.652 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:09:56.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:09:56.165 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:09:56.166 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:09:56.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:09:56.167 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:09:56.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:09:56.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:09:56.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:09:56.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:09:56.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:09:56.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:09:56.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:09:56.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:09:56.577 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:09:56.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:56.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:56.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:56.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:57.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:09:57.504 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:09:57.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:57.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:57.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:57.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:57.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:09:58.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:09:58.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:09:58.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:09:58.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:09:58.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:09:58.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:09:58.415 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:03.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:03.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:03.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:03.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:03.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:03.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:03.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:03.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:03.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:03.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:03.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:03.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:03.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:03.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:03.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:03.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:03.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:03.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:03.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:03.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:03.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:03.425 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:03.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:03.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:03.426 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:03.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:08.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:08.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:08.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:08.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:08.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:08.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:08.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:08.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:08.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:08.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:08.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:08.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:08.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:08.435 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:08.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:08.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:08.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:08.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:08.436 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:08.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:08.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:08.437 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:08.437 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:08.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:08.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:08.439 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:08.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:08.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:10:08.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:10:08.954 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:10:08.954 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:10:08.955 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:10:08.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:08.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:08.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:08.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:10:08.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:10:08.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:10:08.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:10:08.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:10:08.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:10:09.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:10:09.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:09.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:09.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:09.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:09.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:10:10.298 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:10:10.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:10.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:10.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:10:11.226 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:10:11.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:11.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:11.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:11.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:11.689 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:10:11.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:11.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:11.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:11.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:11.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:11.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:11.704 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:16.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:16.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:16.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:16.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:16.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:16.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:16.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:16.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:16.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:16.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:16.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:16.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:16.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:16.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:16.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:16.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:16.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:16.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:16.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:16.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:16.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:16.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:16.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:16.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:16.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:16.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:16.715 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:16.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:16.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:16.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:10:17.183 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:10:17.286 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:10:17.289 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:10:17.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:17.293 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:10:17.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:17.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:17.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:10:17.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:10:17.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:10:17.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:10:17.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:10:17.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:10:17.647 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:10:17.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:17.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:17.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:17.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:18.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:10:18.574 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:10:18.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:18.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:18.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:18.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:19.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:10:19.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:10:19.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:19.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:19.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:19.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:19.964 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:10:20.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:20.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:20.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:20.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:20.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:20.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:20.215 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:25.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:25.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:25.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:25.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:25.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:25.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:25.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:25.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:25.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:25.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:25.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:25.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:25.222 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:25.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:25.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:25.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:25.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:25.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:25.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:25.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:25.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:25.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:25.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:25.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:25.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:25.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:25.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:25.227 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:25.227 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:25.227 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:25.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:25.232 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:10:25.695 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:10:25.741 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:10:25.741 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:10:25.742 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:10:25.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:25.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:25.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:25.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:10:25.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:10:25.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:10:25.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:10:25.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:10:25.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:10:26.158 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:10:26.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:26.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:26.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:26.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:26.620 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:10:27.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:10:27.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:27.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:27.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:27.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:27.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:10:28.012 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:10:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:28.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:28.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:28.476 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:10:28.942 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:10:29.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:29.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:29.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:29.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:29.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:10:29.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:29.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:29.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:29.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:29.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:29.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:29.419 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:34.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:34.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:34.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:34.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:34.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:34.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:34.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:34.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:34.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:34.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:34.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:34.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:34.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:34.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:34.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:34.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:34.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:34.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:34.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:34.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:34.445 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:34.445 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:34.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:34.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:34.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:34.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:34.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:34.450 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:34.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:10:34.919 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:10:34.980 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:10:34.982 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:10:34.983 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:10:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:34.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:34.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:34.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:10:34.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:10:34.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:10:34.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:10:34.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:10:34.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:10:35.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:10:35.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:35.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:35.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:35.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:35.849 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:10:36.313 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:10:36.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:36.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:36.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:36.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:36.777 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:10:37.240 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:10:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:37.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:37.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:37.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:37.704 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:10:38.167 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:10:38.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:38.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:38.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:38.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:38.630 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:10:38.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:38.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:38.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:38.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:38.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:38.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:38.879 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:43.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:43.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:43.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:43.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:43.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:43.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:43.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:43.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:43.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:43.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:43.904 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:43.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:43.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:43.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:43.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:43.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:43.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:43.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:43.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:43.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:43.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:43.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:43.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:43.910 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:43.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:43.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:43.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:43.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:43.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:43.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:43.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:43.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:43.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:43.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:43.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:43.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:43.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:43.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:43.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:43.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:43.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:43.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:43.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:43.922 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:43.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:43.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:10:44.398 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:10:44.463 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:10:44.465 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:10:44.467 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:10:44.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:44.865 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:10:44.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:44.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:44.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:44.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:45.329 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:10:45.793 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:10:45.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:45.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:45.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:45.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:46.256 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:10:46.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:46.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:46.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:46.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:46.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:46.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:46.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:46.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:46.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:46.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:46.484 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.484 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.485 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.485 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.485 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.485 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:46.485 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:10:51.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:51.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:51.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:51.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:51.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:51.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:51.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:51.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:51.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:51.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:10:51.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:10:51.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:10:51.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:10:51.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:51.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:51.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:51.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:10:51.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:10:51.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:10:51.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:51.500 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:10:51.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:10:51.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:51.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:51.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:51.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:10:51.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:10:51.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:10:51.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:51.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:10:51.503 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:10:51.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:51.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:10:51.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:51.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:10:51.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:10:51.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:10:51.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:10:51.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:10:51.507 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:10:51.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:51.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:10:51.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:10:52.039 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:10:52.041 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:10:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:52.044 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:10:52.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:10:52.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:10:52.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:10:52.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:10:52.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:52.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:10:52.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:52.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:52.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:52.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:52.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:10:53.371 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:10:53.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:53.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:53.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:53.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:53.835 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:10:54.297 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:10:54.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:54.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:54.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:54.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:54.763 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:10:55.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:10:55.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:10:55.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:10:55.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:10:55.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:10:55.109 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:00.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:00.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:00.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:00.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:00.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:00.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:00.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:00.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:00.127 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:00.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:00.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:00.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:00.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:00.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:00.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:00.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:00.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:00.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:00.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:00.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:00.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:00.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:00.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:00.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:00.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:00.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:00.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:00.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:00.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:00.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:00.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:00.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:00.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:00.134 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:00.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:00.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:00.610 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:00.649 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:00.650 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:00.650 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:00.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:00.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:00.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:00.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:11:00.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:00.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:00.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:00.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:00.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:00.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:00.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:00.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:00.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:00.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:00.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:00.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:00.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:00.679 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:00.680 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:00.680 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:00.680 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:00.680 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:00.680 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:00.680 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:05.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:05.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:05.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:05.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:05.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:05.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:05.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:05.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:05.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:05.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:05.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:05.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:05.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:05.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:05.706 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:05.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:05.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:05.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:05.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:05.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:05.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:05.708 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:05.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:05.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:05.710 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:05.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:05.710 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:05.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:05.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:05.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:05.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:05.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:05.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:05.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:05.713 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:05.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:05.718 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:06.242 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:06.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:06.243 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:06.244 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:06.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:06.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:06.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:11:06.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:06.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:06.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:11:06.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:06.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:06.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:06.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:07.113 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:11:07.577 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:11:07.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:07.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:07.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:07.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:08.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:11:08.503 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:11:08.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:08.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:08.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:08.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:08.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:11:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:09.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:09.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:09.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:09.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:09.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:09.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:09.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:09.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:09.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:09.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:09.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:09.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.285 [WARNING] transceiver.py:257 (TRX1@172.18.188.20:5700/1) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:09.286 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:14.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:14.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:14.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:14.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:14.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:14.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:14.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:14.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:14.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:14.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:14.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:14.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:14.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:14.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:14.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:14.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:14.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:14.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:14.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:14.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:14.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:14.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:14.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:14.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:14.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:14.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:14.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:14.296 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:14.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:14.770 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:14.905 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:14.906 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:14.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:14.907 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:14.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:14.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:14.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:11:14.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:14.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:14.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:14.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:14.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:14.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:14.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:14.922 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:19.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:19.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:19.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:19.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:19.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:19.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:19.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:19.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:19.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:19.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:19.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:19.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:19.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:19.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:19.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:19.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:19.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:19.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:19.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:19.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:19.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:19.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:19.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:19.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:19.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:19.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:19.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:19.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:19.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:19.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:19.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:20.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:20.464 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:20.464 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:20.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:20.465 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:20.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:20.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:20.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:20.469 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:20.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:20.469 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.469 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.469 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.469 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.469 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.470 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.470 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:20.470 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:25.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:25.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:25.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:25.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:25.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:25.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:25.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:25.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:25.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:25.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:25.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:25.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:25.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:25.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:25.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:25.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:25.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:25.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:25.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:25.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:25.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:25.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:25.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:25.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:25.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:25.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:25.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:25.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:25.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:25.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:25.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:25.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:25.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:25.503 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:25.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:25.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:25.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:26.032 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:26.036 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:26.038 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:26.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:26.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:26.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:26.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:26.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:26.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:26.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:26.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:26.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:26.050 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:26.050 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.051 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:26.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:31.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:31.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:31.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:31.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:31.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:31.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:31.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:31.052 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:31.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:31.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:31.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:31.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:31.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:31.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:31.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:31.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:31.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:31.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:31.055 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:31.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:31.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:31.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:31.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:31.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:31.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:31.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:31.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:31.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:31.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:31.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:31.058 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:31.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:31.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:31.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:31.526 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:31.574 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:31.574 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:31.575 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:31.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:31.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:31.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:31.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:31.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:31.578 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:31.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:36.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:36.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:36.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:36.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:36.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:36.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:36.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:36.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:36.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:36.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:36.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:36.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:36.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:36.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:36.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:36.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:36.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:36.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:36.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:36.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:36.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:36.588 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:36.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:36.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:37.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:37.102 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:37.102 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:37.102 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:37.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:37.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:37.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:37.105 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:37.106 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:42.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:42.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:42.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:42.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:42.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:42.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:42.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:42.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:42.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:42.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:42.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:42.112 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:42.112 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:42.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:42.112 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:42.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:42.113 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:42.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:42.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:42.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:42.114 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:42.114 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:42.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:42.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:42.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:42.116 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:42.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:42.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:42.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:42.629 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:42.629 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:42.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:42.630 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:43.047 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:11:43.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:43.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:43.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:43.509 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:11:43.972 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:11:44.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:44.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:44.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:44.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:44.434 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:11:44.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:11:45.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:45.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:45.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:45.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:45.359 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:11:45.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:45.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:45.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:11:45.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:11:45.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:11:45.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:11:45.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:11:45.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:11:45.821 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:11:46.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:46.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:46.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:46.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:46.284 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:11:46.746 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:11:47.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:47.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:47.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:47.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:47.209 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:11:47.672 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:11:47.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:47.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:47.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:47.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:47.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:47.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:47.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:47.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:47.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:47.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:47.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:47.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:47.786 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:47.786 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:47.786 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:47.786 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:47.786 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:47.786 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:47.787 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:47.787 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:52.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:52.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:52.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:52.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:52.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:52.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:52.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:52.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:52.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:52.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:52.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:52.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:52.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:52.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:52.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:52.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:52.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:52.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:52.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:52.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:52.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:52.799 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:52.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:53.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:53.314 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:53.314 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:53.315 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:53.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:53.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:53.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:53.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:53.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:53.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:53.326 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:53.327 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:11:58.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:58.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:58.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:58.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:58.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:58.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:58.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:58.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:11:58.331 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:58.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:11:58.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:11:58.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:58.333 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:11:58.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:11:58.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:58.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:11:58.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:11:58.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:58.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:11:58.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:11:58.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:11:58.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:11:58.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:11:58.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:11:58.336 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:11:58.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.341 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:11:58.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:11:58.847 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:11:58.848 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:11:58.848 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:11:58.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:58.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:11:58.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:11:58.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:11:58.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:11:58.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:11:58.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:11:58.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:11:58.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:11:58.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:11:58.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:11:58.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:11:58.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:11:58.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:11:58.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:11:58.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:11:58.860 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:03.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:03.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:03.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:03.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:03.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:03.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:03.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:03.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:03.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:03.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:03.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:03.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:03.867 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:03.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:03.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:03.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:03.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:03.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:03.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:03.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:03.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:03.871 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:03.872 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:03.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:04.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:04.382 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:04.382 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:04.383 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:04.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:04.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:04.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:04.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:04.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:04.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:04.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:04.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:04.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:04.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:04.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:04.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:04.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:04.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:04.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:04.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:04.396 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:04.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.396 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.397 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.397 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.397 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.397 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:04.397 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:09.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:09.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:09.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:09.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:09.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:09.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:09.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:09.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:09.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:09.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:09.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:09.402 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:09.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:09.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:09.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:09.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:09.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:09.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:09.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:09.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:09.405 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:09.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:09.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:09.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:09.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:09.407 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:09.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:09.408 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:09.408 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:09.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.413 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:09.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:09.921 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:09.921 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:09.922 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:09.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:09.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:09.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:09.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:09.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:09.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:09.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:09.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:09.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:09.940 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:09.940 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:14.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:14.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:14.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:14.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:14.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:14.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:14.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:14.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:14.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:14.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:14.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:14.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:14.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:14.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:14.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:14.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:14.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:14.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:14.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:14.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:14.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:14.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:14.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:14.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:14.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:14.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:14.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:14.950 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:14.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:14.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:15.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:15.464 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:15.464 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:15.465 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:15.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:15.465 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 03:12:15.465 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 200
2026-05-07 03:12:15.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 03:12:15.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:15.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:15.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:12:16.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:16.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:16.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:16.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:16.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:16.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:12:16.807 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:12:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:17.076 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 03:12:17.076 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 0
2026-05-07 03:12:17.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 03:12:17.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:17.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:17.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:17.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:17.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:17.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:17.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:17.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:17.086 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:17.086 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:17.086 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:17.086 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:17.086 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:17.086 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:22.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:22.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:22.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:22.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:22.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:22.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:22.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:22.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:22.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:22.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:22.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:22.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:22.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:22.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:22.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:22.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:22.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:22.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:22.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:22.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:22.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:22.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:22.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:22.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:22.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:22.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:22.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:22.100 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:22.100 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:22.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:22.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:22.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:22.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:22.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:22.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:22.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:22.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:22.618 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:22.620 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:22.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:22.621 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:22.622 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 03:12:22.622 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 200
2026-05-07 03:12:22.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 03:12:22.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:23.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:23.035 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:12:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:23.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:23.497 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:12:23.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:23.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:23.960 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:12:24.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.231 [DEBUG] fake_trx.py:382 (BTS@172.18.188.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-07 03:12:24.231 [INFO] fake_trx.py:385 (BTS@172.18.188.20:5700) Artificial TRXC delay set to 0
2026-05-07 03:12:24.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:24.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:24.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:24.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:24.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:24.236 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:29.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:29.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:29.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:29.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:29.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:29.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:29.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:29.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:29.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:29.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:29.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:29.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:29.245 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:29.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:29.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:29.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:29.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:29.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:29.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:29.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:29.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:29.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:29.253 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:29.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:29.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:29.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:29.774 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:29.775 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:29.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:29.776 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:29.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:29.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:29.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:29.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:29.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:29.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:29.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:29.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:29.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:29.800 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:34.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:34.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:34.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:34.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:34.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:34.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:34.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:34.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:34.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:34.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:34.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:34.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:34.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:34.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:34.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:34.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:34.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:34.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:34.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:34.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:34.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:34.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:34.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:34.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:34.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:34.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:34.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:34.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:34.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:34.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:34.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:34.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:34.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:34.819 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:34.819 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:34.819 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:34.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:34.824 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:35.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:35.341 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:35.342 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:35.343 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:35.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:35.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:35.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:35.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:35.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:35.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:35.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:35.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:35.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:35.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:35.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:35.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:35.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:35.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:35.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:12:35.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:35.369 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:35.370 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:12:40.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:12:40.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:12:40.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:40.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:40.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:40.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:40.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:12:40.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:40.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:40.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:12:40.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:40.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:12:40.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:12:40.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:40.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:12:40.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:12:40.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:40.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:40.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:12:40.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:12:40.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:12:40.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:12:40.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:40.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:12:40.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:12:40.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:40.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:12:40.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:12:40.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:12:40.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:12:40.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:12:40.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:12:40.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:12:40.383 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:12:40.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:12:40.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:12:40.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:12:40.909 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:12:40.910 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:12:40.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:40.910 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:12:40.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:40.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:40.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:40.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:40.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:40.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:40.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:40.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:40.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:40.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:40.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:40.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:40.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:40.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:40.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:40.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:40.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:40.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:40.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:40.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:40.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:40.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:40.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:40.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:40.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:41.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:41.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:41.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:41.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:12:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:41.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:41.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:41.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:41.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:12:42.242 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:12:42.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:42.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:42.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:42.705 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:12:43.167 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:12:43.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:43.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:43.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:43.631 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:12:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:44.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:44.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:44.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:44.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:44.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:44.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:44.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:44.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:44.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:44.093 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:12:44.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:44.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:44.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:44.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:44.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:44.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:44.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:44.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:44.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:44.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:44.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:44.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:44.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:44.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:44.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:44.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:44.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:44.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:44.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:44.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:44.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:44.556 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:12:45.021 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:12:45.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:12:45.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:12:45.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:12:45.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:12:45.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:12:45.950 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:12:46.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:12:46.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:12:47.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:47.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:47.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:47.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:47.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:47.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:47.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:47.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:47.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:47.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:47.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:47.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:47.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:47.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:47.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:47.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:47.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:47.341 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:12:47.805 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:12:48.269 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:12:48.733 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:12:49.197 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:12:49.660 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:12:50.123 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:12:50.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:50.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:50.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:50.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:50.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:50.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:50.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:50.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:50.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:50.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:50.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:50.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:50.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:50.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:50.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:50.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:50.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:50.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:50.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:50.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:50.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:50.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:50.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:50.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:50.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:50.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:50.586 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:12:51.050 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:12:51.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:51.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:51.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:51.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:51.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:51.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:51.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:51.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:51.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:51.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:51.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:51.283 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:12:51.283 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:12:51.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:51.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:51.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:51.346 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:12:51.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:51.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:51.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:51.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:51.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:51.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:51.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:51.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:51.375 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:12:51.375 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:12:51.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:51.513 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:12:51.977 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:12:52.441 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:12:52.904 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:12:53.367 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:12:53.832 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:12:54.296 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:12:54.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:54.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:54.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:54.377 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:12:54.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:54.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:54.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:54.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:54.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:54.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:54.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:54.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:12:54.431 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:12:54.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:54.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:54.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:54.494 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:12:54.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:54.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:54.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:54.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:54.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:54.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:54.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:54.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:54.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:12:54.528 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:12:54.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:54.759 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:12:55.221 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:12:55.684 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:12:56.148 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:12:56.611 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:12:57.074 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:12:57.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:57.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:57.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:57.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:57.529 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:12:57.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:12:57.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:12:57.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:12:57.537 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:12:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:57.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:12:57.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:12:57.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:12:57.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:12:57.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:12:57.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:12:57.579 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:12:57.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:57.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:12:58.000 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:12:58.463 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:12:58.926 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:12:59.388 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:12:59.853 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:13:00.317 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:13:00.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:00.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:00.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:00.581 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:00.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:00.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:00.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:00.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:00.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:00.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:00.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:00.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:00.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:00.596 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:13:00.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:00.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:00.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:00.682 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:00.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:00.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:00.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:00.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:00.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:00.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:00.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:00.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:00.746 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:00.746 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:13:00.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:00.782 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:13:01.246 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:13:01.711 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:13:01.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:01.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:01.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:01.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:01.887 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:01.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:01.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:01.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:01.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:01.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:01.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:01.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:01.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:01.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:01.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:01.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:01.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:01.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:02.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:02.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:02.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:02.177 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:13:02.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:02.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:02.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:02.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:02.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:02.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:02.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:02.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:02.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:02.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:02.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:02.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:02.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:02.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:02.641 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:13:03.105 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:13:03.874 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:13:04.337 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:13:04.803 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:13:05.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:05.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:05.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:05.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:05.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:05.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:05.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:05.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:05.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:05.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:05.270 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:13:05.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:05.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:05.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:05.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:05.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:05.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:05.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:05.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:05.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:05.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:05.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:05.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:05.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:05.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:05.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:05.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:05.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:05.733 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:13:06.196 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:13:06.666 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:13:07.131 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:13:07.600 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:13:08.067 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:13:08.532 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:13:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:08.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:08.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:08.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:08.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:08.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:08.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:08.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:08.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:08.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:08.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:08.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:08.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:08.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:08.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:08.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:08.998 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:13:09.470 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:13:09.940 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:13:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:13:10.882 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:13:11.352 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:13:11.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:11.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:11.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:11.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:11.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:11.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:11.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:11.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:11.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:11.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:11.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:11.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:11.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:11.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:11.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:11.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:11.823 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:13:11.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:11.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:11.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:11.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:11.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:11.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:11.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:11.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:11.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:11.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:11.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:11.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.289 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:13:12.761 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:13:12.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:12.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:12.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:12.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:12.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:12.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:12.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:12.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:12.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:12.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:12.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:12.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:12.861 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:12.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:12.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:12.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:12.916 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:12.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:12.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:12.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:12.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:12.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:12.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:12.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:12.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:12.945 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:12.945 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:12.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:12.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:13.231 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:13:13.703 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:13:14.167 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:13:14.631 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:13:15.095 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 03:13:15.558 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 03:13:15.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:15.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:15.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:15.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:15.954 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:15.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:15.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:15.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:15.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:15.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:15.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:15.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:15.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:16.027 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 03:13:16.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:16.038 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:16.039 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:16.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:16.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:16.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:16.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:16.407 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:16.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:16.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:16.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:16.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:16.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:16.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:16.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:16.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:16.441 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:16.441 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:16.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:16.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:16.493 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 03:13:16.958 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 03:13:17.421 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 03:13:17.887 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 03:13:18.357 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 03:13:18.824 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 03:13:19.288 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 03:13:19.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:19.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:19.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:19.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:19.443 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:19.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:19.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:19.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:19.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:19.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:19.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:19.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:19.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:19.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:19.468 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:19.468 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:19.753 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 03:13:20.219 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 03:13:20.683 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 03:13:21.150 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 03:13:21.614 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 03:13:22.078 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 03:13:22.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:22.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:22.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:22.470 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:22.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:22.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:22.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:22.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:22.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:22.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:22.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:22.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:22.496 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:22.497 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:22.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.548 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 03:13:22.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:22.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:22.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:22.921 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:22.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:22.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:22.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:22.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:22.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:22.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:22.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:22.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:22.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:22.963 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:22.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:22.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:23.011 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 03:13:23.474 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 03:13:23.938 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 03:13:24.403 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 03:13:24.867 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 03:13:25.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:25.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:25.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:25.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:25.322 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:25.334 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:25.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:25.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:25.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:25.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:25.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9794 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9794 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9794 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9794 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9794 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:25.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9795 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:30.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:30.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:30.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:30.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:30.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:30.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:30.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:30.346 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:30.346 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:30.346 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:30.346 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:13:30.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:13:30.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:13:30.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:30.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:30.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:30.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:13:30.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:30.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:13:30.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:30.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:30.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:13:30.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:30.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:30.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:13:30.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:30.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:13:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:13:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:13:30.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:13:30.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:13:30.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:13:30.352 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:13:30.352 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:30.357 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:13:30.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:13:30.866 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:13:30.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:30.867 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:13:30.869 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:13:30.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:30.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:30.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:30.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:30.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:30.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:30.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:30.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:30.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:30.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:30.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:30.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:30.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:30.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:30.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:30.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:30.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:30.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:30.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:30.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:30.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:30.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:30.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:30.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:30.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:31.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:31.018 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:31.018 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:13:31.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:31.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:31.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:31.106 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:31.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:31.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:31.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:31.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:31.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:31.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:31.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:31.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:31.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:31.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:31.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:31.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:31.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:31.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:31.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:31.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:31.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:31.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:31.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:31.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:31.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:31.245 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:31.245 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:31.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:13:31.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:31.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:31.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:31.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:31.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:31.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:31.368 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:31.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:31.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:31.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:31.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:31.371 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:31.371 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=224 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:36.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:36.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:36.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:36.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:36.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:36.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:36.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:36.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:36.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:36.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:36.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:36.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:36.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:13:36.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:36.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:36.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:13:36.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:36.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:36.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:13:36.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:13:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:13:36.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:13:36.390 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:13:36.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:36.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:36.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:13:36.863 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:13:36.905 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:13:36.905 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:13:36.906 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:13:36.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:36.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:36.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:36.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:36.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:36.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:36.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:36.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:36.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:36.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:36.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:36.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:36.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:36.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:37.330 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:13:37.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:37.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:37.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:37.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:37.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:37.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:37.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:37.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:37.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:37.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:37.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:37.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:37.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:37.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:37.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:37.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:37.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:37.409 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:37.409 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:13:37.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:37.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:37.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:13:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:38.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:38.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:38.047 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:38.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:38.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:38.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:38.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:38.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:38.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:38.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:38.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:38.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:38.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:38.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:38.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:38.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:38.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:38.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:38.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:38.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:38.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:38.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:38.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:38.258 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:13:38.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:38.264 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:38.264 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:38.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:38.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:38.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:38.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:38.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:38.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:38.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:38.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:38.648 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:38.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:38.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:38.650 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:38.651 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:43.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:43.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:43.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:43.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:43.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:43.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:43.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:43.673 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:43.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:43.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:43.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:43.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:13:43.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:43.676 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:13:43.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:13:43.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:43.676 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:43.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:43.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:13:43.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:43.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:13:43.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:43.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:13:43.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:13:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:43.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:43.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:43.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:13:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:43.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:13:43.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.679 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:13:43.679 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:13:43.680 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:13:43.680 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:43.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:13:44.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:13:44.212 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:13:44.214 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:13:44.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:44.216 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:13:44.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:44.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:44.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:44.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:44.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:44.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:44.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:44.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:44.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:44.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:44.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:44.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:44.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:44.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:44.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:44.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:44.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:44.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:44.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:44.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:44.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:44.430 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:44.430 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:13:44.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.614 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:13:44.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:44.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:44.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:44.674 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:44.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:44.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:44.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:44.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:44.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:44.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:44.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:44.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:44.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:44.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:44.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:44.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:44.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:44.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:44.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:44.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:45.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:45.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:45.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:45.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:45.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:13:45.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:45.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:45.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:45.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:45.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:45.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:45.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:45.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:45.127 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:45.127 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:45.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:45.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:45.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:13:45.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:45.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:45.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:45.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:45.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:45.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:45.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:45.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:45.924 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:45.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:45.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:45.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:45.928 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:13:45.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:45.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:45.928 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:13:50.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:50.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:50.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:50.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:50.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:50.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:50.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:50.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:50.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:50.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:50.940 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:50.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:50.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:13:50.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:50.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:50.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:13:50.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:50.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:50.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:13:50.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:13:50.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:13:50.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:13:50.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:50.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:13:51.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:13:51.481 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:13:51.483 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:13:51.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:51.486 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:13:51.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:51.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:51.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:51.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:51.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:51.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:51.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:51.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:51.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:51.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:51.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:51.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:51.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:51.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:51.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:51.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:51.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:51.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:51.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:51.795 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:51.795 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:13:51.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:51.880 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:13:51.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:51.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:51.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:51.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:52.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:52.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:52.059 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:52.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:52.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:52.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:52.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:52.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:52.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:52.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:52.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:52.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:52.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:52.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:13:52.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:52.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:52.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:52.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:52.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:52.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:52.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:52.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:52.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:52.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:52.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:52.634 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:13:52.635 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:13:52.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:52.808 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:13:52.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:52.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:52.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:52.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:53.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:53.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:53.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:53.196 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:53.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:53.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:53.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:53.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:53.208 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:13:58.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:13:58.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:13:58.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:58.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:58.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:58.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:58.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:13:58.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:58.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:58.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:13:58.213 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:13:58.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:13:58.214 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:13:58.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:58.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:58.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:13:58.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:13:58.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:13:58.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:13:58.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:58.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:13:58.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:58.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:13:58.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:13:58.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:58.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:13:58.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:13:58.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:13:58.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:13:58.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:13:58.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:13:58.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:13:58.217 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:13:58.218 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:13:58.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:13:58.684 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:13:58.729 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:13:58.729 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:13:58.730 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:13:58.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:58.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:13:58.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:13:58.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:13:58.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:58.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:58.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:58.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:13:58.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:13:58.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:13:58.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:13:58.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:13:58.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:58.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:13:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:13:59.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:13:59.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:13:59.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:13:59.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:13:59.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:14:00.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:14:00.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:00.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:00.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:00.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:00.578 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:14:00.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:00.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:00.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:00.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:00.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:00.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:00.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:00.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:00.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:00.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:00.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:00.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:00.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:00.669 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:14:00.670 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:14:00.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:00.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:01.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:14:01.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:01.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:01.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:01.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:01.504 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:14:01.966 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:14:02.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:02.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:02.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:02.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:02.429 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:14:02.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:02.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:02.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:02.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:02.754 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:14:02.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:02.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:02.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:02.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:02.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:02.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:02.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:02.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:02.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:02.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:02.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:02.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:02.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:02.893 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:14:03.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:03.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:03.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:03.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:03.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:14:03.820 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:14:04.283 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:14:04.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:04.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:04.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:04.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:04.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:04.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:04.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:04.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:04.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:04.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:04.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:04.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:04.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:04.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:14:04.324 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:14:04.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:04.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:04.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:14:05.209 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:14:05.672 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:14:06.135 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:14:06.597 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:14:07.059 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:14:07.522 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:14:07.985 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:14:08.447 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:14:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:14:09.374 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:14:09.838 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:14:10.302 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:14:10.764 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:14:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:14:11.689 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:14:12.152 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:14:12.615 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:14:13.077 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:14:13.540 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:14:14.003 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:14:14.467 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:14:14.930 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:14:15.393 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:14:15.856 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:14:16.323 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:14:16.787 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:14:17.251 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:14:17.714 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:14:18.178 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:14:18.862 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:14:19.327 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:14:19.791 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:14:20.254 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:14:20.716 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:14:21.179 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:14:21.658 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:14:22.121 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:14:22.584 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:14:23.046 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:14:23.509 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:14:23.972 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:14:24.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:24.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:24.321 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:14:24.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:14:24.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:14:24.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:14:24.322 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:24.323 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5688 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:29.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:14:29.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:14:29.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:14:29.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:14:29.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:14:29.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:14:29.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:14:29.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:14:29.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:14:29.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:14:29.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:14:29.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:14:29.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:14:29.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:14:29.329 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:14:29.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:14:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:14:29.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:14:29.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:14:29.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:14:29.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:14:29.332 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:14:29.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:14:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:14:29.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:14:29.843 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:14:29.844 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:14:29.844 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:14:29.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:29.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:29.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:29.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:29.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:29.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:29.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:29.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:29.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:29.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:29.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:29.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:29.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:29.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:30.262 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:14:30.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:30.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:30.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:30.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:30.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:14:31.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:14:31.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:31.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:31.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:31.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:31.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:14:31.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:31.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:31.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:31.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:31.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:31.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:31.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:31.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:31.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:31.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:31.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:31.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:31.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:31.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:14:31.744 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:14:31.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:31.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:32.113 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:14:32.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:32.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:32.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:32.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:32.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:14:33.039 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:14:33.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:33.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:33.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:33.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:14:33.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:33.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:33.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:33.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:33.826 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:14:33.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:33.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:33.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:33.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:33.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:33.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:33.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:33.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:33.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:33.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:33.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:33.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:33.966 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:14:34.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:34.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:34.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:34.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:34.428 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:14:34.891 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:14:35.353 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:14:35.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:35.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:35.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:35.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:35.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:35.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:35.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:14:35.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:35.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:14:35.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:14:35.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:14:35.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:14:35.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:14:35.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:14:35.443 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:14:35.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:35.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:14:35.816 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:14:36.279 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:14:36.741 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:14:37.204 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:14:37.667 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:14:38.130 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:14:38.593 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:14:39.056 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:14:39.519 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:14:39.981 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:14:40.444 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:14:40.906 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:14:41.369 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:14:41.832 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:14:42.295 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:14:42.757 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:14:43.220 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:14:43.682 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:14:44.145 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:14:44.608 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:14:45.070 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:14:45.533 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:14:45.995 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:14:46.458 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:14:46.922 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:14:47.385 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:14:47.848 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:14:48.313 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:14:48.775 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:14:49.239 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:14:49.702 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:14:50.241 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:14:50.704 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:14:51.167 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:14:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:14:52.093 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:14:52.556 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:14:53.019 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:14:53.482 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:14:53.945 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:14:54.407 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:14:54.870 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:14:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:14:55.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:14:55.397 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:14:55.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:14:55.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:14:55.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:14:55.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:14:55.398 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (TRX3@172.18.188.20:5700/3) RX TRXD message (ver=1 fn=5728 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:14:55.398 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5728 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:00.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:00.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:00.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:00.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:00.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:00.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:00.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:00.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:00.407 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:00.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:00.407 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:00.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:00.408 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:00.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:00.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:00.410 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:00.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:00.412 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:00.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:00.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:00.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:00.415 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:00.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:00.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:00.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:00.947 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:00.948 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:00.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:00.948 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:00.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:00.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:00.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:00.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:00.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:00.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:00.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:00.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:00.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:00.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:00.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:00.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:01.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:01.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:01.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:01.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:01.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:01.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:01.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:01.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:01.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:01.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:01.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:01.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:01.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:01.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:01.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:01.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:01.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:01.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:01.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:01.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:01.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:02.274 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:15:02.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:02.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:02.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:02.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:03.128 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:15:03.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:15:03.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:03.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:03.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:03.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:04.052 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:15:04.514 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:15:04.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:04.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:04.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:04.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:04.976 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:15:05.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:05.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:05.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:05.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:05.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:05.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:05.300 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:10.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:10.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:10.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:10.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:10.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:10.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:10.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:10.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:10.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:10.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:10.305 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:10.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:10.306 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:10.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:10.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:10.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:10.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:10.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:10.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:10.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:10.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:10.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:10.310 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:10.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:10.315 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:10.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:10.824 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:10.825 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:10.826 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:10.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:10.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:10.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:10.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:10.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:10.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:10.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:10.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:10.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:10.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:10.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:10.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:10.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:10.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:10.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:10.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:10.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:10.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:10.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:10.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:10.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:10.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:10.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:10.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:10.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:10.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:10.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:10.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:10.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:10.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:10.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:11.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:11.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:11.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.058 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:11.058 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.131 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:11.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:11.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:11.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:11.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.150 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:11.150 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:11.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.240 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:11.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.242 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:11.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:11.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:11.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:11.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:11.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:11.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:11.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:11.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:11.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:11.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:11.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:11.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:11.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:11.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.657 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:11.657 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:11.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.703 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.781 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:11.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:11.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:11.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:11.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:11.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:11.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:11.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:11.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:11.839 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:11.839 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:11.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:11.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:12.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:12.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:12.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:12.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:12.016 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:12.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:12.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:12.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:12.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:12.020 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:12.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=377 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:12.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=377 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:12.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=377 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:12.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=377 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:12.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=377 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:12.020 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=377 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:17.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:17.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:17.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:17.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:17.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:17.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:17.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:17.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:17.026 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:17.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:17.026 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:17.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:17.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:17.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:17.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:17.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:17.028 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:17.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:17.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:17.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:17.029 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:17.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:17.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:17.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:17.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:17.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:17.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:17.033 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:17.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:17.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:17.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:17.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:17.545 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:17.546 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:17.546 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:17.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:17.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:17.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:17.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:17.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:17.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:17.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:17.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:17.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:17.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:17.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:17.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:17.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:17.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:17.962 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:17.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:17.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:17.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:17.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:17.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:17.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:17.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:17.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:17.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:17.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:17.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:17.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:18.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:18.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:18.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:18.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:18.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:18.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:18.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:18.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:18.425 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:18.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:18.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:18.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:18.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:18.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:18.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:18.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:18.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:18.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:18.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:18.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:18.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:18.468 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:18.468 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:18.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:18.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:18.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:15:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:19.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:19.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:15:19.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:15:19.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:19.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:19.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:19.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:19.914 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:19.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:19.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:19.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:19.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:19.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:19.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:19.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:19.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:19.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:19.945 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:19.945 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:19.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:19.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:20.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:20.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:20.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:20.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:15:20.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:20.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:20.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:20.567 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:20.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:20.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:20.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:20.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:20.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:20.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:20.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:20.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:20.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:20.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:20.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:20.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:20.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:20.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:20.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:20.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:20.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:20.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:20.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:20.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:20.737 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:15:20.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:20.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:20.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:20.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:20.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:21.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:21.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:21.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:21.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:21.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:21.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:21.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:21.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:21.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:21.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:21.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:21.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:21.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:15:21.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:21.203 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:21.203 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:21.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:21.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:21.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:21.587 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:21.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:21.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:21.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:21.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:21.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:21.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:21.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:21.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:21.616 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:21.616 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:21.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:21.662 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:15:22.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:22.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:22.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:22.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:22.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:22.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:22.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:22.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:22.048 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:22.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:22.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:22.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:22.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:22.052 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:22.052 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1107 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:27.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:27.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:27.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:27.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:27.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:27.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:27.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:27.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:27.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:27.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:27.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:27.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:27.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:27.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:27.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:27.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:27.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:27.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:27.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:27.060 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:27.060 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:27.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:27.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:27.062 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:27.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:27.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:27.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:27.577 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:27.577 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:27.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.578 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:27.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:27.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:27.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:27.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:27.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:27.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:27.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:27.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:27.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:27.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.810 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:27.810 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:27.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.864 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:27.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:27.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:27.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:27.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.903 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:27.903 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:27.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:27.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.985 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:27.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:27.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:27.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:27.993 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:27.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:27.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:27.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:27.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:27.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:28.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:28.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:28.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:28.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:28.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:28.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:28.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:28.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:28.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:28.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:28.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:28.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:28.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:28.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:28.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:28.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:28.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:28.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:28.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:28.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:28.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:28.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:28.455 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:28.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:28.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:28.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:28.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:28.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:28.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:28.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:28.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:28.499 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:28.499 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:28.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:28.918 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:15:29.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:29.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:29.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:29.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:29.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:29.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:29.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:29.066 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:29.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:29.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:29.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:29.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:29.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:29.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:29.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:29.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:29.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:29.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:29.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:29.100 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:29.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:29.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:29.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:29.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:29.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:29.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:29.314 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:29.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:29.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:29.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:29.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:29.318 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:29.318 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:34.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:34.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:34.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:34.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:34.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:34.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:34.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:34.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:34.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:34.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:34.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:34.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:34.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:34.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:34.329 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:34.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:34.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:34.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:34.330 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:34.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:34.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:34.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:34.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:34.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:34.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:34.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:34.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:34.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:34.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:34.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:34.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:34.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:34.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:34.338 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:34.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:34.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:34.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:34.859 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:34.859 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:34.861 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:34.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:34.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:34.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:34.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:34.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:34.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:34.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:34.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:34.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:34.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:34.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:34.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:34.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:34.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:35.272 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:35.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:35.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:35.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:35.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:35.737 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:35.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:35.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:35.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:35.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:35.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:35.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:35.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:35.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:35.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:35.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:35.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:35.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:35.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:35.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:35.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:35.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:35.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:36.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:15:36.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:36.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:36.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:36.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:36.664 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:15:36.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:36.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:36.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:36.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:36.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:36.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:36.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:36.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:36.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:36.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:36.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:36.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:36.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:36.801 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:36.801 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:36.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:36.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:37.127 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:15:37.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:37.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:37.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:37.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:37.590 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:15:37.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:37.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:37.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:37.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:37.884 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:37.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:37.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:37.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:37.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:37.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:37.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:37.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:37.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:37.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:37.917 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:37.917 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:37.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:37.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:38.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:15:38.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:38.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:38.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:38.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:15:38.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:38.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:38.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:38.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:38.827 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:38.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:38.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:38.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:38.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:38.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:38.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:38.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:38.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:38.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:38.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:38.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:38.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:38.978 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:15:39.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:39.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:39.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:39.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:39.441 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:15:39.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:39.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:39.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:39.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:39.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:39.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:39.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:39.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:39.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:39.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:39.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:39.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:39.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:39.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:39.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:39.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:39.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:39.904 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:15:40.367 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:15:40.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:40.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:40.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:40.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:40.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:40.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:40.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:40.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:40.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:40.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:40.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:40.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:40.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:40.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:40.456 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:40.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:40.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:40.830 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:15:41.293 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:15:41.757 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:15:42.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:42.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:42.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:42.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:42.206 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:42.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:42.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:42.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:42.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:42.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:42.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:42.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:42.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:42.222 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:15:42.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:42.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:42.269 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:42.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:42.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:42.688 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:15:43.151 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:15:43.617 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:15:44.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:44.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:44.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:44.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:44.065 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:44.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:44.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:44.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:44.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:44.071 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:44.071 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:49.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:49.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:49.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:49.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:49.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:49.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:49.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:49.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:49.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:49.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:49.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:49.081 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:49.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:49.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:49.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:49.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:49.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:49.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:49.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:49.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:49.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:49.087 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:49.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:49.092 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:49.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:49.607 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:49.608 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:49.609 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:49.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:49.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:49.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:49.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:49.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:49.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:49.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:49.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:49.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:49.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:49.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:49.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:49.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:49.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:49.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:49.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:49.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:49.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:49.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:49.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:49.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:49.795 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:49.795 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:49.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:49.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:49.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:49.935 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:49.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:49.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:49.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:49.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:49.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:49.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:49.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:49.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:49.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:49.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:49.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:49.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:50.021 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:50.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:50.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:50.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:50.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:50.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:50.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:50.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:50.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:50.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:50.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:50.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:50.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:50.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:50.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:50.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:50.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:50.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:50.302 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:50.303 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:50.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:50.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:50.487 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:50.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:15:51.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:51.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:51.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:51.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:51.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:51.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:51.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:51.102 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:51.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:51.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:51.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:51.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:51.106 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:56.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:56.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:56.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:56.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:56.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:56.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:56.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:56.117 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:56.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:15:56.118 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:15:56.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:15:56.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:15:56.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:56.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:56.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:56.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:15:56.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:15:56.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:15:56.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:56.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:15:56.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:15:56.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:56.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:15:56.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:15:56.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:56.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:15:56.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:56.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:15:56.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:15:56.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:15:56.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:15:56.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:15:56.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:15:56.129 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:15:56.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:15:56.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:15:56.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:15:56.645 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:15:56.646 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:15:56.646 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:15:56.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:56.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:56.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:56.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:56.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:56.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:56.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:56.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:56.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:56.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:56.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:56.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:56.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:56.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:56.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:56.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:56.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:56.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:56.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:56.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:56.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:56.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:56.838 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:56.838 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:15:56.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:56.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:56.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:56.978 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:56.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:56.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:56.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:56.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:56.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:56.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:56.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:56.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:57.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:57.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:57.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:57.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:57.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:57.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:15:57.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:57.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:57.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:57.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:57.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:57.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:57.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:57.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:57.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:15:57.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:57.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:57.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:15:57.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:57.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:15:57.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:15:57.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:15:57.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:15:57.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:57.577 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:15:57.577 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:15:57.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:57.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:57.993 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:15:58.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:58.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:58.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:58.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:15:58.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:15:58.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:15:58.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:15:58.141 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:15:58.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:15:58.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:15:58.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:15:58.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:15:58.146 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:15:58.146 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:03.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:03.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:03.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:03.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:03.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:03.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:03.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:03.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:03.155 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:03.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:03.155 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:03.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:03.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:03.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:03.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:03.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:03.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:03.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:03.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:03.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:03.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:03.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:03.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:03.160 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:03.160 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:03.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:03.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:03.162 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:03.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:03.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:16:03.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:16:03.958 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:16:03.959 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:16:03.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:03.961 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:16:03.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:03.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:03.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:04.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:04.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:04.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:04.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:04.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:04.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:04.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:16:04.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:04.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:04.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:04.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:04.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:04.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:04.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:04.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:04.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:04.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.187 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:04.187 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:16:04.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:04.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:04.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:04.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:04.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:04.320 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:04.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:04.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:04.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:04.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:04.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:04.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:04.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:04.563 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:16:04.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:04.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:04.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:04.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:04.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:04.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:04.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:04.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:04.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:04.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:04.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:04.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:04.854 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:04.854 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:16:04.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:04.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:05.032 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:16:05.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:05.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:05.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:05.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:05.179 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:05.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:05.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:05.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:05.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:05.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:05.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:05.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:05.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:05.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:05.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:05.187 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:05.187 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=444 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:10.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:10.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:10.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:10.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:10.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:10.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:10.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:10.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:10.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:10.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:10.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:10.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:10.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:10.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:10.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:10.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:10.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:10.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:10.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:10.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:10.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:10.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:10.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:10.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:10.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:10.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:10.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:10.201 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:10.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:10.206 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:16:10.669 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:16:10.715 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:16:10.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:10.716 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:16:10.716 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:16:10.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:10.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:10.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:10.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:10.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:10.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:10.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:10.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:10.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:10.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:10.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:10.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:10.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:10.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:10.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:10.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:10.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:10.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:10.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:10.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:10.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:10.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:10.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:10.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:10.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:10.905 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:10.905 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:16:10.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:10.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:11.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:11.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:11.046 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:11.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:11.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:11.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:11.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:11.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:11.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:11.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:11.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:11.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:11.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:11.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:16:11.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:11.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:11.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:11.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:11.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:11.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:11.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:11.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:11.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:11.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:11.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:11.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:11.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:11.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:11.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:11.412 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:11.412 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:16:11.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:11.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:16:12.057 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:16:12.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:12.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:12.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:12.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:12.204 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:12.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:12.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:12.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:12.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:12.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:12.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:12.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:12.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:12.209 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:16:17.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:17.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:17.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:17.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:17.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:17.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:17.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:17.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:17.215 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:17.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:17.215 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:17.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:17.216 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:17.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:17.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:17.217 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:17.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:17.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:17.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:17.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:17.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:17.220 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:17.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:17.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:16:17.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:16:17.732 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:16:17.732 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:16:17.733 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:16:17.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:17.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:17.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:17.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:17.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:17.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:17.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:17.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:17.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:17.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:17.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:17.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:17.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:17.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:18.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:18.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:18.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:18.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:18.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:18.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:18.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:18.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:18.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:18.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:18.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:18.108 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:16:18.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.150 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:16:18.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:18.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:18.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:18.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:18.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:18.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:18.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:18.595 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:18.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:18.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:18.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:18.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:18.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:18.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:18.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:16:18.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:18.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:18.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:18.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:18.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:19.077 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:16:19.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:19.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:19.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:19.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:19.539 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:16:19.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:19.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:19.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:19.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:19.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:19.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:19.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:19.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:19.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:19.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:19.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:19.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:19.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:19.722 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:16:19.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:19.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:20.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:16:20.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:20.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:20.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:20.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:20.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:16:20.927 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:16:21.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:21.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:21.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:21.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:21.390 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:16:21.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:21.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:21.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:21.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:21.706 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:21.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:21.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:21.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:21.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:21.710 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:16:26.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:26.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:26.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:26.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:26.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:26.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:26.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:26.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:26.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:26.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:26.715 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:26.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:26.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:26.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:26.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:26.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:26.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:26.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:26.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:26.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:26.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:26.720 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:26.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:26.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:16:27.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:16:27.317 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:16:27.318 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:16:27.318 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:16:27.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:27.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:27.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:27.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:27.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:27.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:27.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:27.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:27.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:27.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:27.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:27.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:16:27.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:27.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:27.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:27.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:27.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:27.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:27.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:27.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:27.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:27.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:27.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:27.694 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:27.694 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:16:27.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:27.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:27.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:27.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:28.113 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:16:28.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:28.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:28.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:28.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:28.163 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:28.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:28.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:28.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:28.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:28.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:28.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:28.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:28.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:28.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:28.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:28.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:28.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:28.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:28.576 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:16:28.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:28.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:28.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:29.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:16:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:29.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:29.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:29.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:29.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:29.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:29.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:29.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:29.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:29.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:29.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:29.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:29.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:29.221 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:29.221 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:16:29.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:29.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:29.500 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:16:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:29.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:29.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:30.087 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:16:30.551 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:16:30.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:30.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:30.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:30.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:16:31.479 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:16:31.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:31.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:31.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:31.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:31.792 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:31.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:31.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:31.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:31.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:31.795 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:31.795 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1091 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:36.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:36.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:36.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:36.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:36.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:36.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:36.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:36.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:36.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:36.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:36.804 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:36.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:36.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:36.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:36.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:36.807 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:36.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:36.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:36.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:36.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:36.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:36.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:36.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:36.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:36.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:36.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:36.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:36.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:36.812 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:36.812 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:36.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:36.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:36.813 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:16:41.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:41.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:41.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:41.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:41.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:41.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:41.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:41.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:41.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:41.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:41.820 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:41.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:41.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:41.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:41.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:41.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:41.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:41.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:41.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:41.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:41.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:41.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:41.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:41.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:41.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:41.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:41.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:41.826 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:41.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:41.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:16:42.294 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:16:42.341 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:16:42.341 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:16:42.342 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:16:42.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:42.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:42.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:42.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:42.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:42.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:42.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:42.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:42.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:42.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:42.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:42.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:42.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:42.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:42.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:16:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:42.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:42.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:42.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:42.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:42.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:42.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:42.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:42.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:42.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:42.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:42.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:42.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:42.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:42.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:42.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:42.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:42.847 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:42.847 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:16:42.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:42.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:43.222 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:16:43.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:43.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:43.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:43.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:43.317 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:43.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:43.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:43.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:43.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:43.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:43.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:43.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:43.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:43.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:43.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:43.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:43.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:43.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:43.685 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:16:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:43.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:43.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:43.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:44.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:16:44.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:44.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:44.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:44.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:44.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:44.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:44.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:44.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:44.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:44.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:44.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:44.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:44.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:44.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:44.329 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:16:44.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:44.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:44.611 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:16:44.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:44.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:44.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:44.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:45.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:16:45.537 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:16:45.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:45.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:45.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:45.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:46.001 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:16:46.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:46.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:46.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:46.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:46.316 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:46.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:46.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:46.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:46.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:46.319 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:46.319 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=989 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:16:51.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:51.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:51.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:51.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:51.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:51.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:51.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:51.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:51.324 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:51.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:16:51.324 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:51.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:16:51.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:16:51.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:51.326 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:16:51.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:16:51.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:51.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:16:51.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:16:51.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:16:51.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:16:51.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:16:51.329 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:16:51.329 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:16:51.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:16:51.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:16:51.843 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:16:51.843 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:16:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:51.844 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:16:51.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:51.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:51.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:51.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:51.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:51.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:51.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:51.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:51.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:51.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:51.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:51.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:51.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:52.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:52.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:52.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:52.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:52.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:52.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:52.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:52.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:52.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:52.261 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:16:52.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:52.267 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:52.267 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:16:52.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:52.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:52.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:52.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:16:52.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:52.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:52.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:52.815 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:52.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:52.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:52.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:52.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:52.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:52.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:52.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:52.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:52.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:52.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:52.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:52.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:53.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:16:53.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:53.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:53.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:53.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:53.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:16:53.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:53.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:53.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:53.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:53.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:53.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:53.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:16:53.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:53.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:16:53.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:16:53.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:16:53.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:16:53.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:53.834 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:16:53.834 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:16:53.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:53.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:54.112 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:16:54.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:54.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:54.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:54.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:54.574 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:16:55.037 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:16:55.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:55.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:55.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:55.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:55.500 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:16:55.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:16:55.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:16:55.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:16:55.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:16:55.816 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:16:55.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:16:55.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:16:55.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:16:55.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:16:55.820 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:00.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:00.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:00.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:00.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:00.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:00.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:00.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:00.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:00.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:00.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:00.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:00.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:00.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:00.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:00.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:00.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:00.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:00.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:00.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:00.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:00.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:00.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:00.829 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:00.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:00.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:00.829 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:00.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:00.830 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:00.830 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:00.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:00.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:00.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:00.831 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:00.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:00.831 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:00.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:00.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:00.832 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:00.833 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:17:01.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:17:01.345 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:17:01.346 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:17:01.346 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:17:01.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:01.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:01.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:01.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:01.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:01.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:01.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:01.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:01.359 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:06.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:08.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:08.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:08.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:08.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:08.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:08.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:08.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:08.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:08.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:08.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:08.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:08.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:08.187 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:08.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:08.187 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:08.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:08.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:08.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:08.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:08.190 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:08.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:08.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:08.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:08.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:08.193 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:08.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:08.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:08.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:08.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:08.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:08.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:08.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:08.194 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:13.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:13.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:13.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:13.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:13.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:13.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:13.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:13.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:13.200 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:13.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:13.200 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:13.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:13.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:13.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:13.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:13.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:13.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:13.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:13.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:13.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:13.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:13.205 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:13.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:13.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:17:13.673 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:17:13.717 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:17:13.718 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:17:13.718 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:17:13.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:13.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:13.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:13.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:13.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:13.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:13.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:13.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:13.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:13.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:13.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:13.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:13.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:13.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:13.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:13.741 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:18.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:18.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:18.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:18.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:18.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:18.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:18.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:18.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:18.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:18.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:18.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:18.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:18.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:18.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:18.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:18.747 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:18.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:18.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:18.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:18.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:18.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:18.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:18.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:18.749 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:18.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:18.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:18.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:18.751 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:18.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:18.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:18.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:18.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:17:19.218 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:17:19.266 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:17:19.267 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:17:19.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:19.267 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:17:19.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:19.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:19.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:19.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:19.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:19.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:19.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:19.279 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:19.279 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:24.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:24.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:24.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:24.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:24.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:24.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:24.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:24.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:24.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:24.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:24.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:24.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:24.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:24.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:24.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:24.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:24.291 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:24.291 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:24.291 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:24.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:24.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:24.292 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:29.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:29.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:29.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:29.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:29.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:29.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:29.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:29.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:29.300 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:29.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:29.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:29.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:29.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:29.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:29.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:29.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:29.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:29.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:29.302 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:29.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:29.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:29.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:29.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:29.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:29.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:29.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:29.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:29.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:29.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:29.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:29.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:29.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:29.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:29.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:29.306 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:29.306 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:29.306 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:29.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:17:29.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:17:29.818 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:17:29.818 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:17:29.818 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:17:29.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:29.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:29.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:29.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:29.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:29.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:29.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:29.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:29.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:29.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:29.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:29.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:29.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:29.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:30.235 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:17:30.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:30.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:30.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:30.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:30.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:17:30.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:30.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:30.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:30.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:30.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:30.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:30.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:30.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:30.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:30.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:30.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:30.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:30.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:30.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:30.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:30.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:30.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:31.160 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:17:31.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:31.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:31.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:31.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:31.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:17:31.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:31.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:31.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:31.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:31.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:31.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:31.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:31.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:31.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:31.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:31.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:31.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:31.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:31.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:31.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:32.085 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:17:32.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:32.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:32.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:32.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:32.547 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:17:32.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:32.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:32.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:32.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:32.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:32.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:32.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:32.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:32.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:32.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:32.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:32.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:32.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:32.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:32.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:32.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:32.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:33.010 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:17:33.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:33.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:33.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:33.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:33.472 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:17:33.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:33.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:33.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:33.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:33.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:33.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:33.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:33.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:33.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:33.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:33.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:33.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:33.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:33.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:33.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:33.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:33.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:33.940 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:17:34.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:34.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:34.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:34.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:34.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:34.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:34.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:34.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:34.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:34.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:34.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:34.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:34.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:34.262 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:17:34.262 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:17:34.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:34.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:34.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:34.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:34.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:34.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:34.407 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:17:34.869 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:17:36.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:36.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:36.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:36.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:36.564 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:17:36.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:36.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:36.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:36.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:36.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:36.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:36.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:36.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:36.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:36.609 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:17:36.609 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-07 03:17:36.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:36.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:36.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:36.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:36.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:36.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:37.025 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:17:37.491 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:17:37.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:37.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:37.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:37.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:37.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:37.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:37.955 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:17:38.419 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:17:38.882 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:17:39.345 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:17:39.811 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:17:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:17:40.738 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:17:41.201 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:17:41.663 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:17:42.126 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:17:42.596 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:17:42.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:42.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:42.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:42.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:42.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:42.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:42.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:42.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:42.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:42.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:42.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:42.741 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:42.741 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:42.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:42.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:42.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:43.062 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:17:43.525 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:17:43.989 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:17:44.454 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:17:44.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:44.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:44.616 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:17:44.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:44.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:44.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:44.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:44.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:44.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:44.619 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:44.620 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.620 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.620 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.620 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.620 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.620 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.621 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:44.621 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:49.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:49.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:49.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:49.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:49.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:49.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:49.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:49.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:49.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:49.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:49.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:49.626 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:49.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:49.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:49.627 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:49.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:49.627 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:49.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:49.627 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:49.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:49.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:49.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:49.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:49.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:49.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:49.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:49.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:49.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:49.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:49.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:49.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:49.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:49.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:49.632 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:49.632 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:49.637 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:17:50.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:17:50.147 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:17:50.148 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:17:50.149 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:17:50.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:50.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:50.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:50.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:50.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:50.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:50.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.564 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:17:50.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:50.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:50.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:50.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:50.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:50.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:50.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:50.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:50.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:50.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:17:50.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:17:50.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:17:50.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:50.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:17:50.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:17:50.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:50.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:51.029 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:17:51.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:17:51.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:17:51.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:17:51.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:51.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:51.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:51.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:51.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:51.204 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:51.204 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:17:56.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:17:56.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:17:56.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:56.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:56.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:56.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:56.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:17:56.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:56.209 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:17:56.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:56.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:17:56.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:17:56.210 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:56.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:17:56.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:17:56.212 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:56.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:17:56.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:17:56.212 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:17:56.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:17:56.214 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:17:56.214 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:17:56.214 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:17:56.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:17:56.219 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:17:56.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:17:57.150 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:17:57.613 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:17:58.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:17:58.538 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:17:59.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:17:59.465 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:17:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:18:00.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:18:00.853 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:18:01.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:18:01.778 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:18:02.242 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:18:02.805 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:18:03.267 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:18:03.731 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:18:04.194 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:18:04.657 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:18:05.121 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:18:05.584 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:18:06.048 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:18:06.513 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:18:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:18:07.442 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:18:07.911 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:18:08.375 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:18:08.840 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:18:09.304 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:18:09.768 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:18:10.233 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:18:10.697 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:18:11.161 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:18:11.624 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:18:12.088 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:18:12.554 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:18:13.019 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:18:13.482 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:18:13.949 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:18:14.414 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:18:14.878 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:18:15.341 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:18:15.805 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:18:16.272 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:18:16.736 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:18:17.201 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:18:17.668 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:18:18.132 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:18:18.596 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:18:19.160 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:18:19.631 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:18:20.105 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:18:20.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:18:20.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:18:20.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:18:20.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:18:20.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:18:20.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:18:20.361 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:18:20.361 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5260 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:18:20.361 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5260 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:18:20.361 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5260 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:18:20.361 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5260 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:18:20.361 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5260 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:18:20.361 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5260 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:18:25.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:18:25.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:18:25.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:18:25.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:18:25.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:18:25.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:18:25.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:18:25.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:18:25.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:18:25.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:18:25.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:18:25.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:18:25.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:18:25.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:18:25.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:18:25.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:18:25.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:18:25.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:18:25.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:18:25.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:18:25.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:18:25.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:18:25.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:18:25.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:18:25.381 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:18:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:18:25.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:18:25.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:18:25.383 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:18:25.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:18:25.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:18:25.387 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:18:25.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:18:26.318 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:18:26.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:18:27.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:18:27.710 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:18:28.173 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:18:28.637 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:18:29.102 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:18:29.566 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:18:30.029 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:18:30.495 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:18:30.959 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:18:31.423 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:18:31.888 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:18:32.351 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:18:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:18:33.279 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:18:33.748 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:18:34.213 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:18:34.676 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:18:35.140 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:18:35.603 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:18:36.066 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:18:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:18:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:18:37.457 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:18:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:18:38.384 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:18:38.848 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:18:39.313 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:18:39.777 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:18:40.241 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:18:40.706 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:18:41.170 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:18:41.634 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:18:42.099 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:18:42.566 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:18:43.031 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:18:43.495 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:18:43.959 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:18:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:18:44.887 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:18:45.351 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:18:45.815 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:18:46.279 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:18:46.741 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:18:47.205 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:18:47.669 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:18:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:18:48.595 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:18:49.059 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:18:49.525 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:18:49.991 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:18:50.457 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:18:50.921 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:18:51.385 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:18:51.847 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:18:52.311 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:18:52.776 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:18:53.239 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:18:53.702 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:18:54.169 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:18:54.634 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:18:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:18:55.565 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:18:56.032 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:18:56.498 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:18:56.962 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:18:57.426 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:18:57.893 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:18:58.357 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:18:58.821 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:18:59.287 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:18:59.751 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 03:19:00.214 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 03:19:00.678 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 03:19:01.145 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 03:19:01.608 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 03:19:02.072 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 03:19:02.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:02.539 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 03:19:03.003 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 03:19:03.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:03.466 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 03:19:03.931 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 03:19:04.394 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 03:19:04.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:04.857 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 03:19:05.323 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 03:19:05.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:05.786 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 03:19:06.249 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 03:19:06.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:06.714 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 03:19:07.183 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 03:19:07.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:07.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:19:07.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:19:07.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:19:07.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:19:07.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:19:07.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:19:07.411 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:07.411 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=9232 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:12.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:19:12.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:19:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:19:12.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:19:12.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:19:12.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:19:12.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:19:12.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:19:12.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:12.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:19:12.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:19:12.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:19:12.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:19:12.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:19:12.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:19:12.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:19:12.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:19:12.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:19:12.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:19:12.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:19:12.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:19:12.436 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:19:12.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:12.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:19:12.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:19:12.971 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:19:12.973 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:12.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:12.975 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:19:12.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:12.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:12.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:12.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:12.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:12.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:12.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:12.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:12.997 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:13.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:13.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:13.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:13.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:13.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:13.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:19:13.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:13.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:13.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:13.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:19:13.851 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:14.303 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:19:14.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:14.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:14.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:14.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:19:15.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:19:15.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:15.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:15.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:15.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:15.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:19:16.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:19:16.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:16.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:16.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:16.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:16.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:19:16.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:16.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:16.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:16.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:16.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:16.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:16.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:16.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:16.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:16.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:16.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:16.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:16.717 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:16.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:16.721 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:19:16.721 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:19:16.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:16.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:17.093 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:19:17.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:17.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:17.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:17.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:17.559 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:19:18.027 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:19:18.492 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:19:18.957 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:19:19.422 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:19:19.887 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:19:20.351 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:19:20.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:20.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:20.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:20.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:20.734 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:19:20.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:20.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:20.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:20.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:20.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:20.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:20.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:20.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:20.765 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:20.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:20.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:20.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:20.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:20.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:20.815 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:19:21.249 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:21.279 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:19:21.742 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:19:22.204 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:19:22.667 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:19:23.130 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:19:23.592 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:19:24.055 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:19:24.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:24.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:24.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:24.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:24.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:24.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:24.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:24.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:24.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:24.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:24.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:24.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:24.517 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:19:24.518 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:24.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:24.522 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:19:24.522 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:19:24.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:24.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:24.980 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:19:25.442 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:19:25.904 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:19:26.288 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:26.367 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:19:26.829 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:19:27.217 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:27.292 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:19:27.755 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:19:28.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:28.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:28.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:28.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:28.141 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:19:28.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:19:28.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:19:28.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:19:28.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:19:28.144 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:28.144 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3453 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:19:33.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:19:33.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:19:33.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:19:33.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:19:33.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:19:33.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:19:33.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:19:33.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:19:33.150 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:19:33.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:19:33.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:19:33.150 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:19:33.151 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:19:33.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:19:33.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:19:33.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:19:33.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:19:33.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:19:33.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:19:33.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:19:33.154 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:19:33.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:19:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:19:33.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:19:33.623 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:19:33.669 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:19:33.670 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:33.670 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:19:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:33.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:33.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:33.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:33.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:33.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:33.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:33.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:33.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:33.711 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:33.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:33.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:33.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:33.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:33.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:34.085 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:19:34.090 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:34.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:34.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:34.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:34.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:34.547 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:19:34.560 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:34.561 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:35.010 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:19:35.031 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:35.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:35.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:35.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:35.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:35.473 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:19:35.502 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:19:35.977 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:36.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:36.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:36.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:36.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:36.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:19:36.448 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:36.862 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:19:36.919 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:37.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:37.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:37.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:37.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:37.324 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:19:37.492 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:37.874 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:37.954 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:19:38.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:19:38.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:19:38.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:19:38.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:19:38.417 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:19:38.504 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:38.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:19:38.975 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:39.341 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:19:39.445 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:39.804 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:19:39.916 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:40.267 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:19:40.391 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:40.729 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:19:40.862 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:19:41.333 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:41.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:41.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:41.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:41.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:41.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:41.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:41.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:41.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:41.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:41.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:41.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:41.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:41.371 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:41.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:41.375 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:19:41.375 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:19:41.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:41.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:41.655 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:19:42.044 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:42.118 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:19:42.519 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:42.580 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:19:42.990 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:43.044 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:19:43.461 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:43.506 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:19:43.969 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:19:43.989 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:44.407 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:44.431 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:19:44.878 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:44.893 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:19:45.348 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:45.357 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:19:45.819 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:45.820 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:19:46.282 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:19:46.285 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:46.745 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:19:46.756 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:47.207 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:19:47.227 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:47.670 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:19:47.702 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:48.132 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:19:48.173 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:48.594 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:19:48.644 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:49.057 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:19:49.115 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:49.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:49.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:49.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:49.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:49.117 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:19:49.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:49.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:49.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:49.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:49.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:49.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:49.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:49.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:49.143 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:49.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:49.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:49.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:49.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:49.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:49.489 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:49.519 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:19:49.950 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:49.950 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:49.982 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:19:50.416 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:50.444 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:19:50.878 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:50.907 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:19:51.339 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:51.370 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:19:51.801 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:51.832 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:19:52.262 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:52.294 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:19:52.728 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:52.757 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:19:53.190 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:53.219 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:19:53.651 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:53.681 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:19:54.113 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:54.144 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:19:54.575 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:54.606 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:19:55.036 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:55.068 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:19:55.502 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:55.531 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:19:55.964 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:55.994 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:19:56.425 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:56.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:56.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:56.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:56.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:56.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:19:56.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:19:56.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:19:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:56.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:19:56.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:19:56.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:19:56.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:19:56.456 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:19:56.457 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:56.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:19:56.460 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:19:56.461 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:19:56.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:56.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:19:56.841 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:56.919 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:19:57.303 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:57.381 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:19:57.768 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:57.769 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:57.844 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:19:58.230 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:58.325 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:19:58.713 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:58.787 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:19:59.175 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:59.250 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:19:59.637 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:19:59.638 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:19:59.712 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:20:00.098 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:00.174 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:20:00.560 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:00.561 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:20:00.636 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:20:01.021 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:01.099 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:20:01.483 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:01.484 [DEBUG] fake_trx.py:269 (MS@172.18.188.22:6700) Recv SETTA cmd
2026-05-07 03:20:01.561 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:20:01.949 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:02.024 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:20:02.410 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:02.486 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:20:02.872 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:02.948 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:20:03.334 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:03.411 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:20:03.795 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:03.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:03.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:03.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:03.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:03.798 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:20:03.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:03.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:03.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:03.801 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:20:08.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:08.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:08.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:08.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:08.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:08.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:08.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:08.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:08.807 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:08.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:08.807 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:08.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:08.808 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:20:08.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:08.809 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:20:08.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:20:08.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:08.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:08.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:08.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:20:08.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:08.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:20:08.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:08.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:08.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:20:08.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:20:08.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:20:08.813 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:20:08.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:08.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:08.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:20:09.284 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:20:09.326 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:20:09.327 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:09.327 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:20:09.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:09.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:09.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:09.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:09.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:09.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:09.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:09.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:09.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:09.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:09.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:09.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:09.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:09.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:09.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:20:09.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:09.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:09.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:09.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:10.209 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:20:10.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:20:10.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:10.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:10.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:11.133 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:20:11.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:11.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:11.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:11.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:11.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:11.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:11.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:11.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:11.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:11.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:11.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:11.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:11.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:11.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:11.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:11.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:11.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:20:11.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:11.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:11.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:11.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:12.059 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:20:12.521 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:20:12.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:12.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:12.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:12.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:12.985 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:20:13.448 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:20:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:13.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:13.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:13.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:13.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:13.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:13.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:13.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:13.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:13.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:13.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:13.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:13.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:13.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:13.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:13.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:13.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:13.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:13.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:13.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:13.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:13.911 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:20:14.373 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:20:14.835 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:20:15.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:20:15.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:15.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:15.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:15.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:15.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:15.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:15.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:15.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:15.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:15.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:15.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:15.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:15.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:15.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:15.739 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:20:20.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:20.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:20.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:20.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:20.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:20.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:20.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:20.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:20.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:20.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:20.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:20:20.746 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:20:20.746 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:20:20.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:20.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:20.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:20.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:20.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:20.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:20.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:20.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:20.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:20.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:20:20.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:20.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:20:20.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:20:20.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:20:20.750 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:20:20.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:20:20.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:20.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:20:21.217 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:20:21.265 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:20:21.266 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:21.266 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:20:21.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:21.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:21.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:21.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:21.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:21.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:21.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:21.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:21.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:21.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:21.310 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:20:21.310 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:20:21.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:21.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:21.680 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:20:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:21.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:21.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:20:22.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:20:22.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:22.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:22.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:22.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:23.067 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:20:23.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:23.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:23.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:23.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:23.412 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:20:23.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:23.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:23.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:23.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:23.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:23.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:23.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:23.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:23.530 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:20:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:23.533 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:20:23.533 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:20:23.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:23.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:23.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:23.992 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:20:24.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:20:24.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:24.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:24.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:24.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:24.917 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:20:25.380 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:20:25.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:25.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:25.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:25.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:25.632 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:20:25.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:25.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:25.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:25.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:25.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:25.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:25.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:25.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:25.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:25.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:25.644 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:20:25.644 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1079 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.645 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.646 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.646 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:25.646 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1080 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:30.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:30.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:30.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:30.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:30.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:30.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:30.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:30.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:30.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:30.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:30.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:30.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:30.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:20:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:30.653 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:20:30.653 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:20:30.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:30.653 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:30.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:30.654 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:20:30.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:30.654 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:20:30.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:30.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:30.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:20:30.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:20:30.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:20:30.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:20:30.657 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:20:30.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:20:31.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:20:31.175 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:20:31.175 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:31.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:31.176 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:20:31.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:31.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:31.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:31.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:31.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:31.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:31.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:31.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:31.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:31.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:31.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:31.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:31.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:31.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:20:31.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:31.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:31.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:32.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:20:32.513 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:20:32.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:32.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:32.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:32.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:32.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:20:33.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:33.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:33.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:33.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:33.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:33.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:33.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:33.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:33.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:33.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:33.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:33.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:33.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:33.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:33.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:33.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:33.440 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:20:33.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:33.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:33.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:33.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:33.904 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:20:34.367 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:20:34.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:34.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:34.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:34.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:34.830 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:20:35.293 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:20:35.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:35.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:35.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:35.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:35.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:35.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:35.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:35.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:35.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:35.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:35.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:35.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:35.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:35.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:35.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:35.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:35.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:35.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:35.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:35.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:35.756 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:20:36.218 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:20:36.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:20:37.145 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:20:37.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:37.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:37.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:37.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:37.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:37.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:37.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:37.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:37.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:37.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:37.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:37.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:37.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:37.440 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:20:37.441 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:37.441 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:37.441 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:37.441 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:37.441 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:37.441 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:42.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:42.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:42.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:42.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:42.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:42.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:42.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:42.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:42.446 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:42.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:42.446 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:20:42.446 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:20:42.446 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:20:42.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:42.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:42.447 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:42.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:42.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:42.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:20:42.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:42.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:20:42.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:42.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:20:42.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:20:42.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:42.448 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:42.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:42.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:20:42.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:42.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:20:42.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:20:42.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:20:42.450 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:20:42.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:42.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:20:42.918 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:20:42.964 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:20:42.965 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:42.965 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:20:42.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:42.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:42.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:42.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:42.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:42.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:42.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:42.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:42.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:43.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:43.010 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:20:43.010 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:20:43.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:43.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:43.381 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:20:43.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:43.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:43.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:43.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:43.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:20:44.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:20:44.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:44.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:44.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:44.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:44.771 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:20:45.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:45.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:45.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:45.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:45.095 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:20:45.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:45.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:45.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:45.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:45.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:45.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:45.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:45.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:45.143 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:20:45.143 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:20:45.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:45.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:45.234 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:20:45.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:45.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:45.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:45.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:45.697 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:20:46.160 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:20:46.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:46.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:46.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:46.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:46.623 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:20:47.087 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:20:47.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:47.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:47.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:47.218 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:20:47.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:47.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:47.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:47.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:47.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:47.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:47.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:47.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:47.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:47.226 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:20:47.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:47.226 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1052 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:20:52.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:52.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:52.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:52.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:52.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:52.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:52.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:52.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:52.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:52.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:52.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:52.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:52.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:20:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:52.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:52.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:20:52.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:52.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:52.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:20:52.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:20:52.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:20:52.240 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:20:52.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:20:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:52.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:20:52.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:20:52.757 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:20:52.758 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:20:52.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:52.758 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:20:52.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:52.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:52.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:20:52.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:52.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:52.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:52.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:20:52.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:20:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:52.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:20:52.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:20:52.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:52.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:53.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:20:53.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:53.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:53.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:53.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:53.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:20:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:20:54.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:54.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:54.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:54.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:54.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:20:54.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:20:54.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:20:54.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:20:54.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:20:54.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:54.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:54.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:54.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:54.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:54.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:54.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:54.954 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:20:59.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:20:59.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:20:59.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:59.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:59.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:59.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:20:59.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:59.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:59.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:20:59.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:59.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:20:59.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:20:59.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:20:59.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:20:59.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:59.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:20:59.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:59.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:20:59.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:20:59.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:20:59.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:20:59.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:20:59.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:20:59.963 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:20:59.963 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:20:59.963 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:20:59.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:20:59.968 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:00.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:00.474 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:00.475 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:00.475 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:00.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:00.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:00.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:00.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:00.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:00.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:00.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:00.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:00.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:00.525 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:21:00.525 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:21:00.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:00.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:00.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:00.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:00.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:00.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:00.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:01.358 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:21:01.822 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:21:01.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:01.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:01.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:01.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:02.285 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:21:02.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:02.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:02.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:02.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:02.690 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:21:02.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:02.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:02.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:02.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:02.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:02.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:02.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:02.693 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.693 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:02.694 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:07.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:07.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:07.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:07.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:07.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:07.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:07.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:07.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:07.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:07.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:07.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:07.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:07.705 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:07.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:07.707 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:07.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:07.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:07.709 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:07.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:07.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:07.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:07.713 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:07.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:07.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:07.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:07.717 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:08.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:08.231 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:08.232 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:08.232 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:08.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:08.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:08.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:08.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:08.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:08.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:08.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:08.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:08.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:08.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:08.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:08.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.644 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:08.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:08.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:08.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:08.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:08.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:08.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:08.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:08.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:08.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:08.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:08.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:08.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:08.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:08.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:08.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:08.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:08.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:09.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:09.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:09.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:09.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:09.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:09.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:09.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:09.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:09.073 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:09.073 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:09.074 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:14.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:14.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:14.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:14.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:14.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:14.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:14.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:14.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:14.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:14.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:14.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:14.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:14.097 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:14.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:14.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:14.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:14.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:14.101 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:14.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:14.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:14.103 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:14.103 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:14.108 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:14.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:14.637 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:14.639 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:14.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:14.641 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:14.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:14.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:14.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:14.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:14.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:14.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:14.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:14.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:14.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:14.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:14.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:14.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:14.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:15.036 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:15.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:15.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:15.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:15.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:15.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:15.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:15.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:15.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:15.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:15.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:15.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:15.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:15.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:15.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:15.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:15.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:15.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:15.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:15.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:15.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:15.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:15.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:15.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:15.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:15.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:15.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:15.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:15.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:15.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:15.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:15.503 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:20.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:20.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:20.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:20.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:20.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:20.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:20.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:20.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:20.508 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:20.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:20.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:20.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:20.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:20.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:20.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:20.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:20.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:20.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:20.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:20.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:20.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:20.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:20.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:20.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:20.512 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:20.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:20.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:20.514 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:20.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:20.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:20.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:20.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:21.028 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:21.028 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:21.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:21.029 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:21.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:21.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:21.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:21.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:21.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:21.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:21.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:21.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:21.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:21.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:21.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:21.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:21.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:21.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:21.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:21.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:21.444 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:21.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:21.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:21.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:21.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:21.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:21.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:21.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:21.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:21.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:21.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:21.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:21.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:21.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:21:21.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:21.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:21.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:21.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:21.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:21.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:21.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:21.911 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:26.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:26.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:26.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:26.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:26.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:26.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:26.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:26.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:26.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:26.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:26.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:26.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:26.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:26.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:26.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:26.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:26.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:26.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:26.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:26.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:26.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:26.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:26.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:26.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:26.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:26.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:26.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:26.923 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:26.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:26.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:26.928 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:27.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:27.441 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:27.442 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:27.442 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:27.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:27.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:27.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:27.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:27.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:27.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:27.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:27.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:27.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:27.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:27.485 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:21:27.485 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:21:27.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:27.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:27.856 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:27.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:27.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:27.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:27.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:28.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:21:28.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:21:28.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:28.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:28.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:21:29.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:21:29.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:29.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:29.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:29.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:21:30.634 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:21:30.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:30.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:30.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:30.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:31.096 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:21:31.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:31.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:31.487 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:31.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:31.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:31.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:31.490 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:31.490 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1005 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:36.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:36.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:36.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:36.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:36.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:36.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:36.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:36.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:36.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:36.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:36.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:36.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:36.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:36.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:36.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:36.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:36.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:36.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:36.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:36.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:36.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:36.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:36.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:36.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:36.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:36.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:36.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:36.500 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:36.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:36.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:37.014 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:37.015 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:37.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:37.016 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:37.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:37.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:37.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:37.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:37.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:37.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:37.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:37.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:37.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:37.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:37.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:37.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:37.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:37.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:37.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:37.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:37.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:37.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:37.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:37.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:37.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:37.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:37.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:37.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:37.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:37.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:37.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:37.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:37.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:37.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:37.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:37.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:37.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:37.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:37.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:37.578 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:37.578 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:42.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:42.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:42.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:42.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:42.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:42.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:42.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:42.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:42.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:42.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:42.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:42.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:42.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:42.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:42.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:42.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:42.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:42.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:42.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:42.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:42.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:42.588 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:42.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:42.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:43.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:43.102 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:43.103 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:43.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:43.104 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:43.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:43.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:43.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:43.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:43.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:43.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:43.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:43.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:43.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:43.147 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:21:43.147 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:21:43.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:43.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:43.518 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:43.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:43.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:43.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:43.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:43.981 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:21:44.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:21:44.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:44.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:44.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:44.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:44.906 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:21:45.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:21:45.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:45.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:45.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:45.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:45.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:21:46.293 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:21:46.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:46.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:46.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:46.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:46.755 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:21:47.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:47.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:47.155 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:47.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:47.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:47.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:47.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:47.157 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:52.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:52.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:52.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:52.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:52.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:52.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:52.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:52.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:52.163 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:52.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:52.163 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:52.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:52.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:52.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:52.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:52.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:52.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:52.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:52.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:52.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:52.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:52.168 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:52.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:52.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:52.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:52.680 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:52.681 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:52.681 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:52.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:52.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:52.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:52.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:52.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:52.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:52.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:52.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:52.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:52.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:52.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:52.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:52.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:53.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:53.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:53.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:53.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:53.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:53.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:53.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:53.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:53.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:53.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:53.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:53.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:53.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:53.444 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:21:53.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:53.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:53.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:53.445 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:21:58.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:58.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:58.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:58.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:58.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:58.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:58.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:58.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:58.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:58.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:21:58.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:21:58.454 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:21:58.454 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:21:58.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:58.454 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:58.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:21:58.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:58.455 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:21:58.455 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:21:58.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:58.456 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:21:58.456 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:21:58.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:21:58.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:21:58.458 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:21:58.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:21:58.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:21:58.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:21:58.926 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:21:58.970 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:21:58.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:58.971 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:21:58.972 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:21:58.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:58.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:58.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:21:58.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:58.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:58.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:58.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:21:58.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:21:59.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:59.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:21:59.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:21:59.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:59.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:59.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:21:59.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:59.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:59.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:59.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:59.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:21:59.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:21:59.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:21:59.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:21:59.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:21:59.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:21:59.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:21:59.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:21:59.736 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:04.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:04.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:04.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:04.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:04.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:04.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:04.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:04.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:04.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:04.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:04.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:04.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:04.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:04.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:04.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:04.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:04.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:04.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:04.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:04.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:04.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:04.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:04.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:04.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:04.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:04.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.746 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:04.746 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:04.746 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:04.746 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:04.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:05.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:05.257 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:05.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:05.258 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:05.259 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:05.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:05.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:05.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:05.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:05.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:05.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:05.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:05.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:05.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:05.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:05.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:05.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:05.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:05.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:05.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:05.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:05.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:05.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:06.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:06.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:06.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:06.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:06.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:06.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:06.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:06.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:06.024 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:11.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:11.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:11.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:11.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:11.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:11.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:11.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:11.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:11.033 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:11.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:11.034 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:11.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:11.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:11.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:11.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:11.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:11.035 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:11.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:11.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:11.036 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:11.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:11.038 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:11.038 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:11.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:11.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:11.042 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:11.042 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:11.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:11.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:11.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:11.559 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:11.560 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:11.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:11.561 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:11.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:11.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:11.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:11.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:11.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:11.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:11.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:11.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:11.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:11.605 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:22:11.605 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:22:11.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:11.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:11.974 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:12.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:12.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:12.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:12.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:12.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:12.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:12.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:12.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:12.453 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:12.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:12.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:12.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:12.457 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:17.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:17.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:17.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:17.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:17.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:17.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:17.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:17.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:17.462 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:17.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:17.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:17.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:17.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:17.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:17.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:17.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:17.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:17.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:17.465 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:17.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:17.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:17.467 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:17.467 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:17.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:17.934 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:17.983 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:17.984 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:17.985 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:17.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:17.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:17.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:18.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:18.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:18.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:18.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:18.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:18.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:18.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:18.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:18.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:18.397 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:18.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:18.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:18.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:18.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:18.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:18.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:18.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:18.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:18.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:18.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:18.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:18.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:18.745 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:23.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:23.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:23.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:23.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:23.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:23.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:23.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:23.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:23.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:23.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:23.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:23.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:23.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:23.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:23.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:23.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:23.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:23.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:23.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:23.757 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:23.757 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:23.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:23.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:24.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:24.270 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:24.271 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:24.271 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:24.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:24.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:24.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:24.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:24.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:24.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:24.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:24.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:24.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:24.314 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:22:24.314 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:22:24.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:24.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:24.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:24.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:24.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:25.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:25.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:25.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:25.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:25.127 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:25.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:25.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:25.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:25.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:25.130 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:30.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:30.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:30.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:30.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:30.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:30.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:30.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:30.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:30.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:30.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:30.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:30.137 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:30.137 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:30.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:30.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:30.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:30.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:30.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:30.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:30.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:30.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:30.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:30.140 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:30.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:30.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:30.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:30.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:30.142 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:30.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:30.147 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:30.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:30.655 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:30.656 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:30.656 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:30.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:30.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:30.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:30.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:30.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:30.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:30.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:30.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:30.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:31.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:31.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:31.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:31.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:31.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:31.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:22:31.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:31.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:31.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:31.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:31.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:31.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:31.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:31.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:31.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:31.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:31.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:31.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:32.004 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:22:32.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:32.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:32.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:32.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:32.466 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:22:32.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:22:32.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:22:32.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:22:32.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:32.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:32.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:32.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:32.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:32.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:32.967 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:32.967 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=622 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:32.967 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=622 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:32.967 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=622 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:32.967 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=622 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:32.967 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=622 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:37.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:37.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:37.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:37.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:37.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:37.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:37.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:37.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:37.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:37.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:37.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:37.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:37.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:37.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:37.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:37.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:37.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:37.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:37.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:37.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:37.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:37.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:37.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:37.976 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:37.976 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:37.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.978 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:37.978 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:37.978 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:37.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:37.983 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:38.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:38.493 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:38.494 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:38.494 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:38.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:38.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:38.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:38.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:38.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:38.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:38.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:38.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:38.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:38.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:38.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:38.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:38.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:38.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:39.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:22:39.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:22:39.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:39.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:39.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:39.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:40.297 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:22:40.760 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:22:40.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:40.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:40.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:40.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:41.223 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:22:41.685 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:22:41.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:41.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:41.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:41.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:42.148 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:22:42.612 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:22:42.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:43.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:43.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:43.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:43.078 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:22:43.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:22:43.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:43.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:43.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:43.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:43.542 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:22:44.005 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:22:44.467 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:22:44.930 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:22:45.392 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:22:45.855 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:22:46.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:46.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:46.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:46.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:46.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:46.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:46.296 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:51.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:51.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:51.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:51.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:51.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:51.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:51.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:51.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:51.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:51.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:22:51.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:22:51.303 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:22:51.303 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:22:51.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:51.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:51.304 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:22:51.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:51.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:22:51.304 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:22:51.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:51.305 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:22:51.305 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:22:51.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:51.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:22:51.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:22:51.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:51.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:22:51.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:22:51.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:51.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:22:51.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:22:51.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:51.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:22:51.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:22:51.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:22:51.309 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:22:51.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:22:51.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:22:51.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:22:51.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:22:51.822 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:22:51.823 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:22:51.823 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:22:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:22:51.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:51.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:51.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:22:51.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:51.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:51.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:51.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:22:51.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:22:52.238 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:22:52.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:52.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:52.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:52.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:52.701 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:22:53.163 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:22:53.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:53.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:53.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:53.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:53.626 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:22:54.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:22:54.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:54.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:54.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:54.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:54.553 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:22:55.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:22:55.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:55.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:55.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:55.479 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:22:55.942 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:22:56.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:56.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:56.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:56.407 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:22:56.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:22:56.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:22:56.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:22:56.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:56.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:22:56.873 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:22:57.338 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:22:57.803 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:22:58.267 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:22:58.730 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:22:59.193 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:22:59.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:22:59.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:22:59.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:22:59.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:22:59.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:22:59.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:22:59.627 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (TRX1@172.18.188.20:5700/1) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:22:59.627 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:04.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:04.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:04.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:04.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:04.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:04.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:04.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:04.638 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:04.638 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:04.638 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:04.638 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:04.640 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:04.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:23:04.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:04.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:23:04.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:23:04.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:04.642 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:04.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:04.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:23:04.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:04.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:23:04.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:04.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:04.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:23:04.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:23:04.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:23:04.649 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:23:04.650 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:04.654 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:23:05.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:23:05.173 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:23:05.175 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:23:05.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:23:05.176 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:23:05.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:23:05.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:23:05.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:23:05.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:05.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:23:05.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:23:05.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:23:05.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:23:05.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:23:05.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:05.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:05.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:05.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:06.048 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:23:06.512 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:23:06.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:06.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:06.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:06.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:06.976 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:23:07.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:23:07.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:07.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:07.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:07.901 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:23:08.364 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:23:08.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:08.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:08.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:08.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:08.826 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:23:09.289 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:23:09.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:09.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:09.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:09.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:09.752 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:23:10.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:23:10.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:23:10.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:23:10.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:10.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:10.218 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:23:10.683 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:23:11.148 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:23:11.613 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:23:12.076 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:23:12.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:23:12.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:23:12.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:12.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:12.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:12.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:12.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:12.971 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (TRX1@172.18.188.20:5700/1) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=4), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:12.972 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:17.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:17.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:17.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:17.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:17.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:17.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:17.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:17.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:17.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:17.981 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:17.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:23:17.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:17.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:17.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:23:17.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:17.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:17.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:23:17.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:17.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:23:17.985 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:23:17.985 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:17.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:23:18.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:23:18.501 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:23:18.502 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:23:18.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:23:18.502 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:23:18.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:23:18.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:23:18.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:23:18.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:18.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:23:18.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:23:18.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:23:18.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:23:18.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:23:18.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:18.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:18.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:18.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:19.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:23:19.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:23:19.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:19.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:19.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:20.306 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:23:20.768 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:23:20.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:20.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:20.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:21.232 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:23:21.694 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:23:21.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:21.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:21.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:21.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:22.156 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:23:22.620 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:23:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:22.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:22.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:22.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:23.084 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:23:23.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:23:23.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:23:23.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:23:23.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:23.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:23.547 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:23:24.009 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:23:24.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:23:24.933 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:23:25.396 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:23:25.860 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:23:26.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:23:26.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:26.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:26.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:26.297 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (TRX2@172.18.188.20:5700/2) RX TRXD message (ver=1 fn=1831 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:26.297 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:31.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:31.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:31.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:31.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:31.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:31.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:31.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:31.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:31.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:31.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:31.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:23:31.303 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:23:31.303 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:23:31.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:31.303 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:31.304 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:23:31.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:31.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:31.304 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:23:31.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:31.305 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:31.305 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:23:31.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:31.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:31.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:23:31.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:31.307 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:23:31.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:23:31.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:23:31.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:23:31.307 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:23:31.308 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:23:31.308 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:31.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:31.313 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:23:31.778 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:23:31.822 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:23:31.822 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:23:31.822 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:23:31.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:23:31.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:23:31.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:23:31.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:23:31.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:31.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:23:31.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:23:31.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:23:31.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:23:32.243 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:23:32.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:32.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:32.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:32.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:32.709 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:23:33.173 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:23:33.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:33.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:33.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:33.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:33.635 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:23:34.097 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:23:34.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:34.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:34.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:34.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:34.559 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:23:35.021 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:23:35.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:35.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:35.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:35.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:35.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:23:35.947 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:23:36.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:36.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:36.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:36.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:36.411 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:23:36.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD NOHANDOVER
2026-05-07 03:23:36.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:23:36.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:23:36.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:36.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:23:36.878 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:23:37.344 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:23:37.806 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:23:38.268 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:23:38.731 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:23:39.193 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:23:39.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:23:39.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:39.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:39.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:39.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:39.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:39.625 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (TRX1@172.18.188.20:5700/1) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:39.625 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:23:44.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:44.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:44.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:44.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:44.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:44.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:44.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:44.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:44.632 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:44.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:23:44.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:44.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:23:44.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:23:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:44.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:23:44.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:23:44.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:44.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:44.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:44.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:23:44.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:23:44.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:23:44.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:44.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:23:44.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:23:44.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:44.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:23:44.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:44.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:23:44.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:23:44.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:23:44.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:23:44.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:23:44.643 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:23:44.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:23:44.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:23:45.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:23:45.167 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:23:45.168 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:23:45.169 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:23:45.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:23:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:23:45.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:45.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:45.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:45.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:46.037 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:23:46.500 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:23:46.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:46.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:46.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:46.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:46.963 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:23:47.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:23:47.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:47.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:47.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:47.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:47.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:23:48.353 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:23:48.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:48.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:48.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:48.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:48.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:23:49.281 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:23:49.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:49.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:49.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:49.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:49.744 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:23:50.207 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:23:50.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:23:51.134 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:23:51.597 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:23:52.060 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:23:52.522 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:23:52.986 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:23:53.450 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:23:53.912 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:23:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:23:54.839 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:23:55.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:23:55.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:23:55.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:23:55.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:23:55.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:23:55.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:23:55.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:23:55.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:23:55.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:23:55.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:23:55.174 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:00.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:00.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:00.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:00.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:00.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:00.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:00.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:00.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:00.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:00.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:00.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:00.182 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:00.182 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:00.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:00.183 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:00.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:00.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:00.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:00.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:00.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:00.186 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:00.186 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:00.186 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:00.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:00.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:00.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:00.187 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:05.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:05.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:05.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:05.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:05.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:05.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:05.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:05.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:05.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:05.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:05.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:05.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:05.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:05.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:05.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:05.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:05.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:05.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:05.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:05.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:05.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:05.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:05.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:05.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:05.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:05.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:05.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:05.200 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:05.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:05.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:24:05.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:24:05.717 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:24:05.717 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:24:05.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:24:05.718 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:24:05.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:24:05.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:24:05.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:24:05.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:24:05.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:24:05.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:24:05.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:24:05.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:24:06.129 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:24:06.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:06.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:06.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:06.592 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:24:07.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:24:07.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:07.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:07.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:07.517 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:24:07.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:24:08.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:08.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:08.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:08.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:08.442 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:24:08.905 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:24:09.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:09.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:09.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:09.369 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:24:09.831 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:24:10.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:10.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:10.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:10.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:24:10.755 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:24:11.218 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:24:11.680 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:24:12.142 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:24:12.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:24:13.066 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:24:13.528 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:24:13.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:24:13.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:13.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:13.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:13.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:13.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:13.758 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:13.758 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1888 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:18.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:18.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:18.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:18.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:18.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:18.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:18.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:18.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:18.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:18.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:18.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:18.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:18.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:18.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:18.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:18.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:18.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:18.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:18.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:18.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:18.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:18.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:18.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:18.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:18.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:18.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:18.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:18.769 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:18.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:18.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:18.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:18.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:18.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:18.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:18.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:18.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:18.771 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:23.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:23.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:23.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:23.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:23.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:23.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:23.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:23.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:23.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:23.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:23.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:23.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:23.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:23.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:23.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:23.784 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:23.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:23.786 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:23.786 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:23.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:23.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:23.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:23.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:23.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:23.787 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:23.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:23.789 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:23.789 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:23.789 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:23.794 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:24:24.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:24:24.306 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:24:24.307 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:24:24.307 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:24:24.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:24:24.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:24:24.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:24:24.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:24:24.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:24:24.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:24:24.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:24:24.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:24:24.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:24:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:24:24.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:24.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:24.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:24.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:25.188 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:24:25.656 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:24:25.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:25.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:25.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:25.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:26.122 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:24:26.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:24:26.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:26.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:26.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:26.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:27.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:24:27.532 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:24:27.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:27.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:27.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:27.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:28.003 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:24:28.473 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:24:28.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:28.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:28.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:28.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:28.938 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:24:29.403 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:24:29.868 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:24:30.334 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:24:30.804 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:24:31.270 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:24:31.736 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:24:32.200 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:24:32.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:24:32.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:32.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:32.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:32.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:32.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:32.350 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:32.350 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:24:37.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:37.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:37.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:37.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:37.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:37.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:37.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:37.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:37.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:37.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:37.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:37.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:37.356 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:37.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:37.357 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:37.357 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:37.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:37.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:37.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:37.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:37.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:37.360 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:37.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:37.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:37.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:37.361 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:42.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:42.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:42.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:42.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:42.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:42.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:42.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:42.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:42.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:42.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:42.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:42.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:42.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:42.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:42.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:42.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:42.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:42.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:42.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:42.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:42.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:42.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:42.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:42.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:42.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:42.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:42.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:42.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:42.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:42.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:42.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:42.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:42.398 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:42.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:42.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:42.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:42.402 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:24:42.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:24:42.922 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:24:42.923 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:24:42.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:24:42.924 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:24:42.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:24:42.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:24:42.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:24:42.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:24:42.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:24:42.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:24:42.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:24:42.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:24:43.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:24:43.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:43.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:43.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:43.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:43.805 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:24:44.271 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:24:44.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:44.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:44.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:44.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:44.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:24:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:24:45.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:45.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:45.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:45.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:45.668 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:24:46.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:24:46.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:46.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:46.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:46.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:24:47.064 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:24:47.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:47.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:47.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:47.535 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:24:48.008 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:24:48.481 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:24:48.953 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:24:49.426 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:24:49.898 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:24:50.371 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:24:50.844 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:24:50.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:24:50.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:50.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:50.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:50.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:50.969 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:24:50.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:55.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:55.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:55.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:55.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:55.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:55.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:55.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:55.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:55.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:55.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:24:55.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:55.992 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:24:55.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:24:55.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:55.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:24:55.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:24:55.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:24:55.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:24:55.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:24:55.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:55.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:24:55.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:24:55.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:55.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:24:55.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:24:55.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:24:55.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:24:55.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:24:55.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:24:55.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:24:55.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:24:55.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:24:55.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:24:55.998 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:24:55.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:24:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:24:55.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:24:55.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:24:55.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:24:55.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:24:55.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:24:55.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:24:55.999 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:25:01.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:01.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:01.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:01.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:01.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:01.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:01.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:01.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:01.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:01.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:01.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:25:01.020 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:25:01.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:25:01.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:01.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:01.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:01.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:25:01.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:01.021 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:25:01.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:01.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:25:01.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:25:01.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:01.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:01.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:01.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:25:01.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:01.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:25:01.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:01.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:01.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:25:01.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:25:01.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:25:01.031 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:25:01.032 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:01.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:01.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:25:01.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:25:01.560 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:25:01.561 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:25:01.562 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:25:01.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:25:01.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:25:01.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:25:01.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:25:01.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:25:01.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:25:01.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:25:01.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:25:01.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:25:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:25:02.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:02.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:02.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:02.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:25:02.925 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:25:03.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:03.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:03.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:03.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:03.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:25:03.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:25:04.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:04.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:04.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:04.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:04.341 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:25:04.814 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:25:05.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:05.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:05.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:05.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:05.287 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:25:05.759 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:25:06.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:06.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:06.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:06.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:06.232 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:25:06.705 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:25:07.176 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:25:07.648 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:25:08.121 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:25:08.593 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:25:09.065 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:25:09.538 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:25:09.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:25:09.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:25:09.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:09.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:09.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:09.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:09.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:09.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:09.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:09.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:09.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:09.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:09.615 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:09.615 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:14.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:14.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:14.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:14.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:14.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:14.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:14.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:14.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:14.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:25:14.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:25:14.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:25:14.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:14.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:14.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:14.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:25:14.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:14.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:25:14.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:14.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:14.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:25:14.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:14.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:14.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:25:14.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:25:14.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:25:14.637 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:25:14.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:25:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:14.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:14.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:14.638 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:25:19.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:19.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:19.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:19.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:19.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:19.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:19.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:19.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:19.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:19.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:19.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:25:19.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:25:19.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:25:19.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:19.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:19.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:19.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:25:19.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:19.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:25:19.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:19.664 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:25:19.664 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:25:19.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:19.665 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:19.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:19.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:25:19.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:19.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:25:19.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:19.667 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:25:19.667 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:25:19.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:19.667 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:19.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:19.668 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:25:19.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:19.668 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:25:19.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:25:19.671 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:25:19.671 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:25:19.671 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:19.676 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:25:20.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:25:20.201 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:25:20.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:25:20.205 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:25:20.208 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:25:20.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:25:20.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:25:20.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:25:20.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:25:20.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:25:20.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:25:20.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:25:20.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:25:20.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:25:20.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:20.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:20.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:20.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:21.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:25:21.568 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:25:21.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:21.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:21.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:21.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:22.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:25:22.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:25:22.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:22.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:22.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:22.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:22.983 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:25:23.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:25:23.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:23.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:23.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:23.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:23.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:25:24.396 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:25:24.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:24.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:24.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:24.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:24.869 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:25:25.341 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:25:25.813 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:25:26.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:25:26.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:25:27.230 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:25:27.702 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:25:28.173 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:25:28.646 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:25:29.119 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:25:29.591 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:25:30.062 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:25:30.535 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:25:31.008 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:25:31.480 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:25:31.950 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:25:32.424 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:25:32.896 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:25:33.368 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:25:33.839 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:25:34.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:25:34.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:25:34.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:34.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:34.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:34.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:34.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:34.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:34.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:34.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:34.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:34.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:34.252 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:25:34.252 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:34.252 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:34.252 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:34.252 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:34.252 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:34.252 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:39.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:39.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:39.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:39.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:39.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:39.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:39.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:39.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:39.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:39.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:39.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:25:39.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:25:39.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:25:39.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:39.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:39.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:39.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:25:39.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:39.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:25:39.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:39.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:25:39.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:25:39.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:39.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:39.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:39.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:25:39.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:39.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:25:39.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:39.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:25:39.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:25:39.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:39.271 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:39.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:39.271 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:25:39.271 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:39.271 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:25:39.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:39.273 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:25:39.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:25:39.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:25:39.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:25:39.273 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:25:39.274 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:25:39.274 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:25:39.274 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:25:39.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:39.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:39.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:39.276 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:25:44.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:44.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:44.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:44.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:44.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:44.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:44.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:44.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:44.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:44.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:44.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:25:44.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:25:44.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:25:44.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:44.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:44.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:44.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:25:44.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:44.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:25:44.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:44.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:25:44.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:25:44.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:44.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:44.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:44.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:25:44.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:44.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:25:44.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:44.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:25:44.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:25:44.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:44.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:44.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:44.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:25:44.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:44.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:25:44.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:25:44.308 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:25:44.308 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:25:44.308 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:44.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:25:44.791 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:25:44.837 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:25:44.839 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:25:44.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:25:44.843 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:25:44.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:25:44.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:25:44.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:25:44.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:25:44.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:25:44.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:25:44.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:25:44.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:25:45.258 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:25:45.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:45.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:45.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:45.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:45.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:25:46.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:25:46.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:46.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:46.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:46.675 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:25:47.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:25:47.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:47.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:47.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:47.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:47.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:25:48.091 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:25:48.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:48.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:48.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:48.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:48.564 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:25:49.036 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:25:49.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:49.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:49.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:49.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:49.507 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:25:49.972 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:25:50.444 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:25:50.914 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:25:51.385 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:25:51.858 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:25:52.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:25:52.803 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:25:52.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:25:52.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:25:52.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:52.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:52.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:52.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:52.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:52.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:52.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:52.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:52.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:52.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:52.896 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.896 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:52.897 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:25:57.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:57.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:57.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:57.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:57.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:57.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:57.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:57.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:57.904 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:57.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:25:57.904 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:25:57.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:25:57.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:25:57.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:57.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:57.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:57.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:25:57.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:25:57.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:25:57.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:25:57.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:25:57.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:25:57.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:57.910 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:57.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:57.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:25:57.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:25:57.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:25:57.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:25:57.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:25:57.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:25:57.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:57.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:25:57.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:57.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:25:57.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:25:57.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:25:57.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:25:57.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:25:57.918 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:25:57.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:25:57.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:25:57.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:25:57.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:25:57.921 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:26:02.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:02.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:02.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:02.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:02.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:02.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:02.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:02.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:02.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:02.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:02.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:26:02.942 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:26:02.942 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:26:02.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:02.943 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:02.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:02.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:26:02.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:02.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:26:02.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:02.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:26:02.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:26:02.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:02.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:02.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:02.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:26:02.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:02.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:26:02.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:02.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:02.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:26:02.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:02.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:26:02.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:26:02.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:26:02.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:26:02.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:26:02.953 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:26:02.953 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:26:02.953 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:26:02.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:02.958 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:26:03.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:26:03.486 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:26:03.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:26:03.490 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:26:03.491 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:26:03.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:26:03.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:26:03.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:26:03.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:26:03.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:26:03.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:26:03.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:26:03.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:26:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:26:03.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:03.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:03.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:03.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:04.380 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:26:04.853 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:26:04.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:04.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:04.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:05.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:26:05.794 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:26:05.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:05.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:05.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:05.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:06.264 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:26:06.735 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:26:06.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:06.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:06.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:06.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:07.208 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:26:07.679 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:26:07.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:07.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:07.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:07.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:08.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:26:08.623 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:26:09.094 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:26:09.561 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:26:10.031 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:26:10.502 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:26:10.975 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:26:11.447 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:26:11.919 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:26:12.393 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:26:12.865 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:26:13.336 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:26:13.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:26:13.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:26:13.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:13.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:13.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:13.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:13.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:13.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:13.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:13.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:13.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:13.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:13.541 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:13.542 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:18.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:18.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:18.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:18.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:18.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:18.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:18.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:18.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:18.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:18.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:18.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:26:18.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:26:18.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:26:18.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:18.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:18.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:18.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:26:18.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:18.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:26:18.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:18.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:26:18.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:26:18.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:18.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:18.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:18.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:26:18.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:18.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:26:18.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:18.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:26:18.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:26:18.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:18.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:18.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:18.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:26:18.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:18.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:26:18.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:26:18.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:26:18.565 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:26:18.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:18.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:18.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:18.567 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:26:23.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:23.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:23.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:23.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:23.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:23.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:23.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:23.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:23.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:23.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:23.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:26:23.587 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:26:23.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:26:23.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:23.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:23.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:23.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:26:23.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:23.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:26:23.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:23.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:26:23.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:26:23.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:23.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:23.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:23.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:26:23.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:23.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:26:23.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:23.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:26:23.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:26:23.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:23.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:23.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:23.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:26:23.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:23.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:26:23.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:26:23.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:26:23.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:26:23.595 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:26:23.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:23.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:26:24.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:26:24.123 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:26:24.126 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:26:24.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:26:24.128 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:26:24.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:26:24.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:26:24.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:26:24.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:26:24.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:26:24.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:26:24.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:26:24.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:26:24.550 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:26:24.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:24.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:24.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:24.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:25.021 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:26:25.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:26:25.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:25.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:25.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:25.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:26:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:26:26.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:26.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:26.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:26.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:26.909 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:26:27.383 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:26:27.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:27.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:27.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:27.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:27.855 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:26:28.327 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:26:28.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:28.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:28.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:28.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:28.798 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:26:29.273 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:26:29.745 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:26:30.216 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:26:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:26:31.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:26:31.624 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:26:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:26:32.570 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:26:33.041 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:26:33.513 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:26:33.984 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:26:34.449 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:26:34.920 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:26:35.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:26:35.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:35.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:35.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:35.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:35.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:35.175 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:35.175 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:26:40.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:40.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:40.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:40.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:40.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:40.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:40.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:40.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:40.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:40.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:40.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:26:40.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:26:40.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:26:40.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:40.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:40.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:40.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:26:40.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:40.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:26:40.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:40.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:26:40.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:26:40.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:40.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:40.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:40.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:26:40.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:40.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:26:40.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:40.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:26:40.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:26:40.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:40.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:40.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:40.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:26:40.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:40.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:26:40.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:26:40.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:26:40.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:26:40.206 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:26:40.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:40.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:40.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:40.208 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:26:45.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:26:45.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:26:45.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:45.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:45.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:45.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:45.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:26:45.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:45.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:45.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:26:45.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:26:45.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:26:45.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:26:45.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:45.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:45.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:26:45.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:26:45.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:26:45.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:26:45.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:45.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:26:45.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:26:45.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:45.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:45.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:26:45.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:26:45.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:26:45.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:26:45.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:45.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:26:45.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:26:45.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:26:45.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:26:45.240 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:26:45.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:26:45.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:26:45.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:26:45.770 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:26:45.773 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:26:45.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:26:45.775 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:26:45.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:26:45.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:26:45.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:26:45.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:26:45.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:26:45.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:26:45.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:26:45.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:26:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:26:46.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:46.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:46.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:46.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:46.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:26:47.140 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:26:47.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:47.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:47.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:47.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:47.612 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:26:48.085 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:26:48.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:48.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:48.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:48.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:48.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:26:49.029 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:26:49.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:49.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:49.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:49.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:49.501 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:26:49.973 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:26:50.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:26:50.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:26:50.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:26:50.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:26:50.444 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:26:50.917 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:26:51.390 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:26:51.862 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:26:52.335 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:26:52.808 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:26:53.280 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:26:53.751 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:26:54.224 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:26:54.696 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:26:55.168 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:26:55.639 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:26:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:26:56.585 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:26:57.057 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:26:57.523 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:26:57.994 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:26:58.460 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:26:58.931 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:26:59.404 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:26:59.876 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:27:00.348 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:27:00.819 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:27:01.293 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:27:01.765 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:27:02.237 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:27:02.710 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:27:03.183 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:27:03.655 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:27:04.125 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:27:04.597 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:27:05.070 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:27:05.542 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:27:05.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:27:05.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:27:05.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:05.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:05.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:05.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:05.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:05.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:05.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:05.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:05.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:05.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:05.835 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:27:05.835 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:05.835 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:05.835 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:05.835 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:05.836 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:05.836 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:05.836 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4451 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:10.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:10.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:10.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:10.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:10.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:10.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:10.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:10.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:10.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:10.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:10.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:10.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:10.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:27:10.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:10.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:10.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:27:10.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:10.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:27:10.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:27:10.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:10.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:10.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:10.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:27:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:10.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:27:10.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:27:10.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:27:10.852 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:27:10.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:10.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:10.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:10.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:10.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:10.854 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:27:15.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:15.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:15.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:15.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:15.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:15.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:15.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:15.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:15.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:15.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:15.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:15.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:15.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:27:15.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:15.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:15.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:27:15.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:15.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:27:15.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:27:15.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:15.878 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:15.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:15.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:27:15.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:15.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:27:15.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:15.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:27:15.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:27:15.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:27:15.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:27:15.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:27:15.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:27:15.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:27:15.882 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:27:15.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:15.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:27:16.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:27:16.408 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:27:16.410 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:27:16.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:27:16.412 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:27:16.828 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:27:16.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:16.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:16.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:16.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:27:17.754 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:27:17.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:17.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:17.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:17.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:18.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:27:18.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:27:18.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:18.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:18.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:18.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:19.144 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:27:19.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:27:19.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:19.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:19.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:19.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:20.070 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:27:20.534 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:27:20.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:20.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:20.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:20.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:20.997 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:27:21.460 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:27:21.924 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:27:22.387 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:27:22.850 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:27:23.314 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:27:23.777 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:27:24.240 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:27:24.703 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:27:25.167 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:27:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:27:26.093 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:27:26.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:26.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:26.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:26.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:26.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:26.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:26.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:26.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:26.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:26.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:26.425 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:27:31.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:31.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:31.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:31.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:31.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:31.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:31.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:31.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:31.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:31.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:31.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:27:31.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:27:31.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:27:31.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:31.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:31.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:31.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:27:31.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:31.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:27:31.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:31.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:27:31.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:27:31.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:31.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:31.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:31.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:27:31.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:31.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:27:31.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:31.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:31.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:27:31.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:27:31.452 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:27:31.452 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:27:31.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:27:31.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:27:31.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:31.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:31.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:31.454 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:27:36.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:36.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:36.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:36.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:36.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:36.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:36.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:36.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:36.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:36.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:36.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:27:36.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:27:36.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:27:36.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:36.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:36.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:36.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:27:36.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:36.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:27:36.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:36.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:27:36.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:27:36.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:36.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:36.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:36.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:27:36.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:36.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:27:36.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:36.472 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:36.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:27:36.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:27:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:27:36.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:27:36.475 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:27:36.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:36.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:27:36.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:27:36.997 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:27:36.999 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:27:37.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:27:37.000 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:27:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:27:37.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:37.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:37.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:37.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:37.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:27:38.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:27:38.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:38.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:38.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:38.825 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:27:39.288 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:27:39.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:39.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:39.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:39.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:39.752 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:27:40.215 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:27:40.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:40.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:40.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:40.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:40.678 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:27:41.142 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:27:41.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:41.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:41.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:41.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:41.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:27:42.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:27:42.531 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:27:42.995 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:27:43.458 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:27:43.921 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:27:44.385 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:27:44.848 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:27:45.311 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:27:45.774 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:27:46.237 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:27:46.700 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:27:47.164 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:27:47.627 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:27:48.091 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:27:48.554 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:27:49.017 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:27:49.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:49.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:49.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:49.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:49.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:49.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:49.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:49.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:49.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:49.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:49.040 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:27:49.040 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:49.041 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:49.041 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:49.041 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:49.041 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:49.041 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:49.041 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:27:54.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:54.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:54.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:54.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:54.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:54.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:54.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:54.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:54.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:54.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:54.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:54.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:54.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:27:54.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:54.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:27:54.075 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:27:54.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:54.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:54.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:54.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:27:54.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:54.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:27:54.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:54.077 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:54.077 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:27:54.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:27:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:27:54.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:27:54.081 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:27:54.081 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:54.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:54.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:54.083 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:27:59.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:27:59.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:27:59.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:59.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:59.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:59.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:59.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:27:59.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:59.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:59.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:27:59.105 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:27:59.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:27:59.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:27:59.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:59.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:59.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:27:59.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:27:59.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:27:59.111 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:27:59.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:27:59.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:27:59.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:27:59.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:59.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:59.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:27:59.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:27:59.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:27:59.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:27:59.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:59.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:27:59.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:27:59.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:27:59.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:27:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:27:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:27:59.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:27:59.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:27:59.126 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:27:59.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:27:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:27:59.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:27:59.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:27:59.656 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:27:59.658 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:27:59.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:27:59.659 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:27:59.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:27:59.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:27:59.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:27:59.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:27:59.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:27:59.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:27:59.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:27:59.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:27:59.698 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:27:59.698 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:27:59.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:27:59.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:00.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:28:00.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:00.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:00.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:00.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:00.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:28:01.002 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:28:01.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:01.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:01.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:01.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:01.466 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:28:01.936 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:28:02.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:02.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:02.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:02.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:02.408 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:28:02.882 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:28:03.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:03.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:03.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:03.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:03.354 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:28:03.827 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:28:04.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:04.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:04.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:04.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:04.300 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:28:04.772 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:28:05.244 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:28:05.717 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:28:06.189 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:28:06.661 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:28:07.134 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:28:07.606 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:28:07.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:28:07.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:28:07.704 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:07.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:07.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:07.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:07.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:07.709 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:28:12.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:12.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:12.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:12.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:12.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:12.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:12.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:12.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:12.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:12.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:12.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:12.730 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:12.730 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:28:12.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:12.732 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:12.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:28:12.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:12.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:12.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:28:12.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:12.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:28:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:28:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:28:12.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:28:12.737 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:28:12.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:28:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:12.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:12.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:12.739 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:28:17.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:17.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:17.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:17.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:17.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:17.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:17.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:17.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:17.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:17.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:17.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:28:17.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:28:17.757 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:28:17.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:17.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:17.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:17.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:28:17.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:17.759 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:28:17.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:17.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:28:17.761 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:28:17.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:17.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:17.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:17.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:28:17.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:17.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:28:17.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:17.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:17.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:28:17.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:17.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:28:17.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:28:17.769 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:28:17.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:17.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:28:18.252 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:28:18.296 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:28:18.297 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:28:18.298 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:28:18.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:28:18.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:28:18.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:28:18.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:28:18.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:18.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:28:18.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:28:18.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:28:18.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:28:18.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:28:18.341 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:28:18.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:18.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:18.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:28:18.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:18.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:18.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:18.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:19.186 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:28:19.659 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:28:19.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:19.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:19.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:19.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:20.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:28:20.603 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:28:20.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:20.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:20.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:20.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:21.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:28:21.549 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:28:21.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:21.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:21.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:21.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:22.021 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:28:22.492 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:28:22.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:22.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:22.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:22.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:22.965 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:28:23.437 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:28:23.909 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:28:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:28:24.855 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:28:25.325 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:28:25.792 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:28:26.265 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:28:26.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:28:26.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:28:26.346 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:26.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:26.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:26.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:26.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:26.350 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:28:31.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:31.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:31.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:31.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:31.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:31.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:31.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:31.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:31.364 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:31.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:31.365 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:28:31.368 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:28:31.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:28:31.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:31.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:31.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:31.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:28:31.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:31.369 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:28:31.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:31.371 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:28:31.371 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:28:31.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:31.371 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:31.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:28:31.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:31.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:31.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:28:31.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:31.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:31.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:28:31.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:28:31.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:28:31.377 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:28:31.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:31.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:31.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:31.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:31.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:31.379 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:28:36.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:36.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:36.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:36.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:36.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:36.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:36.394 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:36.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:36.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:28:36.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:28:36.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:28:36.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:36.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:36.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:36.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:28:36.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:36.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:28:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:36.399 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:28:36.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:28:36.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:36.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:36.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:36.400 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:28:36.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:36.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:28:36.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:36.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:36.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:28:36.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:36.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.407 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:28:36.407 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:28:36.408 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:28:36.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:36.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:28:36.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:28:36.939 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:28:36.941 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:28:36.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:28:36.943 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:28:36.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:28:36.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:28:36.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:28:36.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:36.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:28:36.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:28:36.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:28:36.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:28:36.981 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:28:36.982 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:28:36.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:36.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:37.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:28:37.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:37.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:37.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:28:38.309 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:28:38.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:38.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:38.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:38.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:38.780 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:28:39.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:28:39.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:39.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:39.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:39.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:39.726 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:28:40.198 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:28:40.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:40.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:40.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:40.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:40.669 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:28:41.143 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:28:41.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:41.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:41.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:41.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:41.616 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:28:42.088 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:28:42.559 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:28:43.032 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:28:43.505 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:28:43.977 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:28:44.450 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:28:44.923 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:28:44.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:28:44.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:28:44.986 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:44.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:44.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:44.989 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:44.990 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:28:49.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:49.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:49.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:49.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:49.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:49.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:50.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:50.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:50.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:50.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:50.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:28:50.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:28:50.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:28:50.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:50.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:50.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:50.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:28:50.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:50.009 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:28:50.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:50.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:28:50.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:28:50.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:50.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:50.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:50.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:28:50.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:50.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:28:50.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:50.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:28:50.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:28:50.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:50.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:50.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:50.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:28:50.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:50.016 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:28:50.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:28:50.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:28:50.020 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:28:50.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:50.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:50.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:50.022 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:28:55.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:28:55.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:28:55.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:55.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:55.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:55.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:55.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:28:55.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:55.047 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:55.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:28:55.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:28:55.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:28:55.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:28:55.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:55.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:55.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:28:55.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:28:55.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:28:55.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:28:55.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:55.055 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:28:55.055 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:28:55.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:55.055 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:55.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:28:55.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:28:55.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:28:55.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:28:55.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:55.057 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:28:55.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:28:55.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:55.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:28:55.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:28:55.058 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:28:55.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:28:55.058 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:28:55.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:55.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:28:55.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:28:55.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:28:55.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:28:55.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:28:55.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:28:55.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:28:55.061 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:28:55.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:28:55.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:28:55.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:28:55.591 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:28:55.594 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:28:55.596 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:28:55.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:28:55.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:28:55.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:28:55.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:28:55.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:55.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:28:55.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:28:55.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:28:55.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:28:55.634 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:28:55.634 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:28:55.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:55.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:28:56.016 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:28:56.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:56.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:56.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:56.488 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:28:56.961 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:28:57.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:57.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:57.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:57.433 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:28:57.905 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:28:58.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:58.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:58.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:58.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:58.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:28:58.851 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:28:59.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:28:59.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:28:59.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:28:59.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:28:59.322 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:28:59.794 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:29:00.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:00.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:00.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:00.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:00.267 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:29:00.740 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:29:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:29:01.686 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:29:02.157 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:29:02.629 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:29:03.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:29:03.574 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:29:03.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:29:03.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:29:03.639 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:03.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:03.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:03.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:03.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:03.643 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:29:08.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:08.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:08.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:08.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:08.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:08.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:08.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:08.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:08.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:08.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:29:08.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:29:08.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:29:08.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:08.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:08.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:08.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:29:08.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:08.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:29:08.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:08.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:08.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:29:08.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:08.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:29:08.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:29:08.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:08.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:08.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:08.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:29:08.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:08.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:29:08.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:29:08.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:29:08.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:29:08.669 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:29:08.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:08.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:08.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:08.671 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:29:13.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:13.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:13.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:13.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:13.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:13.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:13.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:13.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:13.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:13.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:13.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:29:13.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:29:13.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:29:13.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:13.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:13.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:13.690 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:29:13.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:13.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:29:13.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:13.691 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:29:13.691 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:29:13.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:13.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:13.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:13.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:29:13.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:13.691 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:29:13.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:13.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:13.693 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:29:13.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:13.695 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:29:13.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:29:13.696 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:29:13.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:13.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:29:14.179 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:29:14.227 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:29:14.230 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:29:14.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:29:14.231 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:29:14.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:29:14.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:29:14.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:29:14.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:14.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:29:14.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:29:14.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:29:14.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:29:14.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:29:14.269 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:29:14.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:14.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:14.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:29:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:14.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:14.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:14.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:15.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:29:15.588 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:29:15.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:15.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:15.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:15.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:16.052 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:29:16.516 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:29:16.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:16.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:16.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:16.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:16.986 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:29:17.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:29:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:17.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:17.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:17.919 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:29:18.390 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:29:18.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:18.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:18.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:18.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:18.862 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:29:19.335 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:29:19.808 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:29:20.281 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:29:20.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:29:21.226 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:29:21.697 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:29:22.170 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:29:22.642 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:29:23.115 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:29:23.587 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:29:24.060 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:29:24.532 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:29:25.006 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:29:25.478 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:29:25.950 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:29:26.448 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:29:26.920 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:29:27.394 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:29:27.866 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:29:28.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:29:28.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:29:28.275 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:29:28.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:28.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:28.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:28.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:28.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:28.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:28.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:28.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:28.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:28.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:28.284 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:28.285 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3152 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:33.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:33.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:33.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:33.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:33.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:33.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:33.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:33.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:33.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:33.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:33.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:33.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:33.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:29:33.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:33.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:33.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:29:33.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:33.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:29:33.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:29:33.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:33.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:33.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:29:33.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:33.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:33.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:29:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:29:33.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:29:33.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:29:33.296 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:29:33.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:33.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:33.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:33.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:33.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:33.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:33.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:33.297 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:29:38.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:38.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:38.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:38.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:38.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:38.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:38.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:38.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:38.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:38.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:38.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:29:38.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:29:38.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:29:38.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:38.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:38.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:38.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:29:38.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:38.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:29:38.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:38.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:29:38.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:29:38.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:38.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:38.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:38.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:29:38.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:38.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:29:38.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:38.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:38.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:29:38.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:29:38.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:29:38.328 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:29:38.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:38.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:29:38.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:29:38.854 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:29:38.856 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:29:38.858 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:29:38.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:29:38.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:29:38.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:29:38.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:29:38.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:38.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:29:38.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:29:38.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:29:38.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:29:38.899 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:29:38.899 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:29:38.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:38.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:29:39.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:39.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:39.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:39.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:29:40.227 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:29:40.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:40.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:40.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:40.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:40.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:29:41.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:29:41.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:41.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:41.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:41.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:41.643 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:29:42.115 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:29:42.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:42.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:42.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:42.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:42.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:29:43.059 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:29:43.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:43.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:43.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:43.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:43.533 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:29:44.005 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:29:44.479 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:29:44.950 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:29:45.422 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:29:45.896 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:29:46.368 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:29:46.841 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:29:46.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:29:46.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:29:46.903 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:29:46.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:46.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:46.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:46.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:46.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:46.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:46.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:46.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:46.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:46.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:46.913 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:29:46.913 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.914 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.915 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.915 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.915 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:46.915 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:29:51.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:51.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:51.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:51.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:51.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:51.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:51.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:51.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:51.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:51.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:51.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:29:51.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:29:51.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:29:51.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:51.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:51.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:51.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:29:51.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:51.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:29:51.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:51.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:29:51.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:29:51.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:51.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:51.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:51.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:29:51.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:51.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:29:51.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:51.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:29:51.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:29:51.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:51.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:51.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:51.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:29:51.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:51.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:29:51.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:51.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:29:51.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:29:51.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:29:51.937 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:29:51.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:51.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:51.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:51.939 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:29:56.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:29:56.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:29:56.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:56.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:56.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:56.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:56.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:29:56.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:56.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:56.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:29:56.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:29:56.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:29:56.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:29:56.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:56.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:56.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:29:56.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:29:56.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:29:56.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:29:56.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:56.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:29:56.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:29:56.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:56.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:56.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:29:56.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:29:56.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:29:56.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:29:56.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:56.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:29:56.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:29:56.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:56.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:29:56.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:29:56.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:29:56.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:29:56.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:29:56.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.965 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:29:56.965 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:29:56.965 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:29:56.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:29:56.970 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:29:57.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:29:57.493 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:29:57.495 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:29:57.497 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:29:57.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:29:57.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:29:57.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:29:57.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:29:57.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:57.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:29:57.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:29:57.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:29:57.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:29:57.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:29:57.538 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:29:57.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:57.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:29:57.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:29:57.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:57.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:57.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:57.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:58.386 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:29:58.858 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:29:58.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:58.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:58.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:58.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:29:59.330 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:29:59.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:29:59.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:29:59.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:29:59.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:29:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:00.275 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:30:00.747 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:30:00.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:00.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:00.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:00.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:01.220 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:30:01.692 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:30:01.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:01.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:01.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:01.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:02.164 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:30:02.638 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:30:03.110 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:30:03.582 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:30:04.056 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:30:04.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:30:05.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:30:05.471 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:30:05.945 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:30:06.417 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:30:06.890 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:30:07.363 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:30:07.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:30:07.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:30:07.544 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:07.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:07.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:07.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:07.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:07.548 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:30:12.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:12.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:12.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:12.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:12.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:12.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:12.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:12.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:12.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:12.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:12.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:30:12.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:30:12.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:30:12.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:12.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:12.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:12.567 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:30:12.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:12.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:30:12.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:12.568 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:30:12.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:30:12.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:12.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:12.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:12.569 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:30:12.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:12.569 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:30:12.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:12.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:30:12.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:30:12.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:12.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:12.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:12.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:30:12.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:12.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:30:12.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:30:12.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:30:12.574 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:30:12.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:12.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:12.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:12.575 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:30:17.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:17.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:17.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:17.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:17.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:17.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:17.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:17.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:17.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:17.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:17.594 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:30:17.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:30:17.598 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:30:17.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:17.598 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:17.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:17.599 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:30:17.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:17.599 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:30:17.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:17.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:30:17.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:30:17.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:17.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:17.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:17.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:30:17.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:17.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:30:17.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:17.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:30:17.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:30:17.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:17.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:17.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:17.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:30:17.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:17.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:30:17.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:30:17.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:30:17.607 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:30:17.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:17.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:30:18.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:30:18.138 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:30:18.141 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:30:18.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:30:18.142 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:30:18.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:30:18.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:30:18.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:30:18.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:30:18.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:30:18.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:30:18.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:30:18.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:30:18.180 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:30:18.180 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-07 03:30:18.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:30:18.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:30:18.562 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:30:18.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:18.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:18.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:18.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:19.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:30:19.508 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:30:19.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:19.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:19.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:19.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:19.979 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:30:20.452 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:30:20.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:20.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:20.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:20.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:20.925 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:30:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:30:21.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:21.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:21.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:21.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:21.870 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:30:22.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:30:22.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:22.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:22.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:22.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:22.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:30:23.290 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:30:23.761 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:30:24.234 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:30:24.707 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:30:25.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:30:25.653 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:30:26.125 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:30:26.597 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:30:27.070 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:30:27.543 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:30:28.015 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:30:28.488 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:30:28.961 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:30:29.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:30:29.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:30:29.186 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:30:29.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:29.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:29.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:29.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:29.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:29.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:29.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:29.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:29.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:29.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:29.193 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:29.193 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2500 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:34.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:34.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:34.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:34.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:34.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:34.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:34.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:34.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:34.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:34.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:34.208 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:30:34.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:30:34.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:30:34.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:34.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:34.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:34.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:30:34.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:34.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:30:34.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:34.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:30:34.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:30:34.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:34.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:34.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:34.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:30:34.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:34.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:30:34.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:34.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:30:34.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:30:34.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:34.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:34.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:34.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:30:34.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:34.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:30:34.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:30:34.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:30:34.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:30:34.223 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:30:34.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:34.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:34.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:34.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:34.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:34.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:34.226 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:30:39.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:39.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:39.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:39.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:39.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:39.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:39.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:39.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:39.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:39.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:39.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:30:39.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:30:39.241 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:30:39.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:39.241 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:39.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:39.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:30:39.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:39.242 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:30:39.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:39.242 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:30:39.242 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:30:39.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:39.243 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:39.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:39.243 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:30:39.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:39.243 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:30:39.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:39.244 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:39.244 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:30:39.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:30:39.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:30:39.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:30:39.246 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:30:39.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:39.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:39.250 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:30:39.727 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:30:39.771 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:30:39.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:30:39.772 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:30:39.774 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:30:40.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:30:40.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:40.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:40.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:40.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:40.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:30:41.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:30:41.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:41.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:41.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:41.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:41.581 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:30:42.046 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:30:42.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:42.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:42.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:42.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:42.510 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:30:42.974 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:30:43.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:43.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:43.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:43.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:43.438 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:30:43.900 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:30:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:44.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:44.363 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:30:44.827 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:30:45.292 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:30:45.756 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:30:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:30:46.683 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:30:47.147 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:30:47.611 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:30:48.075 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:30:48.538 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:30:49.002 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:30:49.466 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:30:49.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:49.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:49.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:49.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:49.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:49.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:49.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:49.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:49.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:49.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:49.788 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:30:49.788 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:49.788 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:49.788 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:49.788 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:49.788 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:30:54.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:54.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:54.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:54.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:54.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:54.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:54.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:54.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:54.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:54.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:54.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:30:54.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:30:54.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:30:54.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:54.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:54.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:54.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:30:54.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:54.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:30:54.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:54.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:30:54.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:30:54.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:54.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:54.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:54.803 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:30:54.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:54.803 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:30:54.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:54.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:30:54.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:30:54.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:54.805 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:54.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:54.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:30:54.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:54.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:30:54.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:54.807 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:30:54.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:30:54.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:30:54.808 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:30:54.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:30:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:54.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:54.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:54.810 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:30:59.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:30:59.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:30:59.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:59.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:59.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:59.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:59.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:30:59.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:59.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:59.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:30:59.827 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:30:59.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:30:59.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:30:59.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:59.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:59.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:30:59.830 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:30:59.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:30:59.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:30:59.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:59.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:30:59.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:30:59.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:30:59.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:30:59.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:30:59.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:59.834 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:30:59.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:30:59.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:30:59.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:30:59.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:30:59.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:30:59.837 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:30:59.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:30:59.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:30:59.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:30:59.837 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:30:59.838 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:30:59.838 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:30:59.838 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:30:59.843 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:31:00.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:31:00.373 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:31:00.376 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:31:00.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:31:00.379 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:31:00.770 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:31:00.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:00.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:00.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:00.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:01.235 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:31:01.699 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:31:01.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:01.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:01.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:01.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:02.163 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:31:02.627 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:31:02.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:02.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:02.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:02.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:03.090 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:31:03.554 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:31:03.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:03.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:03.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:31:04.483 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:31:04.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:04.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:04.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:04.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:04.952 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:31:05.416 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:31:05.887 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:31:06.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:31:06.829 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:31:07.295 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:31:07.758 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:31:08.223 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:31:08.689 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:31:09.162 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:31:09.635 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:31:10.107 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:31:10.582 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:31:11.054 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:31:11.528 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:31:11.993 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:12.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:12.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:12.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:12.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:12.388 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:31:17.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:17.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:17.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:17.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:17.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:17.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:17.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:17.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:31:17.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:17.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:31:17.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:31:17.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:31:17.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:31:17.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:31:17.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:17.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:17.418 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:31:17.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:31:17.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:31:17.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:17.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:31:17.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:31:17.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:31:17.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:17.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:17.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:31:17.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:31:17.421 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:31:17.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:17.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:31:17.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:31:17.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:31:17.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:17.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:17.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:31:17.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:31:17.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:31:17.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:31:17.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:31:17.426 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:31:17.427 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:17.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:31:17.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:31:17.959 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:31:17.961 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:31:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:31:17.962 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:31:17.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:31:17.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:31:17.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:31:17.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:31:17.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:31:17.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:31:17.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:31:17.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:31:18.375 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:31:18.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:18.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:18.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:18.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:18.846 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:31:19.318 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:31:19.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:19.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:19.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:19.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:19.787 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:31:20.258 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:31:20.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:20.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:20.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:20.732 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:31:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:31:21.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:21.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:21.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:21.670 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:31:22.141 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:31:22.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:22.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:22.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:22.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:22.615 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:31:23.087 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:31:23.557 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:31:24.026 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:31:24.496 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:31:24.969 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:31:25.442 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:31:25.914 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:31:26.385 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:31:26.856 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:31:27.323 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:31:27.793 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:31:28.266 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:31:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:31:29.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:31:29.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:31:29.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:29.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:29.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:29.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:29.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:29.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:29.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:29.009 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:31:29.009 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (TRX1@172.18.188.20:5700/1) RX TRXD message (ver=1 fn=2508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:29.010 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2508 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:34.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:34.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:34.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:34.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:34.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:34.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:34.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:34.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:31:34.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:34.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:31:34.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:31:34.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:31:34.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:31:34.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:31:34.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:34.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:34.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:31:34.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:31:34.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:31:34.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:31:34.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:31:34.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:31:34.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:34.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:31:34.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:31:34.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:31:34.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:34.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:34.026 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:31:34.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:31:34.026 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:31:34.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:31:34.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:31:34.028 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:31:34.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:34.033 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:31:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:31:34.555 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:31:34.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:31:34.557 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:31:34.558 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:31:34.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:31:34.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:31:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:31:34.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:31:34.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:31:34.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:31:34.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:31:34.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:31:34.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:31:35.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:35.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:35.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:35.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:35.447 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:31:35.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:31:36.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:36.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:36.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:36.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:36.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:31:36.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:31:37.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:37.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:37.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:37.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:37.336 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:31:37.809 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:31:38.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:38.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:38.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:38.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:38.277 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:31:38.743 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:31:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:39.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:39.209 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:31:39.680 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:31:40.144 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:31:40.609 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:31:41.076 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:31:41.545 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:31:42.016 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:31:42.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:31:42.957 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:31:43.428 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:31:43.901 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:31:44.371 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:31:44.835 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:31:45.300 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:31:45.765 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:31:46.234 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:31:46.704 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:31:47.175 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:31:47.646 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:31:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:31:48.580 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:31:49.045 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:31:49.510 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:31:49.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:31:49.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:31:49.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:49.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:49.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:49.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:49.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:49.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:49.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:49.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:49.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:49.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:49.616 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:49.616 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:54.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:54.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:54.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:54.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:54.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:54.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:54.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:54.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:31:54.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:54.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:31:54.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:31:54.629 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:31:54.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:31:54.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:31:54.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:54.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:54.630 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:31:54.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:31:54.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:31:54.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:54.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:31:54.633 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:31:54.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:31:54.633 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:54.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:54.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:31:54.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:31:54.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:31:54.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:31:54.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:31:54.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:31:54.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:31:54.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:31:54.638 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:31:54.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:31:54.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:31:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:31:55.160 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:31:55.161 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:31:55.162 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:31:55.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:31:55.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:31:55.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:31:55.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:31:55.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:31:55.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:31:55.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:31:55.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:31:55.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:31:55.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:31:55.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:31:55.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:31:55.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:31:55.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:31:55.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:31:55.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:31:55.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:31:55.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:31:55.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:31:55.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:31:55.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:31:55.213 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:31:55.213 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:00.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:00.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:00.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:00.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:00.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:00.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:00.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:00.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:00.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:00.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:00.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:32:00.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:32:00.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:32:00.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:00.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:00.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:00.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:32:00.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:00.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:32:00.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:00.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:00.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:32:00.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:00.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:32:00.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:32:00.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:00.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:00.242 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:32:00.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:00.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:00.242 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:32:00.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:32:00.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:32:00.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:32:00.246 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:32:00.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:00.250 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:32:00.714 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:32:00.778 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:32:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:00.779 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:32:00.780 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:32:00.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:00.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:00.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:00.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:00.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:00.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:00.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:00.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:00.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:00.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:00.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:00.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:00.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:00.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:00.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:00.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:00.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:00.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:00.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:00.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:00.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:00.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:01.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:01.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:01.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:01.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:01.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:01.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:01.042 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:32:01.042 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:32:01.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.178 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:32:01.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:01.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.224 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:32:01.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:01.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:01.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:01.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:01.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:01.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:01.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:01.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:01.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:01.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:01.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:01.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:01.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:01.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:01.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:01.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:01.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:01.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:01.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:01.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:01.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:01.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:01.646 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:32:01.646 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:32:01.647 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:32:01.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:01.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:02.111 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:32:02.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:02.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:02.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:02.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:02.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:02.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:02.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:02.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:02.431 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:32:02.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:02.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:02.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:02.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:02.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:02.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:02.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:02.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:02.444 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:02.444 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:07.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:07.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:07.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:07.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:07.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:07.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:07.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:07.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:07.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:07.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:07.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:32:07.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:32:07.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:32:07.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:07.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:07.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:07.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:32:07.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:07.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:32:07.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:07.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:32:07.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:32:07.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:07.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:07.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:07.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:32:07.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:07.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:32:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:07.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:07.473 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:32:07.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:07.475 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:32:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:32:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:32:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:32:07.475 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:32:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:32:07.476 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:32:07.476 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:32:07.476 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:07.481 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:32:07.944 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:32:08.005 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:32:08.006 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:32:08.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:08.007 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:32:08.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:08.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:08.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:08.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:08.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:08.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:08.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:08.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:08.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:08.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:08.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:08.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:08.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:08.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:08.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:08.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:08.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:32:08.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:08.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:08.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:08.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:08.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:32:09.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:32:09.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:09.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:09.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:09.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:09.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:32:10.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:32:10.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:10.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:10.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:10.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:10.769 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:32:11.235 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:32:11.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:11.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:11.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:11.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:11.704 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:32:12.173 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:32:12.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:12.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:12.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:12.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:12.640 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:32:13.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:13.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:13.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:13.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:13.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:13.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:13.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:13.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:32:13.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:13.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:13.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:13.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:13.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:13.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:13.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:13.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:13.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:13.156 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:32:13.156 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:32:13.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:13.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:13.576 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:32:14.041 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:32:14.505 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:32:14.970 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:32:15.435 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:32:15.900 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:32:16.365 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:32:16.831 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:32:17.296 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:32:17.761 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:32:18.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:18.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:18.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:18.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:18.165 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:32:18.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:18.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:18.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:18.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:18.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:18.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:18.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:18.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:18.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:18.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:18.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:18.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:18.225 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:32:18.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:18.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:18.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:18.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:18.696 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:32:19.165 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:32:19.632 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:32:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:32:20.562 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:32:21.027 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:32:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:32:21.969 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:32:22.442 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:32:22.915 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:32:23.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:23.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:23.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:23.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:23.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:23.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:23.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:23.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:23.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:23.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:23.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:23.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:23.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:23.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:23.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:23.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:23.288 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:32:23.288 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:32:23.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:23.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:23.382 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:32:23.847 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:32:24.311 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:32:24.778 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:32:25.246 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:32:25.711 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:32:26.176 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:32:26.645 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:32:27.117 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:32:27.590 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:32:28.056 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:32:28.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:28.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:28.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:28.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:28.299 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:28.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:28.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:28.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:28.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:28.313 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:28.313 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4546 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:32:33.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:33.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:33.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:33.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:33.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:33.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:33.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:33.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:33.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:33.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:33.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:32:33.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:32:33.336 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:32:33.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:33.336 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:33.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:33.337 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:32:33.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:33.337 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:32:33.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:33.337 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:32:33.338 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:32:33.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:33.338 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:33.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:33.338 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:32:33.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:33.338 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:32:33.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:33.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:33.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:32:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:32:33.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:32:33.343 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:32:33.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:33.348 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:32:33.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:32:33.885 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:32:33.886 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:32:33.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:33.887 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:32:33.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:33.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:33.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:33.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:33.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:33.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:33.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:33.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:33.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:33.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:33.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:33.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:33.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:33.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:33.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:33.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:32:34.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:34.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:34.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:34.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:34.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:32:35.222 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:32:35.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:35.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:35.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:35.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:35.688 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:32:36.155 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:32:36.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:36.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:36.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:36.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:36.622 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:32:37.091 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:32:37.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:37.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:37.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:37.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:37.556 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:32:38.022 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:32:38.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:38.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:38.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:38.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:38.488 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:32:38.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:32:38.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:38.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:38.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:38.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:38.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:38.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:38.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:38.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:38.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:38.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:38.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:38.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:38.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:38.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:38.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:38.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:38.994 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:32:38.994 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:32:38.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:38.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:32:39.888 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:32:40.353 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:32:40.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:32:41.282 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:32:41.747 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:32:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:32:42.676 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:32:43.142 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:32:43.606 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:32:43.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:43.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:44.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:44.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:44.003 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:32:44.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:44.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:44.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:44.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:44.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:44.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:44.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:44.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:44.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:44.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:44.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:44.071 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:32:44.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:44.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:44.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:44.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:32:45.001 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:32:45.466 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:32:45.931 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:32:46.399 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:32:46.864 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:32:47.335 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:32:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:32:48.281 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:32:48.748 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:32:49.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:49.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:49.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:49.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:49.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:49.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:49.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:49.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:49.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:49.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:49.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:49.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:49.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:49.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:49.117 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:32:49.117 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:32:49.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:49.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:49.214 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:32:49.679 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:32:50.145 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:32:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:32:51.084 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:32:51.549 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:32:52.014 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:32:52.478 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:32:52.943 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:32:53.407 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:32:53.875 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:32:54.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:54.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:54.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:54.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:54.125 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:54.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:54.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:54.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:54.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:54.136 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:32:59.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:32:59.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:32:59.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:59.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:59.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:59.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:59.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:32:59.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:59.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:59.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:32:59.150 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:32:59.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:32:59.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:32:59.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:59.154 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:59.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:32:59.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:32:59.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:32:59.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:32:59.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:32:59.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:32:59.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:32:59.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:59.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:59.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:32:59.159 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:32:59.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:32:59.159 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:32:59.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:59.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:32:59.162 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:32:59.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:32:59.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:32:59.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:32:59.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:32:59.168 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:32:59.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:32:59.172 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:32:59.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:32:59.698 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:32:59.699 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:32:59.700 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:32:59.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:59.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:59.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:59.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:59.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:32:59.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:32:59.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:32:59.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:32:59.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:59.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:59.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:59.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:32:59.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:32:59.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:32:59.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:32:59.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:32:59.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:00.105 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:33:00.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:00.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:00.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:00.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:00.578 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:33:01.051 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:33:01.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:01.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:01.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:01.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:01.522 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:33:01.992 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:33:02.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:02.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:02.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:02.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:02.463 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:33:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:33:03.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:03.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:03.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:03.409 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:33:03.881 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:33:04.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:04.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:04.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:04.352 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:33:04.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:04.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:04.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:04.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:04.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:04.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:04.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:04.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:04.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:04.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:04.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:04.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:04.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:04.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:04.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:04.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:04.818 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:33:04.818 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:33:04.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:04.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:04.824 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:33:05.289 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:33:05.755 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:33:06.220 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:33:06.685 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:33:07.150 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:33:07.615 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:33:08.082 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:33:08.555 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:33:09.028 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:33:09.500 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:33:09.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:09.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:09.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:09.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:09.826 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:33:09.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:09.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:09.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:09.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:09.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:09.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:09.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:09.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:09.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:09.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:09.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:09.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:09.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:09.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:09.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:09.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:09.971 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:33:10.442 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:33:10.913 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:33:11.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:33:11.845 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:33:12.307 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:33:12.777 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:33:13.248 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:33:13.722 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:33:14.194 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:33:14.666 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:33:14.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:14.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:14.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:14.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:14.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:14.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:14.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:14.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:14.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:14.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:14.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:14.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:14.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:14.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:14.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:14.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:14.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:33:14.948 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:33:14.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:14.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:15.136 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:33:15.606 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:33:16.079 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:33:16.553 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:33:17.025 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:33:17.498 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:33:17.970 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:33:18.434 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:33:18.898 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:33:19.363 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:33:19.827 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:33:19.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:19.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:19.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:19.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:19.955 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:33:19.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:19.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:19.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:19.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:19.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:19.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:33:19.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:33:19.975 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:33:19.975 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.975 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.975 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.975 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:19.976 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4522 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:24.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:33:24.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:33:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:24.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:24.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:24.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:33:24.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:24.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:33:24.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:33:24.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:33:24.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:33:24.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:33:24.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:24.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:24.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:33:24.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:33:24.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:33:24.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:24.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:33:24.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:33:24.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:33:24.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:24.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:24.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:33:24.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:33:24.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:33:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:33:24.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:33:24.999 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:33:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.002 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:33:25.002 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:33:25.002 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:33:25.002 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:25.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:25.007 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:33:25.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:33:25.536 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:33:25.538 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:33:25.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:25.541 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:33:25.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:25.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:25.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:25.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:25.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:25.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:25.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:25.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:25.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:25.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:25.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:25.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:25.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:25.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:25.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:25.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:25.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:33:26.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:26.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:26.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:26.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:26.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:33:26.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:33:27.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:27.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:27.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:27.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:27.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:33:27.834 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:33:28.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:28.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:28.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:28.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:33:28.778 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:33:29.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:29.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:29.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:29.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:29.251 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:33:29.723 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:33:30.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:30.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:30.196 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:33:30.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:30.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:30.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:30.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:30.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:30.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:30.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:30.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:30.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:30.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:30.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:30.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:30.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:30.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:30.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:30.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:30.660 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:33:30.660 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:33:30.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:30.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:30.668 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:33:31.133 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:33:31.597 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:33:32.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:33:32.542 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:33:33.011 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:33:33.476 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:33:33.941 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:33:34.405 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:33:34.870 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:33:35.340 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:33:35.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:35.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:35.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:35.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:35.668 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:33:35.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:35.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:35.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:35.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:35.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:35.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:35.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:35.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:35.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:35.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:35.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:35.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:35.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:35.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:35.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:33:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:33:36.744 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:33:37.215 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:33:37.685 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:33:38.159 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:33:38.626 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:33:39.092 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:33:39.559 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:33:40.030 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:33:40.495 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:33:40.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:40.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:40.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:40.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:40.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:40.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:40.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:40.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:40.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:40.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:40.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:40.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:40.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:40.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:40.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:40.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:40.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:33:40.776 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:33:40.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:40.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:40.963 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:33:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:33:41.898 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:33:42.371 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:33:42.843 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:33:43.315 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:33:43.786 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:33:44.251 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:33:44.715 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:33:45.180 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:33:45.644 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:33:45.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:45.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:45.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:45.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:45.786 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:45.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:45.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:33:45.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:33:45.796 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:33:50.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:33:50.799 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:33:50.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:50.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:50.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:50.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:50.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:50.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:33:50.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:50.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:33:50.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:33:50.825 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:33:50.825 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:33:50.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:33:50.825 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:50.826 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:33:50.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:50.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:33:50.826 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:33:50.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:50.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:33:50.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:33:50.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:33:50.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:50.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:50.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:33:50.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:33:50.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:33:50.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:50.832 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:33:50.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:33:50.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:33:50.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:50.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:50.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:33:50.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:33:50.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:33:50.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:33:50.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:33:50.837 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:33:50.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:33:50.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:50.842 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:33:51.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:33:51.368 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:33:51.370 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:33:51.371 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:33:51.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:51.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:51.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:51.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:51.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:51.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:51.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:51.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:51.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:51.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:51.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:51.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:51.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:51.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:51.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:51.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:51.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:51.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:51.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:51.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:51.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:51.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:51.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:51.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:51.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:51.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:51.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:51.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:51.724 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:33:51.724 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:33:51.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:51.774 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:33:51.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:51.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:51.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:51.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:52.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:52.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:52.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:52.101 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:33:52.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:52.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:52.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:52.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:52.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:52.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:52.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:52.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:52.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:52.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:52.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:52.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:52.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:52.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.239 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:33:52.706 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:33:52.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:52.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:52.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:52.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:52.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:52.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:52.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:52.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:52.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:52.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:52.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:52.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:52.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:52.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:52.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:52.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:52.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:52.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:52.937 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:33:52.938 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:33:52.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:52.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:53.171 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:33:53.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:53.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:53.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:53.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:53.491 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:33:53.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:53.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:53.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:53.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:53.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:53.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:53.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:53.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:53.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:33:53.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:33:53.505 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:53.505 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:33:58.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:33:58.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:33:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:58.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:58.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:58.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:58.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:33:58.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:33:58.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:58.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:33:58.516 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:33:58.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:33:58.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:33:58.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:33:58.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:58.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:33:58.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:33:58.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:33:58.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:33:58.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:58.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:33:58.520 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:33:58.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:33:58.520 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:58.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:33:58.520 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:33:58.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:33:58.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:33:58.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:58.522 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:33:58.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:33:58.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:33:58.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:33:58.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:33:58.523 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:33:58.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:33:58.523 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:33:58.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:33:58.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:33:58.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:33:58.526 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:33:58.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:33:58.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:33:59.003 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:33:59.056 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:33:59.057 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:33:59.057 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:33:59.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:59.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:59.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:59.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:33:59.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:33:59.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:33:59.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:33:59.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:59.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:59.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:59.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:33:59.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:33:59.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:33:59.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:33:59.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:59.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:33:59.471 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:33:59.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:33:59.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:33:59.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:33:59.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:33:59.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:34:00.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:34:00.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:34:00.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:34:00.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:34:00.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:34:00.883 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:34:01.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:34:01.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:34:01.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:34:01.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:34:01.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:34:01.815 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:34:02.286 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:34:02.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:34:02.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:34:02.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:34:02.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:34:02.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:34:03.231 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:34:03.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:34:03.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:34:03.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:34:03.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:34:03.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:34:04.175 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:34:04.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:34:05.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:34:05.591 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:34:06.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:34:06.535 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:34:07.007 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:34:07.478 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:34:07.949 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:34:08.419 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:34:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:34:09.364 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:34:09.837 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:34:10.304 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:34:10.771 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:34:11.238 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:34:11.707 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:34:12.178 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:34:12.644 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:34:13.110 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:34:13.578 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:34:14.043 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:34:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:34:14.975 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:34:15.441 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:34:15.913 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:34:16.379 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:34:16.844 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:34:17.311 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:34:17.779 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:34:18.245 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:34:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:34:19.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:19.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:34:19.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:19.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:19.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:19.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:19.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:34:19.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:19.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:19.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:34:19.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:34:19.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:19.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:34:19.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:34:19.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:34:19.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:34:19.179 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:34:19.179 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:34:19.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:19.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:19.179 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:34:19.644 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:34:20.108 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:34:20.573 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:34:21.039 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:34:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:34:21.968 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:34:22.434 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:34:22.899 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:34:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:34:23.828 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:34:24.292 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:34:24.757 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:34:25.222 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:34:25.687 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:34:26.151 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:34:26.616 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:34:27.081 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:34:27.546 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:34:28.011 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:34:28.476 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:34:28.941 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:34:29.406 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:34:29.870 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:34:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:34:30.800 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:34:31.264 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:34:31.729 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:34:32.194 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:34:32.661 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:34:33.128 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 03:34:33.593 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 03:34:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 03:34:34.522 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 03:34:34.992 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 03:34:35.464 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 03:34:35.929 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 03:34:36.394 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 03:34:36.859 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 03:34:37.324 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 03:34:37.788 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 03:34:38.253 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 03:34:38.718 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 03:34:39.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:39.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:34:39.182 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 03:34:39.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:39.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:39.192 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:34:39.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:39.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:39.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:34:39.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:39.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:39.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:34:39.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:34:39.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:39.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:34:39.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:34:39.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:34:39.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:34:39.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:34:39.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:34:39.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:39.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:39.648 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 03:34:40.115 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 03:34:40.584 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 03:34:41.051 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 03:34:41.519 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 03:34:41.984 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 03:34:42.449 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 03:34:42.916 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 03:34:43.381 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 03:34:43.846 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 03:34:44.315 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 03:34:44.780 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 03:34:45.247 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 03:34:45.713 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 03:34:46.182 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 03:34:46.650 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 03:34:47.117 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 03:34:47.587 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 03:34:48.058 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 03:34:48.531 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 03:34:48.999 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 03:34:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 03:34:49.931 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 03:34:50.398 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 03:34:50.869 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 03:34:51.342 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 03:34:51.810 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 03:34:52.281 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 03:34:52.754 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 03:34:53.223 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 03:34:53.688 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 03:34:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 03:34:54.620 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 03:34:55.085 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 03:34:55.554 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 03:34:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 03:34:56.495 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 03:34:56.966 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 03:34:57.434 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 03:34:57.902 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 03:34:58.371 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 03:34:58.839 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 03:34:59.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:59.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:34:59.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:59.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:59.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:59.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:59.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:34:59.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:34:59.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:34:59.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:34:59.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:34:59.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:59.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:34:59.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:34:59.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:34:59.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:34:59.309 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 03:34:59.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:34:59.309 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:34:59.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:59.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:34:59.773 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 03:35:00.238 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 03:35:00.702 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 03:35:01.167 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 03:35:01.631 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 03:35:02.096 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 03:35:02.560 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 03:35:03.025 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 03:35:03.489 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 03:35:03.953 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 03:35:04.424 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 03:35:04.895 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 03:35:05.368 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 03:35:05.841 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 03:35:06.312 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 03:35:06.784 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 03:35:07.257 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 03:35:07.730 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 03:35:08.202 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 03:35:08.669 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 03:35:09.134 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 03:35:09.598 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 03:35:10.062 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 03:35:10.532 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 03:35:11.004 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 03:35:11.476 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 03:35:11.944 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 03:35:12.410 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 03:35:12.880 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 03:35:13.344 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 03:35:13.808 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 03:35:14.273 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 03:35:14.737 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 03:35:15.201 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 03:35:15.669 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 03:35:16.134 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 03:35:16.597 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 03:35:17.061 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 03:35:17.526 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 03:35:17.990 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 03:35:18.456 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 03:35:18.920 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 03:35:19.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:19.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:19.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:19.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:19.323 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:19.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:19.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:19.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:19.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:19.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:19.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:19.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:19.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:19.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:35:19.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:35:19.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:19.338 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=17637 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:35:24.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:35:24.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:35:24.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:24.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:24.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:24.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:24.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:24.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:35:24.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:24.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:35:24.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:35:24.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:35:24.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:35:24.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:35:24.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:24.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:24.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:35:24.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:35:24.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:35:24.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:35:24.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:35:24.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:35:24.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:24.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:35:24.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:35:24.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:35:24.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:24.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:24.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:35:24.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:35:24.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:35:24.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:35:24.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:35:24.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:35:24.367 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:35:24.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:24.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:35:24.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:35:24.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:35:29.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:35:29.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:35:29.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:29.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:29.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:29.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:29.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:29.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:35:29.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:29.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:35:29.384 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:35:29.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:35:29.387 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:35:29.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:35:29.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:29.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:29.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:35:29.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:35:29.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:35:29.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:29.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:35:29.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:35:29.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:35:29.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:29.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:29.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:35:29.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:35:29.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:35:29.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:35:29.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:35:29.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:35:29.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:35:29.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:35:29.399 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:35:29.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:29.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:35:29.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:35:29.960 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:35:29.961 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:35:29.963 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:35:29.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:29.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:29.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:29.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:30.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:30.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:30.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:30.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:30.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:30.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:30.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:35:30.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:30.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:30.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:30.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:30.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:30.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:30.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:30.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:30.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:30.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:30.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:30.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:30.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:30.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:30.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:30.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:30.797 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:30.797 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:35:30.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:30.800 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:35:31.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:31.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.097 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:31.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:31.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:31.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:31.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:31.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:31.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:31.123 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:31.123 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:35:31.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.264 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:35:31.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:31.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:31.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:31.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:31.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.408 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:31.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:31.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:31.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:31.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:31.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:31.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:31.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:31.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:31.442 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:35:31.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:31.728 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:35:31.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.732 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:31.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:31.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:31.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:31.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:31.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:31.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:31.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:31.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:31.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:31.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:31.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:31.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:31.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:32.194 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:35:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:32.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:32.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:32.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:32.662 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:35:33.135 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:35:33.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:33.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:33.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:33.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:33.607 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:35:34.078 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:35:34.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:34.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:34.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:34.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:34.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:34.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:34.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:34.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:34.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:34.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:34.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:34.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:34.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:34.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:34.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:34.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:34.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:34.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:34.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:34.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:34.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:35:35.019 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:35:35.490 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:35:35.960 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:35:36.427 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:35:36.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:36.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:36.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:36.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:36.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:36.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:36.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:36.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:36.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:36.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:36.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:36.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:36.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:36.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:36.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:36.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:36.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:36.893 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:35:37.364 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:35:37.837 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:35:38.310 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:35:38.782 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:35:39.253 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:35:39.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:39.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:39.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:39.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:39.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:39.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:39.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:39.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:39.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:39.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:39.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:39.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:39.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:39.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:39.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:39.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:39.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:39.486 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:35:39.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:39.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:39.723 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:35:40.195 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:35:40.669 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:35:41.141 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:35:41.614 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:35:42.087 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:35:42.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:42.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:42.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:42.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:42.175 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:42.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:42.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:42.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:42.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:42.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:42.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:42.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:42.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:42.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:42.225 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:42.225 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:35:42.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:42.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:42.557 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:35:43.024 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:35:43.489 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:35:43.953 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:35:44.418 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:35:44.882 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:35:44.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:44.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:44.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:44.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:44.965 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:44.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:44.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:44.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:44.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:44.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:44.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:44.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:44.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:44.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:45.018 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:45.018 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:35:45.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:45.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:45.350 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:35:45.823 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:35:46.289 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:35:46.753 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:35:47.218 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:35:47.682 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:35:47.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:47.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:47.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:47.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:47.768 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:47.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:47.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:47.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:35:47.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:35:47.779 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:35:52.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:35:52.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:35:52.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:52.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:52.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:52.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:52.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:35:52.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:35:52.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:52.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:35:52.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:35:52.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:35:52.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:35:52.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:35:52.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:52.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:35:52.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:35:52.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:35:52.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:35:52.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:35:52.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:35:52.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:35:52.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:35:52.821 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:35:52.821 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:35:52.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:35:52.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:35:52.823 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:35:52.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:35:52.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:35:52.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:35:52.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:35:53.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:35:53.339 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:35:53.341 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:35:53.342 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:35:53.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:53.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:53.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:53.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:53.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:53.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:53.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:53.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:53.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:53.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:53.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:53.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:53.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:53.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:53.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:53.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:53.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:53.766 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:35:53.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:53.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:53.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:53.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:54.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:35:54.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:35:54.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:54.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:54.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:54.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:35:55.632 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:35:55.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:55.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:55.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:55.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:56.098 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:35:56.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:56.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:56.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:56.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:56.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:56.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:56.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:56.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:56.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:56.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:56.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:56.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:56.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:56.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:56.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:56.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:56.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:35:56.569 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:35:56.569 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:35:56.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:56.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:56.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:56.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:56.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:56.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:57.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:35:57.498 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:35:57.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:35:57.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:35:57.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:35:57.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:35:57.980 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:35:58.444 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:35:58.909 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:35:59.374 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:35:59.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:59.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:59.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:59.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:59.770 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:35:59.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:59.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:59.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:59.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:35:59.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:35:59.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:35:59.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:35:59.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:59.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:59.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:59.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:35:59.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:35:59.839 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:35:59.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:35:59.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:35:59.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:35:59.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:00.307 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:36:00.778 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:36:01.251 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:36:01.717 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:36:02.186 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:36:02.657 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:36:03.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:03.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:03.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:03.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:03.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:03.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:03.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:03.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:03.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:03.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:03.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:03.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:03.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:03.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:03.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:03.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:03.125 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:36:03.125 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:36:03.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:03.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:03.129 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:36:03.593 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:36:04.058 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:36:04.525 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:36:04.989 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:36:05.458 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:36:05.929 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:36:06.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:06.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:06.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:06.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:06.286 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:36:06.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:06.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:06.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:36:06.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:36:06.294 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:36:11.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:36:11.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:36:11.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:11.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:11.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:11.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:11.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:11.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:36:11.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:11.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:36:11.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:36:11.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:36:11.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:36:11.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:36:11.321 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:11.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:11.321 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:36:11.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:36:11.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:36:11.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:11.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:36:11.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:36:11.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:36:11.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:11.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:11.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:36:11.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:36:11.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:36:11.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:36:11.325 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:36:11.325 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:36:11.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:36:11.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:36:11.327 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:36:11.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:11.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:36:11.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:36:11.863 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:36:11.864 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:36:11.865 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:36:11.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:11.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:11.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:11.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:11.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:11.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:11.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:11.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:11.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:11.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:11.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:11.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:11.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:11.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:11.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:11.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:11.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:12.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:12.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:12.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:36:12.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:12.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:12.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:12.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:12.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:12.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:12.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:12.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:12.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:12.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:12.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:12.301 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:36:12.301 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:36:12.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:12.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:12.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:12.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:12.725 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:36:12.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:12.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:12.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:12.782 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:36:12.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:12.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:12.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:12.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:12.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:12.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:12.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:12.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:12.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:12.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:12.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:12.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:12.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:12.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:12.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:36:13.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:13.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:13.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:13.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:36:14.128 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:36:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:14.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:14.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:14.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:14.596 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:36:15.061 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:36:15.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:15.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:15.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:15.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:15.526 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:36:15.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:15.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:15.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:15.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:15.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:15.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:15.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:15.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:15.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:15.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:15.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:15.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:15.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:15.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:15.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:15.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:15.761 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:36:15.761 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:36:15.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:15.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:15.990 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:36:16.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:16.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:16.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:16.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:16.456 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:36:16.920 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:36:17.389 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:36:17.861 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:36:18.332 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:36:18.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:18.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:18.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:18.652 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:36:18.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:18.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:18.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:18.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:18.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:18.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:18.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:18.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:18.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:36:18.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:36:18.669 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:36:18.669 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.669 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.669 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.669 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:18.670 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:23.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:36:23.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:36:23.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:23.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:23.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:23.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:23.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:23.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:36:23.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:23.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:36:23.684 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:36:23.685 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:36:23.685 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:36:23.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:36:23.686 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:23.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:23.686 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:36:23.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:36:23.686 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:36:23.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:23.688 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:36:23.688 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:36:23.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:36:23.688 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:23.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:23.689 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:36:23.689 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:36:23.689 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:36:23.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:36:23.692 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:36:23.692 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:36:23.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:36:23.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:36:23.696 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:36:23.697 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:23.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:36:24.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:36:24.222 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:36:24.223 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:36:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:24.224 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:36:24.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:24.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:24.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:24.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:24.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:24.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:24.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:24.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:24.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:24.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:24.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:24.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:24.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:24.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:24.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:24.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:24.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:36:24.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:24.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:24.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:24.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:25.104 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:36:25.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:25.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:25.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:25.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:25.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:25.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:25.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:25.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:25.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:25.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:25.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:25.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:25.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:25.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:25.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:25.567 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:36:25.567 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:36:25.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:25.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:25.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:36:25.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:25.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:25.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:25.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:26.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:36:26.499 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:36:26.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:26.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:26.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:26.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:26.964 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:36:27.428 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:36:27.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:27.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:27.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:27.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:27.670 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:36:27.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:27.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:27.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:27.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:27.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:27.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:27.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:27.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:27.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:27.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:27.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:27.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:27.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:27.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:27.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:27.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:27.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:27.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:27.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:27.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:27.894 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:36:28.364 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:36:28.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:28.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:28.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:28.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:28.830 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:36:29.297 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:36:29.763 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:36:30.234 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:36:30.700 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:36:31.166 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:36:31.637 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:36:32.110 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:36:32.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:32.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:32.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:32.582 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:36:32.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:32.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:32.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:32.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:32.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:32.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:32.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:32.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:32.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:32.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:32.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:32.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:32.628 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:36:32.628 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:36:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:33.047 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:36:33.511 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:36:33.976 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:36:34.440 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:36:34.905 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:36:35.369 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:36:35.833 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:36:36.298 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:36:36.762 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:36:37.228 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:36:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:36:38.157 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:36:38.626 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:36:39.091 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:36:39.556 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:36:40.020 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:36:40.484 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:36:40.949 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:36:41.414 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:36:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:36:42.343 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:36:42.811 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:36:43.275 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:36:43.743 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:36:44.214 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:36:44.685 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:36:45.156 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:36:45.629 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:36:46.097 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:36:46.567 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:36:47.033 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:36:47.497 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:36:47.962 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:36:48.429 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:36:48.894 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:36:49.360 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:36:49.826 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:36:50.296 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:36:50.763 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:36:51.230 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:36:51.697 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:36:52.170 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:36:52.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:52.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:52.598 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:36:52.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:52.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:52.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:52.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:52.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:52.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:52.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:52.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:36:52.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:36:52.606 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:36:52.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:52.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6318 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:36:57.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:36:57.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:36:57.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:57.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:57.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:57.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:57.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:36:57.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:36:57.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:57.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:36:57.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:36:57.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:36:57.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:36:57.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:57.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:36:57.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:36:57.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:36:57.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:57.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:36:57.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:36:57.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:36:57.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:36:57.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:57.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:36:57.627 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:36:57.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:36:57.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:36:57.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:36:57.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:36:57.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:36:57.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:36:57.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:36:57.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:36:57.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:36:57.631 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:36:57.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:36:57.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:36:58.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:36:58.164 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:36:58.166 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:36:58.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:58.168 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:36:58.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:58.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:58.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:58.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:58.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:58.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:58.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:58.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:58.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:58.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:58.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:58.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:58.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:58.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:58.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:58.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:58.564 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:36:58.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:58.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:58.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:58.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:58.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:58.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:58.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:58.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:58.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:58.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:58.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:58.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:58.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:58.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:58.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:58.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:58.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:58.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:58.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:58.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:58.886 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:36:58.886 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:36:58.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:58.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:59.030 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:36:59.494 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:36:59.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:36:59.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:36:59.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:36:59.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:36:59.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:59.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:59.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:59.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:59.801 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:36:59.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:59.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:59.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:59.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:36:59.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:36:59.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:36:59.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:36:59.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:59.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:59.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:59.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:36:59.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:36:59.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:36:59.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:36:59.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:59.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:36:59.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:37:00.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:37:00.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:00.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:00.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:00.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:00.898 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:37:01.369 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:37:01.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:01.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:01.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:01.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:01.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:01.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:01.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:01.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:01.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:01.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:01.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:01.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:01.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:01.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:01.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:01.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:01.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:01.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:37:01.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:37:01.838 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:37:01.838 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:37:01.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:01.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:01.840 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:37:02.305 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:37:02.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:02.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:02.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:02.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:02.771 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:37:03.243 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:37:03.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:37:04.189 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:37:04.660 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:37:05.132 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:37:05.605 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:37:06.077 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:37:06.549 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:37:07.023 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:37:07.494 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:37:07.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:37:08.432 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:37:08.897 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:37:09.362 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:37:09.830 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:37:10.295 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:37:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:37:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:37:11.691 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:37:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:37:12.620 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:37:13.084 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:37:13.550 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:37:14.022 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:37:14.496 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:37:14.968 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:37:15.441 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:37:15.912 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:37:16.379 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:37:16.846 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:37:17.318 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:37:17.792 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:37:18.264 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:37:18.736 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:37:19.207 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:37:19.681 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:37:20.153 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:37:20.625 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:37:21.099 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:37:21.571 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:37:21.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:21.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:21.789 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:37:21.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:37:21.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:37:21.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:37:21.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:37:21.792 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:37:21.792 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:21.792 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:21.792 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:21.792 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:21.792 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:21.792 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=5252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:26.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:37:26.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:37:26.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:37:26.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:37:26.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:37:26.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:37:26.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:37:26.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:37:26.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:37:26.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:37:26.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:37:26.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:37:26.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:37:26.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:37:26.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:37:26.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:37:26.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:37:26.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:37:26.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:37:26.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:26.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:37:26.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:37:26.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:37:26.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:37:26.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:37:26.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:37:26.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:37:26.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:37:26.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:37:26.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:37:26.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:37:26.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:26.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:37:26.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:37:26.828 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:37:26.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:37:26.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:37:27.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:37:27.364 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:37:27.366 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:37:27.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:27.368 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:37:27.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:27.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:27.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:27.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:27.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:27.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:27.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:27.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:27.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:27.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:27.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:37:27.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:37:27.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:27.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:27.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:27.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:27.762 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:37:27.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:27.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:27.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:27.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:28.229 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:37:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:37:28.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:28.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:28.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:28.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:29.175 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:37:29.643 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:37:29.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:29.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:29.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:29.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:29.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:29.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:29.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:29.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:29.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:29.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:29.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:29.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:29.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:29.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:29.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:29.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:29.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:29.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:29.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:37:29.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:37:29.919 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:37:29.919 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:37:29.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:29.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:37:30.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:37:30.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:30.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:30.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:30.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:31.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:37:31.507 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:37:31.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:31.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:31.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:31.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:31.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:37:32.437 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:37:32.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:32.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:32.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:32.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:32.617 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:37:32.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:32.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:32.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:32.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:32.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:32.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:32.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:32.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:32.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:32.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:32.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:37:32.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:37:32.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:32.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:32.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:32.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:32.905 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:37:33.371 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:37:33.838 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:37:34.308 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:37:34.773 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:37:35.239 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:37:35.706 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:37:36.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:36.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:36.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:36.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:36.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:36.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:36.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:36.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:36.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:36.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:37:36.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:37:36.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:36.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:37:36.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:37:36.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:37:36.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:37:36.177 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:37:36.177 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:37:36.177 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:37:36.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:36.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:37:36.648 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:37:37.114 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:37:37.579 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:37:38.044 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:37:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:37:38.973 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:37:39.438 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:37:39.904 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:37:40.369 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:37:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:37:41.297 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:37:41.762 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:37:42.226 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:37:42.690 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:37:43.155 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:37:43.622 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:37:44.094 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:37:44.567 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:37:45.039 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:37:45.512 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:37:45.983 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:37:46.447 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:37:46.912 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:37:47.377 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:37:47.850 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:37:48.321 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:37:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:37:49.265 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:37:49.738 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:37:50.210 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:37:50.681 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:37:51.150 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:37:51.622 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:37:52.094 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:37:52.565 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:37:53.035 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:37:53.499 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:37:53.963 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:37:54.428 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:37:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:37:55.357 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:37:55.822 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:37:56.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:37:56.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:37:56.127 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:37:56.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:37:56.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:37:56.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:37:56.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:37:56.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:37:56.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:37:56.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:37:56.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:37:56.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:37:56.132 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:37:56.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (TRX3@172.18.188.20:5700/3) RX TRXD message (ver=1 fn=6394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:37:56.133 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=6394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:01.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:38:01.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:38:01.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:38:01.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:38:01.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:38:01.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:38:01.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:38:01.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:38:01.149 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:01.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:38:01.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:38:01.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:38:01.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:38:01.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:38:01.152 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:01.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:38:01.152 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:38:01.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:38:01.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:38:01.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:38:01.155 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:38:01.155 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:38:01.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:01.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:38:01.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:38:01.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:38:01.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:01.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:38:01.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:38:01.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:38:01.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:38:01.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:01.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:38:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:38:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:38:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:38:01.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:38:01.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:38:01.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:38:01.162 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:38:01.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:01.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:38:01.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:38:01.692 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:38:01.694 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:38:01.695 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:38:01.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:01.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:01.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:01.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:01.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:01.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:01.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:01.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:01.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:01.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:01.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:01.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:38:01.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:38:01.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:01.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:01.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:01.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:01.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:01.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:01.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:01.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:02.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:02.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:02.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:02.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:02.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:38:02.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:38:02.058 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:38:02.058 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:38:02.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:38:02.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:02.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:02.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:02.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:02.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:02.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.393 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:38:02.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:02.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:02.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:02.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:02.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:02.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:38:02.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:38:02.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:02.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:02.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:38:02.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:02.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:02.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:02.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:02.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:02.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:02.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:02.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:02.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:02.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:38:02.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:38:03.040 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:38:03.045 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:38:03.045 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:38:03.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:03.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:03.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:03.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:03.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:03.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:03.506 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:38:03.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:03.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:03.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:03.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:03.591 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:38:03.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:03.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:03.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:03.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:03.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:38:03.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:38:03.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:38:03.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:38:03.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:38:03.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:38:03.607 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:38:03.607 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.607 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.607 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:03.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:38:08.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:38:08.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:38:08.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:38:08.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:38:08.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:38:08.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:38:08.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:38:08.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:38:08.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:08.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:38:08.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:38:08.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:38:08.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:38:08.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:38:08.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:38:08.618 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:38:08.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:08.619 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:38:08.619 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:38:08.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:38:08.619 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:38:08.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:38:08.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:38:08.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:38:08.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:38:08.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:38:08.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:38:08.621 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:38:08.621 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:38:08.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:38:09.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:38:09.151 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:38:09.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:09.155 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:38:09.157 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:38:09.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:09.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:09.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:09.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:09.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:09.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:09.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:09.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:09.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:09.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:09.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:38:09.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:38:09.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:09.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:09.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:09.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:09.563 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:38:09.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:09.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:09.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:09.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:10.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:38:10.499 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:38:10.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:10.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:10.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:10.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:38:11.433 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:38:11.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:11.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:11.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:11.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:11.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:38:12.365 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:38:12.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:12.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:12.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:12.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:12.830 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:38:13.297 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:38:13.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:38:13.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:38:13.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:38:13.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:38:13.768 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:38:14.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:38:14.703 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:38:15.171 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:38:15.640 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:38:16.108 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:38:16.581 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:38:17.054 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:38:17.526 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:38:17.997 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:38:18.470 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:38:18.943 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:38:19.416 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:38:19.881 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:38:20.349 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:38:20.813 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:38:21.285 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:38:21.758 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:38:22.226 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:38:22.697 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:38:23.170 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:38:23.643 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:38:24.115 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:38:24.586 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:38:25.057 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:38:25.526 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:38:25.994 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:38:26.465 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:38:26.938 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:38:27.406 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:38:27.876 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:38:28.347 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:38:28.818 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:38:29.291 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:38:29.757 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:38:30.222 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:38:30.688 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:38:31.153 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:38:31.622 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:38:32.087 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:38:32.552 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:38:33.019 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:38:33.484 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:38:33.950 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:38:34.416 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:38:34.886 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:38:35.352 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:38:35.819 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:38:36.286 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:38:36.752 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:38:37.221 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:38:37.686 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:38:38.152 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:38:38.617 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:38:39.083 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:38:39.554 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:38:40.022 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:38:40.491 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:38:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:38:41.426 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:38:41.894 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:38:42.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:42.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:42.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:42.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:42.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:42.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:42.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:42.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:38:42.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:38:42.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:38:42.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:38:42.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:42.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:38:42.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:38:42.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:38:42.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:38:42.266 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:38:42.266 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:38:42.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:42.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:38:42.364 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:38:42.837 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:38:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 03:38:43.782 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 03:38:44.255 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 03:38:44.720 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 03:38:45.185 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 03:38:45.651 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 03:38:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 03:38:46.580 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 03:38:47.045 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 03:38:47.510 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 03:38:47.975 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 03:38:48.440 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 03:38:48.905 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 03:38:49.371 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 03:38:49.836 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 03:38:50.300 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 03:38:50.765 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 03:38:51.231 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 03:38:51.703 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 03:38:52.170 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 03:38:52.635 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 03:38:53.100 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 03:38:53.564 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 03:38:54.028 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 03:38:54.497 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 03:38:54.962 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 03:38:55.427 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 03:38:55.892 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 03:38:56.356 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-07 03:38:56.821 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-07 03:38:57.287 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-07 03:38:57.753 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-07 03:38:58.218 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-07 03:38:58.682 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-07 03:38:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-07 03:38:59.612 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-07 03:39:00.077 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-07 03:39:00.542 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-07 03:39:01.007 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-07 03:39:01.473 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-07 03:39:01.946 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-07 03:39:02.419 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-07 03:39:02.891 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-07 03:39:03.360 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-07 03:39:03.827 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-07 03:39:04.299 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-07 03:39:04.772 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-07 03:39:05.244 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-07 03:39:05.717 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-07 03:39:06.183 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-07 03:39:06.647 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-07 03:39:07.115 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-07 03:39:07.579 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-07 03:39:08.046 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-07 03:39:08.511 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-07 03:39:08.975 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-07 03:39:09.446 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-07 03:39:09.918 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-07 03:39:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-07 03:39:10.851 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-07 03:39:11.315 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-07 03:39:11.779 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-07 03:39:12.246 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-07 03:39:12.711 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-07 03:39:13.176 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-07 03:39:13.641 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-07 03:39:14.105 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-07 03:39:14.573 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-07 03:39:15.046 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-07 03:39:15.519 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-07 03:39:15.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:15.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:39:15.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:39:15.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:39:15.864 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:39:15.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:39:15.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:39:15.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:39:15.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:39:15.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:39:15.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:39:15.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:39:15.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:15.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:39:15.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:39:15.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:39:15.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:39:15.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:39:15.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:39:15.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:15.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:15.991 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-07 03:39:16.463 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-07 03:39:16.934 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-07 03:39:17.407 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-07 03:39:17.877 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-07 03:39:18.341 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-07 03:39:18.812 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-07 03:39:19.283 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-07 03:39:19.753 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-07 03:39:20.221 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-07 03:39:20.687 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-07 03:39:21.152 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-07 03:39:21.618 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-07 03:39:22.083 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-07 03:39:22.549 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-07 03:39:23.016 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-07 03:39:23.482 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-07 03:39:23.948 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-07 03:39:24.416 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-07 03:39:24.882 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-07 03:39:25.348 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-07 03:39:25.813 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-07 03:39:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-07 03:39:26.750 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-07 03:39:27.216 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-07 03:39:27.682 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-07 03:39:28.148 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-07 03:39:28.615 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-07 03:39:29.085 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-07 03:39:29.557 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-07 03:39:30.029 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-07 03:39:30.502 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-07 03:39:30.974 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-07 03:39:31.445 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-07 03:39:31.918 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-07 03:39:32.387 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-07 03:39:32.858 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-07 03:39:33.330 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-07 03:39:33.800 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-07 03:39:34.270 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-07 03:39:34.737 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-07 03:39:35.203 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-07 03:39:35.669 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-07 03:39:36.135 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-07 03:39:36.601 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-07 03:39:37.071 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-07 03:39:37.537 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-07 03:39:38.004 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-07 03:39:38.469 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-05-07 03:39:38.935 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-05-07 03:39:39.402 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-05-07 03:39:39.868 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-05-07 03:39:40.337 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-05-07 03:39:40.802 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-05-07 03:39:41.268 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-05-07 03:39:41.734 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-05-07 03:39:42.201 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-05-07 03:39:42.667 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-05-07 03:39:43.134 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-05-07 03:39:43.607 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-05-07 03:39:44.079 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-05-07 03:39:44.550 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-05-07 03:39:45.021 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-05-07 03:39:45.494 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-05-07 03:39:45.966 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-05-07 03:39:46.437 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-05-07 03:39:46.904 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-05-07 03:39:47.376 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-05-07 03:39:47.848 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-05-07 03:39:48.317 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-05-07 03:39:48.788 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-05-07 03:39:49.258 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-05-07 03:39:49.729 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-05-07 03:39:50.195 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-05-07 03:39:50.661 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-05-07 03:39:50.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:39:50.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:50.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:39:50.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:39:50.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:39:50.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:39:50.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:39:50.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:39:50.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:39:50.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:39:50.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:39:50.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:50.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:39:50.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:39:50.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:39:50.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:39:50.939 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:39:50.939 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:39:50.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:50.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:39:51.129 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-05-07 03:39:51.594 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-05-07 03:39:52.059 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-05-07 03:39:52.526 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-05-07 03:39:52.995 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-05-07 03:39:53.460 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-05-07 03:39:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-05-07 03:39:54.394 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-05-07 03:39:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-05-07 03:39:55.325 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-05-07 03:39:55.790 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-05-07 03:39:56.255 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-05-07 03:39:56.719 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-05-07 03:39:57.184 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-05-07 03:39:57.651 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-05-07 03:39:58.117 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-05-07 03:39:58.581 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-05-07 03:39:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-05-07 03:39:59.509 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-05-07 03:39:59.979 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-05-07 03:40:00.452 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-05-07 03:40:00.925 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-05-07 03:40:01.396 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-05-07 03:40:01.868 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-05-07 03:40:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-05-07 03:40:02.813 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-05-07 03:40:03.286 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-05-07 03:40:03.758 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-05-07 03:40:04.231 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-05-07 03:40:04.702 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-05-07 03:40:05.165 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-05-07 03:40:05.636 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-05-07 03:40:06.108 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-05-07 03:40:06.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:06.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:06.423 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:40:06.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:06.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:06.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:40:06.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:40:06.429 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:40:11.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:40:11.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:40:11.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:11.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:11.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:11.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:11.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:11.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:40:11.439 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:11.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:40:11.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:40:11.440 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:40:11.440 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:40:11.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:40:11.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:11.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:11.441 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:40:11.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:40:11.441 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:40:11.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:40:11.444 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:40:11.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:40:11.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:40:11.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:40:11.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:40:11.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:11.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:40:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:40:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:40:11.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:40:11.451 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:40:11.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:11.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:40:11.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:40:11.454 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:40:16.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:40:16.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:40:16.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:16.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:16.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:16.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:16.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:16.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:40:16.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:16.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:40:16.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:40:16.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:40:16.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:40:16.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:40:16.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:40:16.473 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:40:16.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:16.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:40:16.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:40:16.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:40:16.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:16.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:16.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:40:16.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:40:16.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:40:16.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:16.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:40:16.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:40:16.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:40:16.479 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:40:16.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:16.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:40:16.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:40:17.010 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:40:17.011 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:40:17.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:17.013 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:40:17.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:17.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:17.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:17.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:17.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:17.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:17.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:17.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:17.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:17.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:17.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:40:17.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:40:17.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:17.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:17.432 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:40:17.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:17.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:17.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:17.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:40:18.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:40:18.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:18.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:18.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:18.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:18.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:18.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:18.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:18.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:18.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:18.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:18.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:18.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:18.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:18.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:18.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:18.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:18.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:18.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:18.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:40:18.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:40:18.613 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:40:18.613 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:40:18.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:18.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:18.846 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:40:19.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:40:19.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:19.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:19.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:19.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:19.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:40:20.239 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:40:20.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:20.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:20.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:20.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:20.711 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:40:20.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:20.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:20.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:20.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:20.866 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:40:20.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:20.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:20.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:20.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:20.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:20.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:20.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:20.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:20.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:20.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:20.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:40:20.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:40:20.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:20.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:20.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:20.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:21.181 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:40:21.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:21.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:21.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:21.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:21.651 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:40:22.122 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:40:22.588 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:40:23.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:40:23.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:40:23.987 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:40:24.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:24.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:24.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:24.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:24.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:24.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:24.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:24.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:24.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:24.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:24.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:24.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:24.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:24.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:24.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:40:24.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:40:24.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:40:24.456 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:40:24.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:24.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:24.457 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:40:24.928 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:40:25.398 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:40:25.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:25.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:25.483 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:25.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:25.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:25.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:40:25.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:40:25.486 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:25.486 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:40:30.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:40:30.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:40:30.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:30.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:30.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:30.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:30.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:40:30.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:40:30.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:30.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:40:30.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:40:30.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:40:30.505 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:40:30.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:40:30.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:30.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:40:30.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:40:30.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:40:30.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:40:30.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:30.508 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:40:30.508 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:40:30.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:40:30.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:30.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:40:30.509 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:40:30.509 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:40:30.509 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:40:30.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:30.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:40:30.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:40:30.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:40:30.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:40:30.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:40:30.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:40:30.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:40:30.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:40:30.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:40:30.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:40:30.514 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:40:30.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:40:30.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:40:30.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:40:30.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:40:30.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:40:31.045 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:40:31.046 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:40:31.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:31.048 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:40:31.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:31.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:31.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:31.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:31.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:31.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:31.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:31.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:31.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:31.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:31.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:40:31.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:40:31.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:31.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:31.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:31.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:40:31.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:31.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:31.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:31.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:31.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:40:32.403 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:40:32.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:32.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:32.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:32.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:40:33.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:40:33.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:33.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:33.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:33.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:40:34.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:40:34.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:34.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:34.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:34.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:34.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:40:35.230 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:40:35.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:40:35.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:40:35.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:40:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:40:35.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:40:36.176 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:40:36.648 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:40:37.119 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:40:37.590 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:40:38.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:40:38.531 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:40:39.002 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:40:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:40:39.944 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:40:40.417 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:40:40.890 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:40:41.362 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:40:41.835 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:40:42.308 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:40:42.781 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:40:43.251 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:40:43.722 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:40:44.195 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:40:44.668 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:40:45.141 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:40:45.614 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:40:46.087 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:40:46.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:46.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:46.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:46.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:46.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:46.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:46.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:46.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:40:46.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:40:46.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:40:46.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:40:46.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:46.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:40:46.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:40:46.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:40:46.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:40:46.461 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:40:46.461 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:40:46.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:46.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:40:46.558 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:40:47.032 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:40:47.500 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:40:47.964 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:40:48.428 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:40:48.893 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:40:49.362 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:40:49.835 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:40:50.308 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:40:50.782 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:40:51.254 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:40:51.727 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:40:52.200 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:40:52.670 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:40:53.143 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:40:53.615 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:40:54.088 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:40:54.553 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:40:55.024 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:40:55.497 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:40:55.970 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:40:56.443 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:40:56.916 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:40:57.388 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:40:57.861 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:40:58.334 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:40:58.806 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:40:59.280 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:40:59.751 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:41:00.223 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:41:00.695 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:41:01.168 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:41:01.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:01.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:01.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:01.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:01.520 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:41:01.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:01.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:01.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:01.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:01.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:01.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:01.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:01.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:01.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:01.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:41:01.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:41:01.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:01.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:01.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:01.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:01.641 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:41:02.113 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:41:02.584 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:41:03.054 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:41:03.525 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:41:03.996 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:41:04.469 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:41:04.937 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:41:05.408 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 03:41:05.882 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 03:41:06.354 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 03:41:06.826 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 03:41:07.297 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 03:41:07.768 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 03:41:08.242 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 03:41:08.709 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 03:41:09.180 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 03:41:09.651 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 03:41:10.122 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 03:41:10.593 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-07 03:41:11.066 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-07 03:41:11.536 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-07 03:41:12.001 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-07 03:41:12.471 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-07 03:41:12.938 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-07 03:41:13.404 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-07 03:41:13.872 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-07 03:41:14.338 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-07 03:41:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-07 03:41:15.271 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-07 03:41:15.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:15.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:15.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:15.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:15.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:15.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:15.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:15.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:15.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:15.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:15.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:15.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:15.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:15.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:15.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:41:15.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:41:15.737 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-07 03:41:15.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:41:15.779 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:41:15.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:15.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:16.202 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-07 03:41:16.668 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-07 03:41:17.133 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-07 03:41:17.598 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-07 03:41:18.063 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-07 03:41:18.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:18.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:18.453 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:41:18.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:18.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:18.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:18.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:18.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:41:18.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:41:18.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:41:18.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:41:18.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:41:18.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:41:18.461 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:41:18.461 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.462 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:18.463 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=10391 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:41:23.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:41:23.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:41:23.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:41:23.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:41:23.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:41:23.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:41:23.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:41:23.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:41:23.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:41:23.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:41:23.486 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:41:23.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:41:23.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:41:23.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:41:23.489 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:41:23.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:41:23.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:41:23.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:41:23.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:41:23.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:23.492 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:41:23.492 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:41:23.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:41:23.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:41:23.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:41:23.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:41:23.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:41:23.492 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:41:23.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:23.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:41:23.495 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:41:23.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:41:23.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:41:23.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:41:23.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:41:23.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:41:23.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:41:23.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:41:23.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:41:23.498 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:41:23.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:41:23.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:41:23.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:41:23.503 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:41:23.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:41:24.037 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:41:24.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:24.040 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:41:24.040 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:41:24.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:24.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:24.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:24.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:24.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:24.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:24.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:24.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:24.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:24.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:24.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:41:24.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:41:24.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:24.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:24.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:24.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:24.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:41:24.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:24.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:24.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:24.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:24.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:41:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:41:25.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:25.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:25.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:25.850 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:41:26.323 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:41:26.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:26.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:26.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:26.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:41:27.268 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:41:27.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:27.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:27.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:27.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:27.739 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:41:28.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:41:28.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:41:28.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:41:28.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:41:28.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:41:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:41:29.146 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:41:29.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:41:30.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:41:30.559 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:41:31.030 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:41:31.503 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:41:31.976 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:41:32.444 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:41:32.912 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:41:33.377 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:41:33.843 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:41:34.310 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:41:34.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:34.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:34.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:34.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:34.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:34.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:34.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:34.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:34.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:34.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:34.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:34.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:34.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:34.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:34.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:41:34.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:41:34.589 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:41:34.589 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:41:34.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:34.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:34.775 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:41:35.240 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:41:35.704 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:41:36.169 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:41:36.634 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:41:37.099 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:41:37.564 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:41:38.028 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:41:38.494 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:41:38.958 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:41:39.422 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:41:39.887 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:41:40.350 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:41:40.815 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:41:41.279 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:41:41.743 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:41:42.207 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:41:42.680 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:41:43.154 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:41:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:41:44.094 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:41:44.561 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:41:44.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:44.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:44.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:44.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:44.731 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:41:44.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:44.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:44.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:44.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:44.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:44.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:44.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:44.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:44.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:44.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:44.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:41:44.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:41:44.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:44.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:44.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:44.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:45.031 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:41:45.503 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:41:45.976 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:41:46.444 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-07 03:41:46.915 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-07 03:41:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-07 03:41:47.853 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-07 03:41:48.318 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-07 03:41:48.783 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-07 03:41:49.250 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-07 03:41:49.716 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-07 03:41:50.187 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-07 03:41:50.658 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-07 03:41:51.127 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-07 03:41:51.592 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-07 03:41:51.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:51.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:51.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:51.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:51.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:51.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:51.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:51.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:41:51.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:41:51.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:41:51.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:41:51.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:51.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:41:51.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:41:51.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:41:51.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:41:51.680 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:41:51.680 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:41:51.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:51.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:41:52.057 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-07 03:41:52.526 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-07 03:41:52.998 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-07 03:41:53.471 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-07 03:41:53.944 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-07 03:41:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-07 03:41:54.890 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-07 03:41:55.362 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-07 03:41:55.832 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-07 03:41:56.296 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-07 03:41:56.761 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-07 03:41:57.226 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-07 03:41:57.694 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-07 03:41:58.159 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-07 03:41:58.625 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-07 03:41:59.090 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-07 03:41:59.554 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-07 03:42:00.019 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-07 03:42:00.484 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-07 03:42:00.948 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-07 03:42:01.412 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-07 03:42:01.877 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-07 03:42:02.341 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-07 03:42:02.806 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-07 03:42:02.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:02.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:02.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:02.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:02.949 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:42:02.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:02.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:02.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:02.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:02.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:02.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:02.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:02.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:02.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:42:02.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:42:02.969 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:42:02.969 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.970 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.971 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.971 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:02.971 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=8605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:07.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:42:07.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:42:07.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:07.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:07.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:07.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:07.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:07.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:42:07.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:07.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:42:07.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:42:07.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:42:07.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:42:07.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:07.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:42:07.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:42:07.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:42:07.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:07.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:08.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:42:08.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:42:08.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:42:08.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:42:08.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:42:08.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:42:08.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.004 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:42:08.004 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:42:08.004 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:42:08.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:08.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:08.009 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:42:08.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:42:08.539 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:42:08.541 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:42:08.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:08.544 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:42:08.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:08.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:08.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:08.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:08.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:08.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:08.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:08.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:08.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:08.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:08.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:08.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:08.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:08.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:08.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:08.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:08.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:08.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:08.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:08.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:08.944 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:42:08.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:08.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:08.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:08.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:08.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:08.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:08.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:08.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:08.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:08.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:08.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:08.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:08.987 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:42:08.987 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:42:08.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:08.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:09.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:09.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:09.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:09.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:09.414 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:42:09.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:09.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:09.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:09.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:09.470 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:42:09.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:09.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:09.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:09.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:09.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:09.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:09.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:09.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:09.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:09.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:09.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:09.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:09.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:09.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:09.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:09.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:09.880 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:42:10.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:10.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:10.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:10.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:10.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:10.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:10.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:10.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:10.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:10.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:10.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:10.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:10.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:10.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:10.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:10.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:10.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:10.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:10.296 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:10.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:10.345 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:42:10.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:42:10.347 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:42:10.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:10.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:10.809 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:42:11.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:11.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:11.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:11.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:11.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:42:11.739 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:42:12.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:12.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:12.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:12.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:12.203 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:42:12.668 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:42:13.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:13.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:13.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:13.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:13.135 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:42:13.599 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:42:14.064 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:42:14.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:14.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:14.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:14.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:14.357 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:14.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:14.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:14.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:42:14.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:42:14.367 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:14.367 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=1394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:19.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:42:19.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:42:19.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:19.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:19.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:19.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:19.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:19.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:42:19.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:19.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:42:19.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:42:19.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:42:19.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:42:19.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:42:19.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:19.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:19.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:42:19.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:42:19.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:42:19.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:42:19.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:42:19.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:42:19.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:42:19.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:42:19.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:42:19.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:19.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:42:19.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:42:19.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:42:19.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:42:19.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:42:19.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:42:19.401 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:42:19.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:19.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:19.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:19.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:19.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:42:19.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:42:19.938 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:42:19.941 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:42:19.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:19.942 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:42:19.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:19.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:19.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:19.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:19.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:19.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:19.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:19.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:19.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:19.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:19.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:19.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:20.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:20.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:20.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:20.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:20.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:42:20.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:20.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:20.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:20.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:20.816 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:42:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:42:21.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:21.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:21.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:21.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:21.760 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:42:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:42:22.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:22.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:22.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:22.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:22.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:42:23.171 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:42:23.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:23.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:23.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:23.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:23.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:23.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:23.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:23.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:23.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:23.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:23.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:23.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:23.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:23.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:23.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:23.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:23.306 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:42:23.306 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:42:23.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:23.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:23.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:23.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:23.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:23.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:23.638 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:42:24.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:42:24.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:24.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:24.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:24.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:24.573 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:42:25.038 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:42:25.506 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:42:25.973 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:42:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:42:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:26.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:26.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:26.648 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:42:26.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:26.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:26.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:26.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:26.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:26.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:26.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:26.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:26.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:26.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:26.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:26.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:26.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:26.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:26.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:26.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:26.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:42:27.368 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:42:27.833 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:42:28.303 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:42:28.769 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:42:29.240 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:42:29.713 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:42:30.186 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:42:30.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:30.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:30.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:30.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:30.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:30.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:30.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:30.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:30.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:30.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:30.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:30.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:30.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:30.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:30.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:30.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:42:30.422 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:42:30.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:30.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:30.653 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:42:31.118 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:42:31.583 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:42:32.047 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:42:32.512 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:42:32.977 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:42:33.441 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:42:33.906 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:42:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:42:34.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:34.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:34.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:34.454 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:42:34.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:34.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:34.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:34.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:34.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:34.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:34.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:34.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:34.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:42:34.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:42:34.472 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:42:34.472 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.472 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.473 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.474 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:34.474 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:42:39.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:42:39.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:42:39.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:39.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:39.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:39.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:39.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:42:39.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:42:39.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:39.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:42:39.488 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:42:39.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:42:39.490 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:42:39.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:42:39.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:39.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:42:39.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:42:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:42:39.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:42:39.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:42:39.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:42:39.492 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:42:39.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:42:39.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:42:39.494 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:42:39.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:42:39.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:42:39.496 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:42:39.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:42:39.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:42:39.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:42:40.024 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:42:40.027 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:42:40.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:40.030 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:42:40.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:40.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:40.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:40.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:40.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:40.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:40.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:40.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:40.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:40.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:40.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:40.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:40.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:40.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:42:40.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:40.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:40.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:40.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:40.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:40.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:40.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:40.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:40.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:40.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:40.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:40.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:40.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:40.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:40.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:40.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:40.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:40.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:40.534 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:42:40.534 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:42:40.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:40.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:42:41.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:41.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:41.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:41.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:41.084 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:42:41.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:41.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:41.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:41.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:41.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:41.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:41.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:41.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:41.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:41.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:41.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:41.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:41.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:41.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:41.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:41.377 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:42:41.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:41.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:41.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:41.844 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:42:42.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:42.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:42.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:42.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:42.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:42.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:42.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:42.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:42:42.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:42:42.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:42:42.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:42:42.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:42.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:42:42.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:42:42.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:42:42.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:42:42.312 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:42:42.312 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:42:42.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:42.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:42:42.313 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:42:42.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:42.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:42.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:42.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:42.778 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:42:43.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:42:43.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:43.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:43.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:43.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:43.709 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:42:44.173 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:42:44.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:42:44.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:42:44.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:42:44.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:42:44.637 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:42:45.102 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:42:45.573 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:42:46.039 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:42:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:42:46.980 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:42:47.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:42:47.910 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:42:48.374 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:42:48.839 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:42:49.305 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:42:49.769 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:42:50.234 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:42:50.700 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:42:51.169 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:42:51.634 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:42:52.104 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:42:52.568 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:42:53.034 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:42:53.499 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:42:53.963 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:42:54.430 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:42:54.900 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:42:55.364 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:42:55.831 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-07 03:42:56.296 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-07 03:42:56.761 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-07 03:42:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-07 03:42:57.691 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-07 03:42:58.160 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-07 03:42:58.625 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-07 03:42:59.096 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-07 03:42:59.568 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-07 03:43:00.038 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-07 03:43:00.508 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-07 03:43:00.979 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-07 03:43:01.445 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-07 03:43:01.916 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-07 03:43:02.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:02.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:02.256 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:43:02.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:02.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:02.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:02.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:02.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:02.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:02.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:02.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:02.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:02.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:02.261 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:02.262 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=4973 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:07.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:07.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:07.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:07.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:07.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:07.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:07.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:07.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:07.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:07.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:07.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:43:07.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:43:07.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:43:07.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:07.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:07.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:07.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:43:07.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:07.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:43:07.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:07.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:07.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:43:07.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:07.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:43:07.288 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:43:07.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:07.288 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:07.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:07.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:43:07.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:07.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:43:07.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:43:07.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:43:07.291 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:43:07.291 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:43:07.291 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:07.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:43:07.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:43:07.815 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:43:07.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:07.817 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:43:07.818 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:43:07.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:07.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:07.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:07.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:07.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:07.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:07.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:07.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:07.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:07.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:07.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:07.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:07.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:07.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:07.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:07.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:08.229 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:43:08.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:08.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:08.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:08.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:08.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:43:09.159 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:43:09.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:09.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:09.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:09.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:43:10.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:43:10.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:10.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:10.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:10.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:10.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:43:10.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:10.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:10.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:10.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:10.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:10.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:10.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:10.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:10.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:10.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:10.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:10.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:10.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:10.703 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:43:10.703 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:43:10.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:10.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:11.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:43:11.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:11.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:11.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:11.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:11.499 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:43:11.964 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:43:12.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:12.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:12.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:12.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:12.431 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:43:12.902 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:43:13.367 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:43:13.832 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:43:14.296 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:43:14.760 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:43:15.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:15.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:15.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:15.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:15.176 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:43:15.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:15.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:15.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:15.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:15.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:15.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:15.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:15.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:15.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:15.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:15.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:15.225 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:43:15.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:15.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:15.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:15.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:15.690 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:43:16.156 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:43:16.626 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:43:17.092 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:43:17.557 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:43:18.022 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:43:18.487 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:43:18.953 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:43:19.418 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:43:19.889 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:43:20.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:43:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:43:21.304 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:43:21.769 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:43:21.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:21.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:21.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:21.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:21.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:21.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:21.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:21.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:21.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:21.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:21.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:21.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:21.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:21.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:21.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:21.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:22.003 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:43:22.003 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:43:22.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:22.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:22.234 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:43:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:43:22.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:22.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:22.779 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:22.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:22.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:22.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:22.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:22.783 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:22.783 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:27.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:27.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:27.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:27.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:27.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:27.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:27.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:27.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:27.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:27.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:27.797 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:27.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:27.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:43:27.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:27.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:27.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:43:27.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:27.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:43:27.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:43:27.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:27.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:27.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:43:27.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:27.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:43:27.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:27.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:43:27.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:43:27.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:43:27.806 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:43:27.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:27.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:43:28.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:43:28.345 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:43:28.346 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:43:28.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:28.349 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:43:28.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:28.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:28.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:28.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:28.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:28.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:28.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:28.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:28.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:28.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:28.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:28.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:28.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:28.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:28.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:28.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:28.749 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:43:28.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:28.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:28.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:28.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:29.221 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:43:29.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:43:29.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:29.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:29.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:29.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:30.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:30.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:30.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:30.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:30.167 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:43:30.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:30.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:30.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:30.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:30.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:30.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:30.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:30.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:30.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:30.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:30.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:30.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:30.212 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:43:30.212 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-07 03:43:30.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:30.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:30.631 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:43:30.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:30.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:30.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:30.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:31.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:43:31.562 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:43:31.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:31.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:31.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:31.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:32.027 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:43:32.492 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:43:32.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:32.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:32.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:32.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:32.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:32.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:32.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:32.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:32.930 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:43:32.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:32.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:32.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:32.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:32.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:32.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:43:32.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:32.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:32.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:32.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:32.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:33.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:33.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:33.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:33.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:33.426 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:43:33.892 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:43:34.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:43:34.823 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:43:35.291 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:43:35.757 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:43:36.228 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:43:36.699 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:43:37.170 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:43:37.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:37.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:37.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:37.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:37.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:37.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:37.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:37.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:37.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:37.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:43:37.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:37.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:37.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:43:37.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:43:37.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:43:37.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:43:37.403 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.188.22:6700) Recv SETFH cmd
2026-05-07 03:43:37.404 [INFO] transceiver.py:201 (MS@172.18.188.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-07 03:43:37.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:37.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:43:37.641 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:43:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:43:38.586 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:43:39.055 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:43:39.519 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:43:39.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:43:39.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:43:39.602 [INFO] transceiver.py:205 (MS@172.18.188.22:6700) Frequency hopping disabled
2026-05-07 03:43:39.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:39.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:39.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:39.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:39.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:39.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:39.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:39.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:39.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:39.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:39.606 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:43:39.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:39.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:39.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:39.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:39.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:39.606 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:39.607 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=2571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:44.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:44.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:44.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:44.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:44.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:44.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:44.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:44.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:44.635 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:44.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:44.635 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:43:44.640 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:43:44.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:43:44.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:44.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:44.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:44.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:43:44.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:44.641 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:43:44.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:44.645 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:44.645 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:43:44.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:44.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:44.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:43:44.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:44.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:43:44.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:43:44.651 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:43:44.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:44.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:44.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:43:45.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:43:45.175 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:43:45.176 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:43:45.177 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:43:45.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:43:45.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:45.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:45.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:45.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:45.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:45.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:43:46.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:46.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:46.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:46.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:46.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:46.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:46.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:46.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:46.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:46.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:46.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:46.502 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:43:46.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:46.503 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:51.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:51.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:51.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:51.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:51.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:51.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:51.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:51.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:51.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:51.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:51.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:43:51.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:43:51.514 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:43:51.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:51.514 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:51.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:51.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:43:51.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:51.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:43:51.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:51.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:43:51.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:43:51.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:51.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:51.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:51.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:43:51.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:51.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:43:51.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:51.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:43:51.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:43:51.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:51.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:51.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:51.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:43:51.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:51.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:43:51.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:43:51.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:43:51.522 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:43:51.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:51.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:43:51.992 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:43:52.061 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:43:52.063 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:43:52.064 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:43:52.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:43:52.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:52.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:52.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:52.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:52.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:43:53.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.392 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:43:53.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:53.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:53.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:53.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:53.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:53.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:53.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:53.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:53.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:53.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:53.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:53.412 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:53.412 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:43:58.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:43:58.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:43:58.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:58.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:58.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:58.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:58.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:43:58.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:58.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:58.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:43:58.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:43:58.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:43:58.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:43:58.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:58.424 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:58.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:43:58.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:43:58.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:43:58.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:43:58.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:58.426 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:43:58.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:43:58.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:58.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:43:58.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:43:58.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:43:58.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:43:58.430 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:43:58.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:43:58.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:43:58.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:43:58.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:43:58.958 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:43:58.961 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:43:58.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:58.963 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:43:58.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:43:59.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:43:59.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:43:59.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:43:59.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:43:59.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:43:59.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:43:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:00.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:00.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:00.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:00.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:00.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:00.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:00.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:00.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:00.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:00.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:00.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:00.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:00.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:00.313 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.314 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:00.315 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:05.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:05.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:05.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:05.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:05.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:05.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:05.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:05.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:05.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:05.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:05.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:05.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:05.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:05.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:05.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:05.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:05.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:05.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:05.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:05.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:05.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:05.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:05.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:05.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:05.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:05.322 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:05.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:05.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:05.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:05.324 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:05.324 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:05.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:05.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:05.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:05.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:05.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:05.325 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:05.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:05.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:05.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:05.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:05.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:05.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:05.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:05.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:05.328 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:05.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:05.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:05.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:05.858 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:05.859 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:05.860 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:05.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:05.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:05.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.267 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:44:06.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:06.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:06.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:06.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:06.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.740 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:44:06.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:06.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:07.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:07.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:07.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:07.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:07.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:07.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:07.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:07.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:07.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:07.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:07.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:07.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:07.197 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:07.197 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:12.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:12.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:12.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:12.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:12.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:12.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:12.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:12.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:12.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:12.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:12.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:12.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:12.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:12.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:12.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:12.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:12.217 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:12.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:12.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:12.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:12.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:12.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:12.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:12.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:12.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:12.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:12.224 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:12.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:12.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:12.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:12.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:12.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:12.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:12.229 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:12.229 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:12.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:12.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:12.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:12.757 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:12.758 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:12.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:12.759 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:12.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:12.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:12.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:44:13.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:13.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:13.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:13.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:13.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:44:13.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:13.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:14.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:14.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:14.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:14.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:14.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:14.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:14.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:14.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:14.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:14.090 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:14.090 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:19.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:19.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:19.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:19.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:19.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:19.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:19.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:19.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:19.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:19.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:19.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:19.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:19.103 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:19.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:19.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:19.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:19.104 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:19.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:19.104 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:19.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:19.107 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:19.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:19.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:19.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:19.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:19.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:19.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:19.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:19.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:19.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:19.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:19.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:19.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:19.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:19.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:19.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:19.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:19.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:19.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:19.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:19.120 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:19.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:19.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:19.656 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:19.658 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:19.660 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:19.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:19.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:19.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:44:20.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:20.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:20.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:20.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:20.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:44:20.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:20.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:21.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:21.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:21.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:21.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:21.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:21.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:21.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:21.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:21.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:21.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:21.011 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:21.011 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:21.012 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:21.012 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:21.012 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:26.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:26.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:26.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:26.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:26.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:26.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:26.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:26.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:26.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:26.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:26.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:26.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:26.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:26.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:26.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:26.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:26.032 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:26.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:26.032 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:26.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:26.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:26.034 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:26.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:26.035 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:26.035 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:26.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:26.035 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:26.035 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:26.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:26.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:26.035 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:26.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:26.037 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:26.037 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:26.038 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:26.038 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:26.038 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.043 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:26.512 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:26.566 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:26.567 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:26.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.569 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:26.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:26.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:44:27.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:27.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:44:27.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:27.907 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:44:27.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:27.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:27.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:27.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:27.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:27.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:27.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:27.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:27.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:27.910 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:27.911 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:32.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:32.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:32.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:32.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:32.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:32.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:32.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:32.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:32.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:32.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:32.931 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:32.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:32.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:32.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:32.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:32.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:32.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:32.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:32.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:32.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:32.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:32.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:32.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:32.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:32.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:32.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:32.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:32.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:32.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:32.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:32.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:32.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:32.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:32.938 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:32.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:32.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:33.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:33.468 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:33.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.472 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:33.474 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:33.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:33.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:33.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:33.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:33.550 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:38.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:38.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:38.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:38.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:38.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:38.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:38.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:38.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:38.556 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:38.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:38.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:38.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:38.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:38.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:38.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:38.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:38.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:38.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:38.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:38.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:38.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:38.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:38.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.560 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:38.560 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:38.560 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:38.560 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:38.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:39.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:39.088 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:39.090 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:39.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.093 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:39.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:39.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:39.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:39.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:39.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:39.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:39.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:39.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:39.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:39.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:39.209 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:44.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:44.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:44.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:44.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:44.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:44.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:44.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:44.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:44.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:44.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:44.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:44.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:44.230 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:44.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:44.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:44.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:44.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:44.233 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:44.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:44.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:44.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:44.235 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:44.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:44.240 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:44.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:44.757 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:44.759 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:44.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.760 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:44.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:44.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:44.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:44.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:44.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:44.843 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:44.843 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:49.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:49.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:49.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:49.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:49.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:49.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:49.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:49.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:49.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:49.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:49.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:49.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:49.857 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:49.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:49.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:49.858 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:49.858 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:49.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:49.862 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:49.862 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:49.862 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:49.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:49.867 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:50.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:50.396 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:50.397 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:50.398 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:50.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:50.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:50.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:50.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:50.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:50.482 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:55.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:55.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:55.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:55.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:55.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:55.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:55.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:55.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:55.492 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:55.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:44:55.492 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:44:55.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:44:55.494 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:44:55.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:55.494 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:55.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:55.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:44:55.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:44:55.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:44:55.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:55.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:44:55.497 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:44:55.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:55.497 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:55.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:55.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:44:55.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:44:55.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:44:55.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:55.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:44:55.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:44:55.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:55.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:44:55.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:55.500 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:44:55.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:44:55.500 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:44:55.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:44:55.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:44:55.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:44:55.503 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:44:55.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:55.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:44:55.971 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:44:56.033 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:44:56.055 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:44:56.057 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:44:56.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:44:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:44:56.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:44:56.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:44:56.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:44:56.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:44:56.148 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:44:56.148 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:01.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:01.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:01.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:01.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:01.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:01.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:01.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:01.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:01.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:01.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:01.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:01.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:01.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:01.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:01.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:01.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:01.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:01.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:01.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:01.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:01.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:01.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:01.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:01.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:01.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:01.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:01.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:01.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:01.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:01.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:01.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:01.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:01.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:01.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:01.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:01.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:01.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:01.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:01.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:01.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:01.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:01.182 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:01.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:01.658 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:01.714 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:01.716 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:01.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.717 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:01.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:01.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:01.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:01.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:01.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:01.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:01.819 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:06.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:06.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:06.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:06.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:06.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:06.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:06.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:06.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:06.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:06.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:06.835 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:06.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:06.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:06.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:06.839 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:06.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:06.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:06.840 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:06.840 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:06.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:06.842 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:06.842 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:06.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:06.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:06.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:06.843 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:06.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:06.843 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:06.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:06.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:06.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:06.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:06.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:06.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:06.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:06.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:06.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:06.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:06.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:06.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:06.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:06.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:06.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:06.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:06.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:06.855 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:06.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:06.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:06.860 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:07.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:07.391 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:07.393 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:07.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.396 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:07.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:07.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:07.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:07.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:07.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:07.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:07.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:07.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:07.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:07.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:07.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:07.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:07.495 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:07.495 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:12.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:12.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:12.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:12.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:12.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:12.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:12.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:12.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:12.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:12.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:12.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:12.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:12.514 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:12.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:12.514 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:12.514 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:12.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:12.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:12.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:12.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:12.518 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:12.518 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:12.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:12.520 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:12.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:12.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:12.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:12.523 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:12.523 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:12.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:12.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:13.050 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:13.052 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:13.054 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:13.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:13.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:13.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:13.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:13.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:13.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:13.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:13.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:13.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:13.459 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:45:13.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:13.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:13.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:13.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:13.923 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:45:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:45:14.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:14.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:14.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:45:15.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:45:15.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:15.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:15.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:15.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:45:16.258 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:45:16.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:16.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:16.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:16.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:16.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:16.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:16.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:16.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:16.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:16.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:16.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:16.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:16.502 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:16.502 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:21.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:21.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:21.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:21.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:21.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:21.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:21.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:21.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:21.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:21.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:21.509 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:21.510 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:21.510 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:21.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:21.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:21.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:21.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:21.512 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:21.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:21.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:21.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:21.513 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:21.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:21.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:21.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:21.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:21.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:21.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:21.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:21.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:21.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:21.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:21.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:21.518 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:21.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:21.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:21.992 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:22.046 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:22.047 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:22.047 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:22.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:22.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:22.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:22.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:22.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:22.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:22.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:22.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:22.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:22.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 03:45:22.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:22.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:22.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:22.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:22.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:45:22.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:22.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:22.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:22.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:22.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:22.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:22.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:22.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:22.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:22.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:22.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:22.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:22.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:22.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:22.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:22.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:22.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:22.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:22.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:22.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:22.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:22.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:22.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:22.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:22.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:22.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:22.608 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:22.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.608 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.609 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:22.610 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:27.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:27.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:27.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:27.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:27.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:27.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:27.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:27.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:27.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:27.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:27.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:27.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:27.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:27.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:27.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:27.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:27.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:27.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:27.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:27.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:27.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:27.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:27.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:27.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:27.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:27.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:27.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:27.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:27.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:27.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:27.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:27.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:27.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:27.635 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:27.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:27.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:28.105 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:28.169 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:28.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:28.172 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:28.174 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:28.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:28.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:28.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:28.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:28.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:28.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:28.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:28.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:28.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 03:45:28.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:28.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:28.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:28.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:28.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:28.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:28.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:28.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:28.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:28.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:28.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:28.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:28.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:28.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:28.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:45:28.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:28.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:28.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:28.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:29.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:45:29.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:45:29.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:29.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:29.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:29.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:29.974 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:45:30.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-07 03:45:30.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:30.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:30.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:30.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:30.908 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-07 03:45:31.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-07 03:45:31.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:31.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:31.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:31.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:31.851 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-07 03:45:32.316 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-07 03:45:32.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:32.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:32.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:32.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:32.781 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-07 03:45:33.246 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-07 03:45:33.711 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-07 03:45:34.176 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-07 03:45:34.641 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-07 03:45:35.106 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-07 03:45:35.574 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-07 03:45:36.041 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-07 03:45:36.506 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-07 03:45:36.971 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-07 03:45:37.439 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-07 03:45:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-07 03:45:38.375 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-07 03:45:38.839 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-07 03:45:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-07 03:45:39.769 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-07 03:45:40.236 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-07 03:45:40.702 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-07 03:45:41.168 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-07 03:45:41.633 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-07 03:45:42.098 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-07 03:45:42.562 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-07 03:45:43.027 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-07 03:45:43.492 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-07 03:45:43.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:43.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:43.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:43.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:43.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:43.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:43.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:43.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:43.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:43.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:43.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:43.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:43.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:43.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:43.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:43.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:43.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:43.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:43.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:43.877 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:43.877 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.878 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.879 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.879 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:43.879 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=3554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:48.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:48.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:48.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:48.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:48.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:48.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:48.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:48.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:48.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:48.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:48.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:48.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:48.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:48.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:48.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:48.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:48.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:48.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:48.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:48.885 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:48.885 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:48.885 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:48.890 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:49.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:49.413 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:49.415 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:49.417 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:49.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:49.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:49.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:49.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:49.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:49.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:49.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:49.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:49.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 03:45:49.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:49.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:49.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:49.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:49.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:49.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:49.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:49.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:49.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:49.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:49.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:49.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:49.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:49.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:49.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:49.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:49.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:49.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:49.784 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:54.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:54.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:54.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:54.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:54.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:54.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:54.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:54.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:54.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:54.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:45:54.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:45:54.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:45:54.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:45:54.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:54.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:54.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:54.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:45:54.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:45:54.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:45:54.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:54.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:45:54.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:45:54.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:54.816 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:54.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:54.816 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:45:54.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:45:54.816 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:45:54.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:54.818 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:45:54.818 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:45:54.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:54.818 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:45:54.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:54.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:45:54.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:45:54.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:45:54.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:54.823 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.824 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:45:54.824 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:45:54.824 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:45:54.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:45:54.829 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-07 03:45:55.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-07 03:45:55.346 [DEBUG] fake_trx.py:278 (BTS@172.18.188.20:5700) Recv FAKE_TOA cmd
2026-05-07 03:45:55.347 [DEBUG] fake_trx.py:297 (BTS@172.18.188.20:5700) Recv FAKE_RSSI cmd
2026-05-07 03:45:55.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:55.347 [DEBUG] fake_trx.py:322 (BTS@172.18.188.20:5700) Recv FAKE_CI cmd
2026-05-07 03:45:55.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:55.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:55.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:55.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:55.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:55.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:55.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:55.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:55.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD HANDOVER
2026-05-07 03:45:55.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:55.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:55.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:55.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:55.767 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-07 03:45:55.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:55.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:55.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:55.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:56.236 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-07 03:45:56.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-07 03:45:56.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:56.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:56.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:56.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:57.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-07 03:45:57.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:57.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:57.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:57.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD ECHO
2026-05-07 03:45:57.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.188.22:6700) Ignore CMD SETSLOT
2026-05-07 03:45:57.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.188.22:6700) Recv RXTUNE cmd
2026-05-07 03:45:57.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.188.22:6700) Recv TXTUNE cmd
2026-05-07 03:45:57.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.188.22:6700) Recv POWERON CMD
2026-05-07 03:45:57.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.188.22:6700) Starting transceiver...
2026-05-07 03:45:57.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD NOHANDOVER
2026-05-07 03:45:57.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.188.22:6700) Recv POWEROFF cmd
2026-05-07 03:45:57.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.188.22:6700) Stopping transceiver...
2026-05-07 03:45:57.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:45:57.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:45:57.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:45:57.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:45:57.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:45:57.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:45:57.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:45:57.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:45:57.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:45:57.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:45:57.468 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=574 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=574 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:45:57.468 [WARNING] transceiver.py:257 (BTS@172.18.188.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-07 03:46:02.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:46:02.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:46:02.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:46:02.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:46:02.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:46:02.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:46:02.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:46:02.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:46:02.471 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:02.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:46:02.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:46:02.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:46:02.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:46:02.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:46:02.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:46:02.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:46:02.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:46:02.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:46:02.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:46:02.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:46:02.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:02.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:46:02.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:46:02.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:46:02.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:46:02.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:46:02.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:46:02.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:46:02.478 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:46:02.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:46:02.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:46:02.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:46:02.480 [INFO] transceiver.py:246 Stopping clock generator
2026-05-07 03:46:07.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:46:07.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:46:07.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:46:07.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:46:07.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:46:07.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:46:07.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:46:07.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:46:07.506 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.188.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:07.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.188.20:5700) Recv SETFORMAT cmd
2026-05-07 03:46:07.506 [INFO] ctrl_if_trx.py:201 (BTS@172.18.188.20:5700) TRXD header version 1 -> 1
2026-05-07 03:46:07.508 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.188.20:5700/1) Recv RXTUNE cmd
2026-05-07 03:46:07.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.188.20:5700/1) Recv TXTUNE cmd
2026-05-07 03:46:07.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:46:07.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.188.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:07.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:46:07.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.188.20:5700/1) Recv NOMTXPOWER cmd
2026-05-07 03:46:07.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.188.20:5700/1) Recv SETFORMAT cmd
2026-05-07 03:46:07.510 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.188.20:5700/1) TRXD header version 1 -> 1
2026-05-07 03:46:07.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.188.20:5700/1) Recv SETPOWER cmd
2026-05-07 03:46:07.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.188.20:5700/2) Recv RXTUNE cmd
2026-05-07 03:46:07.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.188.20:5700/2) Recv TXTUNE cmd
2026-05-07 03:46:07.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:46:07.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.188.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:07.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:46:07.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.188.20:5700/2) Recv NOMTXPOWER cmd
2026-05-07 03:46:07.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.188.20:5700/2) Recv SETFORMAT cmd
2026-05-07 03:46:07.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.188.20:5700/2) TRXD header version 1 -> 1
2026-05-07 03:46:07.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.188.20:5700/2) Recv SETPOWER cmd
2026-05-07 03:46:07.512 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.188.20:5700/3) Recv RXTUNE cmd
2026-05-07 03:46:07.512 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.188.20:5700/3) Recv TXTUNE cmd
2026-05-07 03:46:07.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:46:07.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.188.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-07 03:46:07.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:46:07.512 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.188.20:5700/3) Recv NOMTXPOWER cmd
2026-05-07 03:46:07.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.188.20:5700/3) Recv SETFORMAT cmd
2026-05-07 03:46:07.512 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.188.20:5700/3) TRXD header version 1 -> 1
2026-05-07 03:46:07.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.188.20:5700/3) Recv SETPOWER cmd
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.188.20:5700) Recv RXTUNE cmd
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETTSC
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETTSC
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETTSC
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.188.20:5700) Recv TXTUNE cmd
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETRXGAIN
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETRXGAIN
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETRXGAIN
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETTSC
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.188.20:5700) Recv NOMTXPOWER cmd
2026-05-07 03:46:07.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.188.20:5700) Recv SETPOWER cmd
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.188.20:5700) Recv POWERON CMD
2026-05-07 03:46:07.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.188.20:5700) Starting transceiver...
2026-05-07 03:46:07.515 [INFO] transceiver.py:243 Starting clock generator
2026-05-07 03:46:07.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETRXGAIN
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.188.20:5700/1) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.188.20:5700/1) Recv RFMUTE cmd
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.188.20:5700/2) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.188.20:5700/3) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.188.20:5700/2) Recv RFMUTE cmd
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.188.20:5700/3) Recv RFMUTE cmd
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.188.20:5700) Ignore CMD SETSLOT
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.188.20:5700) Recv RFMUTE cmd
2026-05-07 03:46:07.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.188.20:5700) Recv POWEROFF cmd
2026-05-07 03:46:07.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.188.20:5700) Stopping transceiver...
2026-05-07 03:46:07.516 [INFO] transceiver.py:246 Stopping clock generator