BTS_Tests:hopping 181

135

Took 30 min

All Tests

Name	Age	Duration
TC_acch_overpower_always_on_facch	638	9 sec
TC_acch_overpower_always_on_sacch	638	9 sec
TC_acch_overpower_limit	638	9 sec
TC_acch_overpower_rxqual_thresh	638	9 sec
TC_acch_overpower_rxqual_thresh_dtx	638	9 sec
TC_chan_act_a51	0	2.6 sec
TC_chan_act_a52	0	2.6 sec
TC_chan_act_a53	0	2.6 sec
TC_chan_act_a54 Regression	1	4.5 sec
TC_chan_act_react	0	1.1 sec
TC_chan_act_stress	0	4 sec
TC_chan_act_wrong_nr	0	1.3 sec
TC_chan_deact_not_active	0	1.2 sec
TC_chopped_ipa_payload	0	42 sec
TC_chopped_ipa_ping Regression	1	1 min 0 sec
TC_conn_fail_crit Regression	1	42 sec
TC_data_facch_tchf144	0	2 sec
TC_data_facch_tchf24	0	2 sec
TC_data_facch_tchf48	0	2 sec
TC_data_facch_tchf96	0	2 sec
TC_data_facch_tchh24	0	2.1 sec
TC_data_facch_tchh48	0	2.1 sec
TC_data_rtp_tchf144	0	1.6 sec
TC_data_rtp_tchf24	0	1.7 sec
TC_data_rtp_tchf48	0	2 sec
TC_data_rtp_tchf96	0	2 sec
TC_data_rtp_tchh24	470	5.2 sec
TC_data_rtp_tchh48	54	5.2 sec
TC_deact_sacch	0	1 min 31 sec
TC_dyn_ipa_pdch_act_deact	0	4.2 sec
TC_dyn_ipa_pdch_act_tchf_act_nack	0	1.2 sec
TC_dyn_ipa_pdch_tchf_act	0	5.3 sec
TC_dyn_ipa_pdch_tchf_act_pdch_act_nack	0	1.1 sec
TC_dyn_osmo_pdch_act_deact	0	4.2 sec
TC_dyn_osmo_pdch_double_act	0	1 sec
TC_dyn_osmo_pdch_sdcch8_act	0	1.1 sec
TC_dyn_osmo_pdch_sdcch8_race_act	0	2.9 sec
TC_dyn_osmo_pdch_tchf_act	0	1.2 sec
TC_dyn_osmo_pdch_tchh_act	0	1.2 sec
TC_dyn_osmo_pdch_tchh_race_act	0	2.8 sec
TC_dyn_osmo_pdch_unsol_deact	0	1.2 sec
TC_early_immediate_assignment	0	3.5 sec
TC_encr_cmd_a51	0	5.1 sec
TC_encr_cmd_a52	0	5.2 sec
TC_encr_cmd_a53	0	5.4 sec
TC_encr_cmd_a54	0	5.1 sec
TC_err_rep_wrong_mdisc	0	1.1 sec
TC_err_rep_wrong_msg_type	0	1.2 sec
TC_err_rep_wrong_sequence	0	1.1 sec
TC_est_dchan	0	15 sec
TC_ho_physical_info	638	3.2 sec
TC_ho_rach	0	3.7 sec
TC_ipa_crcx_ack_addr	638	1.2 sec
TC_ipa_crcx_mdcx_dlcx_not_active	0	1.1 sec
TC_ipa_crcx_mdcx_mdcx_dlcx_not_active	0	4.5 sec
TC_ipa_crcx_sdcch_not_active	0	1.2 sec
TC_ipa_crcx_twice_not_active	0	1.2 sec
TC_ipa_dlcx_not_active	0	0.92 sec
TC_lapdm_selftest	0	1 ms
TC_meas_res_sign_sdcch4 Regression	1	14 sec
TC_meas_res_sign_sdcch8	638	7.3 sec
TC_meas_res_sign_tchf	638	4.3 sec
TC_meas_res_sign_tchh	638	2.2 sec
TC_meas_res_sign_tchh_toa256	638	2.2 sec
TC_meas_res_speech_tchf	0	8.7 sec
TC_meas_res_speech_tchf_facch Regression	1	3.8 sec
TC_meas_res_speech_tchf_sapi3 Regression	1	0.93 sec
TC_meas_res_speech_tchh	638	1.7 sec
TC_meas_res_speech_tchh_facch	638	2.2 sec
TC_meas_res_speech_tchh_sapi3	0	13 sec
TC_meas_res_speech_tchh_toa256	638	2.1 sec
TC_ms_pwr_ctrl_constant	0	16 sec
TC_ms_pwr_ctrl_pf_ewma	0	31 sec
TC_paging_imsi_200percent Regression	1	38 sec
TC_paging_imsi_200percent_with_ps Regression	1	39 sec
TC_paging_imsi_80percent	0	26 sec
TC_paging_tmsi_200percent	0	33 sec
TC_paging_tmsi_80percent	0	22 sec
TC_pcu_act_req	0	3.9 sec
TC_pcu_act_req_wrong_bts	0	11 sec
TC_pcu_act_req_wrong_trx	0	7.1 sec
TC_pcu_act_req_wrong_ts Regression	1	4.1 sec
TC_pcu_data_ind_lqual_cb	638	5.1 sec
TC_pcu_data_req_agch	0	5.9 sec
TC_pcu_data_req_imm_ass_agch	0	1.4 sec
TC_pcu_data_req_imm_ass_pch	0	1.4 sec
TC_pcu_data_req_pch	0	4.6 sec
TC_pcu_data_req_pdtch	0	4.2 sec
TC_pcu_data_req_ptcch	0	4.8 sec
TC_pcu_data_req_ts_inactive	0	6 sec
TC_pcu_data_req_wrong_bts	0	9.2 sec
TC_pcu_data_req_wrong_trx Regression	1	4.2 sec
TC_pcu_data_req_wrong_ts	0	12 sec
TC_pcu_deact_req	0	9.1 sec
TC_pcu_deact_req_wrong_ts	0	5.3 sec
TC_pcu_ext_rach_content	0	10 sec
TC_pcu_info_ind_fh_params	0	1.2 sec
TC_pcu_interf_ind	0	6.3 sec
TC_pcu_oml_alert	638	4.1 sec
TC_pcu_paging_from_rsl	0	1.1 sec
TC_pcu_ptcch	638	6.2 sec
TC_pcu_rach_content Regression	1	15 sec
TC_pcu_rr_suspend	0	1.6 sec
TC_pcu_rts_req	0	10 sec
TC_pcu_socket_connect_multi	0	1.2 sec
TC_pcu_socket_connect_si3gprs	0	3.9 sec
TC_pcu_socket_connect_si4gprs	0	3.1 sec
TC_pcu_socket_disconnect_nosi3gprs	0	5 sec
TC_pcu_socket_disconnect_nosi4gprs	0	5 sec
TC_pcu_socket_noconnect_nosi3gprs	0	3.9 sec
TC_pcu_socket_noconnect_nosi4gprs	0	3.2 sec
TC_pcu_socket_nsvc_ipv4	0	1.2 sec
TC_pcu_socket_nsvc_ipv6	0	1.2 sec
TC_pcu_socket_reconnect	0	3 sec
TC_pcu_socket_two_nsvc	0	0.59 sec
TC_pcu_socket_verify_info_ind	0	3.1 sec
TC_pcu_time_ind	0	10 sec
TC_pcu_ver_si1	0	1.2 sec
TC_pcu_ver_si13	0	1.1 sec
TC_pcu_ver_si3	0	1.2 sec
TC_rach_content	0	9.9 sec
TC_rach_content_emerg	0	9.9 sec
TC_rach_count	0	14 sec
TC_rach_load_count	0	20 sec
TC_rach_load_idle_below_thresh	0	6.1 sec
TC_rach_load_idle_thresh0	0	11 sec
TC_rach_max_ta	0	11 sec
TC_rll_est_ind	0	45 sec
TC_rll_est_req_ACCH_3	0	2.9 sec
TC_rll_est_req_DCCH_3	0	1.2 sec
TC_rll_rel_ind_ACCH_0	638	26 sec
TC_rll_rel_ind_ACCH_3	638	26 sec
TC_rll_rel_ind_DCCH_0	0	2.9 sec
TC_rll_rel_ind_DCCH_3	0	2.9 sec
TC_rll_rel_req	638	36 sec
TC_rll_unit_data_ind_ACCH	0	10 sec
TC_rll_unit_data_ind_DCCH	0	2.8 sec
TC_rll_unit_data_req_ACCH	0	8.5 sec
TC_rll_unit_data_req_DCCH Regression	1	5.9 sec
TC_rsl_bs_pwr_static_ass	0	5.8 sec
TC_rsl_bs_pwr_static_power_control	0	2.5 sec
TC_rsl_chan_initial_ms_pwr	0	2.8 sec
TC_rsl_chan_initial_ta	0	2.1 sec
TC_rsl_ie_content_error	0	1.1 sec
TC_rsl_mand_ie_error	0	1.1 sec
TC_rsl_modify_encr	0	14 sec
TC_rsl_ms_pwr_ctrl Regression	1	21 sec
TC_rsl_ms_pwr_dyn_active	0	11 sec
TC_rsl_ms_pwr_dyn_active2 Regression	1	14 sec
TC_rsl_ms_pwr_dyn_ass_updown	3	7.1 sec
TC_rsl_ms_pwr_dyn_down Regression	1	14 sec
TC_rsl_ms_pwr_dyn_max Regression	1	14 sec
TC_rsl_ms_pwr_dyn_up	0	21 sec
TC_rsl_protocol_error	0	0.67 sec
TC_rsl_rf_resource_ind	0	14 sec
TC_sacch_chan_act Regression	1	10 sec
TC_sacch_chan_act_ho_async	0	32 sec
TC_sacch_chan_act_ho_sync	0	48 sec
TC_sacch_filling	0	14 sec
TC_sacch_info_mod	0	29 sec
TC_sacch_multi	0	1 min 26 sec
TC_sacch_multi_chg Regression	1	1 min 35 sec
TC_si_sched_1	0	9.1 sec
TC_si_sched_13 Regression	1	9.4 sec
TC_si_sched_13_2bis_2ter_2quater Regression	1	16 sec
TC_si_sched_2bis	0	8.8 sec
TC_si_sched_2quater	0	17 sec
TC_si_sched_2ter	0	9 sec
TC_si_sched_2ter_2bis	0	9.1 sec
TC_si_sched_default	0	9 sec
TC_speech_no_rtp_tchf	0	7.3 sec
TC_speech_no_rtp_tchh	0	5.4 sec
TC_speech_osmux_tchf	0	3.3 sec
TC_speech_osmux_tchh	0	3.5 sec
TC_speech_rtp_tchf	0	7.4 sec
TC_speech_rtp_tchh	0	5.4 sec
TC_tch_sign_l2_fill_frame Regression	1	22 sec
TC_tch_sign_l2_fill_frame_dtxd	638	2 sec
TC_tx_power_down_bcch	0	10 sec
TC_tx_power_ramp_adm_state_change	0	21 sec
TC_tx_power_start_ramp_up_bcch	12	1.3 sec